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Remove target dependent code
[qemu.git] / hw / fdc.c
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8977f3c1 1/*
890fa6be 2 * QEMU Floppy disk emulator (Intel 82078)
5fafdf24 3 *
3ccacc4a 4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5fafdf24 5 *
8977f3c1
FB		 6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
e80cfcfc
FB		 24/*
25 * The controller is used in Sun4m systems in a slightly different
26 * way. There are changes in DOR register and DMA is not available.
27 */
8977f3c1
FB		 28#include "vl.h"
29
30/********************************************************/
31/* debug Floppy devices */
32//#define DEBUG_FLOPPY
33
34#ifdef DEBUG_FLOPPY
35#define FLOPPY_DPRINTF(fmt, args...) \
36do { printf("FLOPPY: " fmt , ##args); } while (0)
37#else
38#define FLOPPY_DPRINTF(fmt, args...)
39#endif
40
41#define FLOPPY_ERROR(fmt, args...) \
42do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0)
43
44/********************************************************/
45/* Floppy drive emulation */
46
47/* Will always be a fixed parameter for us */
48#define FD_SECTOR_LEN 512
49#define FD_SECTOR_SC 2 /* Sector size code */
50
51/* Floppy disk drive emulation */
52typedef enum fdisk_type_t {
53 FDRIVE_DISK_288 = 0x01, /* 2.88 MB disk */
54 FDRIVE_DISK_144 = 0x02, /* 1.44 MB disk */
55 FDRIVE_DISK_720 = 0x03, /* 720 kB disk */
baca51fa
FB		 56 FDRIVE_DISK_USER = 0x04, /* User defined geometry */
57 FDRIVE_DISK_NONE = 0x05, /* No disk */
8977f3c1
FB		 58} fdisk_type_t;
59
60typedef enum fdrive_type_t {
61 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
62 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
63 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
64 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
65} fdrive_type_t;
66
baca51fa
FB		 67typedef enum fdrive_flags_t {
68 FDRIVE_MOTOR_ON = 0x01, /* motor on/off */
baca51fa
FB		 69} fdrive_flags_t;
70
71typedef enum fdisk_flags_t {
72 FDISK_DBL_SIDES = 0x01,
73} fdisk_flags_t;
74
8977f3c1
FB		 75typedef struct fdrive_t {
76 BlockDriverState *bs;
77 /* Drive status */
78 fdrive_type_t drive;
baca51fa 79 fdrive_flags_t drflags;
8977f3c1 80 uint8_t perpendicular; /* 2.88 MB access mode */
8977f3c1
FB		 81 /* Position */
82 uint8_t head;
83 uint8_t track;
84 uint8_t sect;
85 /* Last operation status */
86 uint8_t dir; /* Direction */
87 uint8_t rw; /* Read/write */
88 /* Media */
baca51fa 89 fdisk_flags_t flags;
8977f3c1
FB		 90 uint8_t last_sect; /* Nb sector per track */
91 uint8_t max_track; /* Nb of tracks */
baca51fa 92 uint16_t bps; /* Bytes per sector */
8977f3c1
FB		 93 uint8_t ro; /* Is read-only */
94} fdrive_t;
95
caed8802 96static void fd_init (fdrive_t *drv, BlockDriverState *bs)
8977f3c1
FB		 97{
98 /* Drive */
caed8802 99 drv->bs = bs;
b939777c 100 drv->drive = FDRIVE_DRV_NONE;
baca51fa 101 drv->drflags = 0;
8977f3c1 102 drv->perpendicular = 0;
8977f3c1 103 /* Disk */
baca51fa 104 drv->last_sect = 0;
8977f3c1
FB		 105 drv->max_track = 0;
106}
107
108static int _fd_sector (uint8_t head, uint8_t track,
109 uint8_t sect, uint8_t last_sect)
110{
111 return (((track * 2) + head) * last_sect) + sect - 1;
112}
113
114/* Returns current position, in sectors, for given drive */
115static int fd_sector (fdrive_t *drv)
116{
117 return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
118}
119
120static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
121 int enable_seek)
122{
123 uint32_t sector;
baca51fa
FB		 124 int ret;
125
126 if (track > drv->max_track ||
127 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
ed5fd2cc
FB		 128 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
129 head, track, sect, 1,
130 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
131 drv->max_track, drv->last_sect);
8977f3c1
FB		 132 return 2;
133 }
134 if (sect > drv->last_sect) {
ed5fd2cc
FB		 135 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
136 head, track, sect, 1,
137 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
138 drv->max_track, drv->last_sect);
8977f3c1
FB		 139 return 3;
140 }
141 sector = _fd_sector(head, track, sect, drv->last_sect);
baca51fa 142 ret = 0;
8977f3c1
FB		 143 if (sector != fd_sector(drv)) {
144#if 0
145 if (!enable_seek) {
146 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
147 head, track, sect, 1, drv->max_track, drv->last_sect);
148 return 4;
149 }
150#endif
151 drv->head = head;
baca51fa
FB		 152 if (drv->track != track)
153 ret = 1;
8977f3c1
FB		 154 drv->track = track;
155 drv->sect = sect;
8977f3c1
FB		 156 }
157
baca51fa 158 return ret;
8977f3c1
FB		 159}
160
161/* Set drive back to track 0 */
162static void fd_recalibrate (fdrive_t *drv)
163{
164 FLOPPY_DPRINTF("recalibrate\n");
165 drv->head = 0;
166 drv->track = 0;
167 drv->sect = 1;
168 drv->dir = 1;
169 drv->rw = 0;
170}
171
a541f297
FB		 172/* Recognize floppy formats */
173typedef struct fd_format_t {
174 fdrive_type_t drive;
175 fdisk_type_t disk;
176 uint8_t last_sect;
177 uint8_t max_track;
178 uint8_t max_head;
179 const unsigned char *str;
180} fd_format_t;
181
182static fd_format_t fd_formats[] = {
183 /* First entry is default format */
184 /* 1.44 MB 3"1/2 floppy disks */
185 { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
186 { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1, "1.6 MB 3\"1/2", },
187 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
188 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
189 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
190 { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
191 { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
192 { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
193 /* 2.88 MB 3"1/2 floppy disks */
194 { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
195 { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
196 { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1, "3.2 MB 3\"1/2", },
197 { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
198 { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
199 /* 720 kB 3"1/2 floppy disks */
200 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 1, "720 kB 3\"1/2", },
201 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1, "800 kB 3\"1/2", },
202 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1, "820 kB 3\"1/2", },
203 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1, "830 kB 3\"1/2", },
204 { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
205 { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
206 /* 1.2 MB 5"1/4 floppy disks */
207 { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1, "1.2 kB 5\"1/4", },
208 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
209 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
210 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
211 { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1, "1.6 MB 5\"1/4", },
212 /* 720 kB 5"1/4 floppy disks */
213 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 80, 1, "720 kB 5\"1/4", },
214 { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1, "880 kB 5\"1/4", },
215 /* 360 kB 5"1/4 floppy disks */
216 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 1, "360 kB 5\"1/4", },
217 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 0, "180 kB 5\"1/4", },
218 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1, "410 kB 5\"1/4", },
219 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1, "420 kB 5\"1/4", },
5fafdf24 220 /* 320 kB 5"1/4 floppy disks */
a541f297
FB		 221 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 1, "320 kB 5\"1/4", },
222 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 0, "160 kB 5\"1/4", },
223 /* 360 kB must match 5"1/4 better than 3"1/2... */
224 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 0, "360 kB 3\"1/2", },
225 /* end */
226 { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
227};
228
8977f3c1 229/* Revalidate a disk drive after a disk change */
caed8802 230static void fd_revalidate (fdrive_t *drv)
8977f3c1 231{
a541f297
FB		 232 fd_format_t *parse;
233 int64_t nb_sectors, size;
234 int i, first_match, match;
baca51fa 235 int nb_heads, max_track, last_sect, ro;
8977f3c1
FB		 236
237 FLOPPY_DPRINTF("revalidate\n");
a541f297 238 if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
baca51fa 239 ro = bdrv_is_read_only(drv->bs);
a541f297 240 bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
baca51fa 241 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
ed5fd2cc
FB		 242 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
243 nb_heads - 1, max_track, last_sect);
a541f297
FB		 244 } else {
245 bdrv_get_geometry(drv->bs, &nb_sectors);
246 match = -1;
247 first_match = -1;
248 for (i = 0;; i++) {
249 parse = &fd_formats[i];
250 if (parse->drive == FDRIVE_DRV_NONE)
251 break;
252 if (drv->drive == parse->drive ||
253 drv->drive == FDRIVE_DRV_NONE) {
254 size = (parse->max_head + 1) * parse->max_track *
255 parse->last_sect;
256 if (nb_sectors == size) {
257 match = i;
258 break;
259 }
260 if (first_match == -1)
261 first_match = i;
262 }
263 }
264 if (match == -1) {
265 if (first_match == -1)
266 match = 1;
267 else
268 match = first_match;
269 parse = &fd_formats[match];
270 }
271 nb_heads = parse->max_head + 1;
272 max_track = parse->max_track;
273 last_sect = parse->last_sect;
274 drv->drive = parse->drive;
ed5fd2cc
FB		 275 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
276 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
a541f297 277 }
baca51fa
FB		 278 if (nb_heads == 1) {
279 drv->flags &= ~FDISK_DBL_SIDES;
280 } else {
281 drv->flags |= FDISK_DBL_SIDES;
282 }
283 drv->max_track = max_track;
284 drv->last_sect = last_sect;
baca51fa 285 drv->ro = ro;
8977f3c1 286 } else {
ed5fd2cc 287 FLOPPY_DPRINTF("No disk in drive\n");
baca51fa
FB		 288 drv->last_sect = 0;
289 drv->max_track = 0;
290 drv->flags &= ~FDISK_DBL_SIDES;
8977f3c1 291 }
caed8802
FB		 292}
293
8977f3c1
FB		 294/* Motor control */
295static void fd_start (fdrive_t *drv)
296{
baca51fa 297 drv->drflags |= FDRIVE_MOTOR_ON;
8977f3c1
FB		 298}
299
300static void fd_stop (fdrive_t *drv)
301{
baca51fa 302 drv->drflags &= ~FDRIVE_MOTOR_ON;
8977f3c1
FB		 303}
304
305/* Re-initialise a drives (motor off, repositioned) */
306static void fd_reset (fdrive_t *drv)
307{
308 fd_stop(drv);
309 fd_recalibrate(drv);
310}
311
312/********************************************************/
4b19ec0c 313/* Intel 82078 floppy disk controller emulation */
8977f3c1 314
baca51fa
FB		 315static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
316static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
85571bc7
FB		 317static int fdctrl_transfer_handler (void *opaque, int nchan,
318 int dma_pos, int dma_len);
baca51fa 319static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status);
ed5fd2cc 320static void fdctrl_result_timer(void *opaque);
baca51fa
FB		 321
322static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
323static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
324static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value);
325static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
326static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value);
327static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
328static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value);
329static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
330static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value);
331static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
8977f3c1
FB		 332
333enum {
ed5fd2cc 334 FD_CTRL_ACTIVE = 0x01, /* XXX: suppress that */
8977f3c1 335 FD_CTRL_RESET = 0x02,
ed5fd2cc
FB		 336 FD_CTRL_SLEEP = 0x04, /* XXX: suppress that */
337 FD_CTRL_BUSY = 0x08, /* dma transfer in progress */
8977f3c1
FB		 338 FD_CTRL_INTR = 0x10,
339};
340
341enum {
342 FD_DIR_WRITE = 0,
343 FD_DIR_READ = 1,
344 FD_DIR_SCANE = 2,
345 FD_DIR_SCANL = 3,
346 FD_DIR_SCANH = 4,
347};
348
349enum {
350 FD_STATE_CMD = 0x00,
351 FD_STATE_STATUS = 0x01,
352 FD_STATE_DATA = 0x02,
353 FD_STATE_STATE = 0x03,
354 FD_STATE_MULTI = 0x10,
355 FD_STATE_SEEK = 0x20,
baca51fa 356 FD_STATE_FORMAT = 0x40,
8977f3c1
FB		 357};
358
359#define FD_STATE(state) ((state) & FD_STATE_STATE)
baca51fa
FB		 360#define FD_SET_STATE(state, new_state) \
361do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0)
8977f3c1
FB		 362#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
363#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
baca51fa 364#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
8977f3c1 365
baca51fa
FB		 366struct fdctrl_t {
367 fdctrl_t *fdctrl;
4b19ec0c 368 /* Controller's identification */
8977f3c1
FB		 369 uint8_t version;
370 /* HW */
d537cf6c 371 qemu_irq irq;
8977f3c1 372 int dma_chann;
5dcb6b91 373 target_phys_addr_t io_base;
4b19ec0c 374 /* Controller state */
ed5fd2cc 375 QEMUTimer *result_timer;
8977f3c1
FB		 376 uint8_t state;
377 uint8_t dma_en;
378 uint8_t cur_drv;
379 uint8_t bootsel;
380 /* Command FIFO */
381 uint8_t fifo[FD_SECTOR_LEN];
382 uint32_t data_pos;
383 uint32_t data_len;
384 uint8_t data_state;
385 uint8_t data_dir;
386 uint8_t int_status;
890fa6be 387 uint8_t eot; /* last wanted sector */
8977f3c1
FB		 388 /* States kept only to be returned back */
389 /* Timers state */
390 uint8_t timer0;
391 uint8_t timer1;
392 /* precompensation */
393 uint8_t precomp_trk;
394 uint8_t config;
395 uint8_t lock;
396 /* Power down config (also with status regB access mode */
397 uint8_t pwrd;
741402f9
BS		 398 /* Sun4m quirks? */
399 int sun;
8977f3c1
FB		 400 /* Floppy drives */
401 fdrive_t drives[2];
baca51fa
FB		 402};
403
404static uint32_t fdctrl_read (void *opaque, uint32_t reg)
405{
406 fdctrl_t *fdctrl = opaque;
407 uint32_t retval;
408
a541f297 409 switch (reg & 0x07) {
6f7e9aec 410 case 0x00:
741402f9
BS		 411 if (fdctrl->sun) {
412 // Identify to Linux as S82078B
413 retval = fdctrl_read_statusB(fdctrl);
414 } else {
415 retval = (uint32_t)(-1);
416 }
6f7e9aec 417 break;
a541f297 418 case 0x01:
baca51fa 419 retval = fdctrl_read_statusB(fdctrl);
a541f297
FB		 420 break;
421 case 0x02:
baca51fa 422 retval = fdctrl_read_dor(fdctrl);
a541f297
FB		 423 break;
424 case 0x03:
baca51fa 425 retval = fdctrl_read_tape(fdctrl);
a541f297
FB		 426 break;
427 case 0x04:
baca51fa 428 retval = fdctrl_read_main_status(fdctrl);
a541f297
FB		 429 break;
430 case 0x05:
baca51fa 431 retval = fdctrl_read_data(fdctrl);
a541f297
FB		 432 break;
433 case 0x07:
baca51fa 434 retval = fdctrl_read_dir(fdctrl);
a541f297
FB		 435 break;
436 default:
baca51fa 437 retval = (uint32_t)(-1);
a541f297
FB		 438 break;
439 }
ed5fd2cc 440 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
baca51fa
FB		 441
442 return retval;
443}
444
445static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
446{
447 fdctrl_t *fdctrl = opaque;
448
ed5fd2cc
FB		 449 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
450
a541f297
FB		 451 switch (reg & 0x07) {
452 case 0x02:
baca51fa 453 fdctrl_write_dor(fdctrl, value);
a541f297
FB		 454 break;
455 case 0x03:
baca51fa 456 fdctrl_write_tape(fdctrl, value);
a541f297
FB		 457 break;
458 case 0x04:
baca51fa 459 fdctrl_write_rate(fdctrl, value);
a541f297
FB		 460 break;
461 case 0x05:
baca51fa 462 fdctrl_write_data(fdctrl, value);
a541f297
FB		 463 break;
464 default:
465 break;
466 }
baca51fa
FB		 467}
468
62a46c61
FB		 469static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
470{
5dcb6b91 471 return fdctrl_read(opaque, (uint32_t)reg);
62a46c61
FB		 472}
473
5fafdf24 474static void fdctrl_write_mem (void *opaque,
62a46c61
FB		 475 target_phys_addr_t reg, uint32_t value)
476{
5dcb6b91 477 fdctrl_write(opaque, (uint32_t)reg, value);
62a46c61
FB		 478}
479
e80cfcfc 480static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
62a46c61
FB		 481 fdctrl_read_mem,
482 fdctrl_read_mem,
483 fdctrl_read_mem,
e80cfcfc
FB		 484};
485
486static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
62a46c61
FB		 487 fdctrl_write_mem,
488 fdctrl_write_mem,
489 fdctrl_write_mem,
e80cfcfc
FB		 490};
491
3ccacc4a
BS		 492static void fd_save (QEMUFile *f, fdrive_t *fd)
493{
494 uint8_t tmp;
495
496 tmp = fd->drflags;
497 qemu_put_8s(f, &tmp);
498 qemu_put_8s(f, &fd->head);
499 qemu_put_8s(f, &fd->track);
500 qemu_put_8s(f, &fd->sect);
501 qemu_put_8s(f, &fd->dir);
502 qemu_put_8s(f, &fd->rw);
503}
504
505static void fdc_save (QEMUFile *f, void *opaque)
506{
507 fdctrl_t *s = opaque;
508
509 qemu_put_8s(f, &s->state);
510 qemu_put_8s(f, &s->dma_en);
511 qemu_put_8s(f, &s->cur_drv);
512 qemu_put_8s(f, &s->bootsel);
513 qemu_put_buffer(f, s->fifo, FD_SECTOR_LEN);
514 qemu_put_be32s(f, &s->data_pos);
515 qemu_put_be32s(f, &s->data_len);
516 qemu_put_8s(f, &s->data_state);
517 qemu_put_8s(f, &s->data_dir);
518 qemu_put_8s(f, &s->int_status);
519 qemu_put_8s(f, &s->eot);
520 qemu_put_8s(f, &s->timer0);
521 qemu_put_8s(f, &s->timer1);
522 qemu_put_8s(f, &s->precomp_trk);
523 qemu_put_8s(f, &s->config);
524 qemu_put_8s(f, &s->lock);
525 qemu_put_8s(f, &s->pwrd);
526 fd_save(f, &s->drives[0]);
527 fd_save(f, &s->drives[1]);
528}
529
530static int fd_load (QEMUFile *f, fdrive_t *fd)
531{
532 uint8_t tmp;
533
534 qemu_get_8s(f, &tmp);
535 fd->drflags = tmp;
536 qemu_get_8s(f, &fd->head);
537 qemu_get_8s(f, &fd->track);
538 qemu_get_8s(f, &fd->sect);
539 qemu_get_8s(f, &fd->dir);
540 qemu_get_8s(f, &fd->rw);
541
542 return 0;
543}
544
545static int fdc_load (QEMUFile *f, void *opaque, int version_id)
546{
547 fdctrl_t *s = opaque;
548 int ret;
549
550 if (version_id != 1)
551 return -EINVAL;
552
553 qemu_get_8s(f, &s->state);
554 qemu_get_8s(f, &s->dma_en);
555 qemu_get_8s(f, &s->cur_drv);
556 qemu_get_8s(f, &s->bootsel);
557 qemu_get_buffer(f, s->fifo, FD_SECTOR_LEN);
558 qemu_get_be32s(f, &s->data_pos);
559 qemu_get_be32s(f, &s->data_len);
560 qemu_get_8s(f, &s->data_state);
561 qemu_get_8s(f, &s->data_dir);
562 qemu_get_8s(f, &s->int_status);
563 qemu_get_8s(f, &s->eot);
564 qemu_get_8s(f, &s->timer0);
565 qemu_get_8s(f, &s->timer1);
566 qemu_get_8s(f, &s->precomp_trk);
567 qemu_get_8s(f, &s->config);
568 qemu_get_8s(f, &s->lock);
569 qemu_get_8s(f, &s->pwrd);
570
571 ret = fd_load(f, &s->drives[0]);
572 if (ret == 0)
573 ret = fd_load(f, &s->drives[1]);
574
575 return ret;
576}
577
578static void fdctrl_external_reset(void *opaque)
579{
580 fdctrl_t *s = opaque;
581
582 fdctrl_reset(s, 0);
583}
584
5fafdf24 585fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
5dcb6b91 586 target_phys_addr_t io_base,
baca51fa 587 BlockDriverState **fds)
8977f3c1 588{
baca51fa 589 fdctrl_t *fdctrl;
e80cfcfc 590 int io_mem;
8977f3c1
FB		 591 int i;
592
4b19ec0c 593 FLOPPY_DPRINTF("init controller\n");
baca51fa
FB		 594 fdctrl = qemu_mallocz(sizeof(fdctrl_t));
595 if (!fdctrl)
596 return NULL;
5fafdf24 597 fdctrl->result_timer = qemu_new_timer(vm_clock,
ed5fd2cc
FB		 598 fdctrl_result_timer, fdctrl);
599
4b19ec0c 600 fdctrl->version = 0x90; /* Intel 82078 controller */
d537cf6c 601 fdctrl->irq = irq;
baca51fa
FB		 602 fdctrl->dma_chann = dma_chann;
603 fdctrl->io_base = io_base;
a541f297 604 fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */
741402f9 605 fdctrl->sun = 0;
baca51fa
FB		 606 if (fdctrl->dma_chann != -1) {
607 fdctrl->dma_en = 1;
608 DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
8977f3c1 609 } else {
baca51fa 610 fdctrl->dma_en = 0;
8977f3c1 611 }
baca51fa
FB		 612 for (i = 0; i < 2; i++) {
613 fd_init(&fdctrl->drives[i], fds[i]);
caed8802 614 }
baca51fa
FB		 615 fdctrl_reset(fdctrl, 0);
616 fdctrl->state = FD_CTRL_ACTIVE;
8977f3c1 617 if (mem_mapped) {
e80cfcfc
FB		 618 io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write, fdctrl);
619 cpu_register_physical_memory(io_base, 0x08, io_mem);
8977f3c1 620 } else {
5dcb6b91
BS		 621 register_ioport_read((uint32_t)io_base + 0x01, 5, 1, &fdctrl_read,
622 fdctrl);
623 register_ioport_read((uint32_t)io_base + 0x07, 1, 1, &fdctrl_read,
624 fdctrl);
625 register_ioport_write((uint32_t)io_base + 0x01, 5, 1, &fdctrl_write,
626 fdctrl);
627 register_ioport_write((uint32_t)io_base + 0x07, 1, 1, &fdctrl_write,
628 fdctrl);
8977f3c1 629 }
3ccacc4a
BS		 630 register_savevm("fdc", io_base, 1, fdc_save, fdc_load, fdctrl);
631 qemu_register_reset(fdctrl_external_reset, fdctrl);
a541f297 632 for (i = 0; i < 2; i++) {
baca51fa 633 fd_revalidate(&fdctrl->drives[i]);
8977f3c1 634 }
a541f297 635
baca51fa 636 return fdctrl;
caed8802 637}
8977f3c1 638
741402f9
BS		 639fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
640 BlockDriverState **fds)
641{
642 fdctrl_t *fdctrl;
643
644 fdctrl = fdctrl_init(irq, 0, 1, io_base, fds);
645 fdctrl->sun = 1;
646
647 return fdctrl;
648}
649
baca51fa
FB		 650/* XXX: may change if moved to bdrv */
651int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num)
caed8802 652{
baca51fa 653 return fdctrl->drives[drive_num].drive;
8977f3c1
FB		 654}
655
656/* Change IRQ state */
baca51fa 657static void fdctrl_reset_irq (fdctrl_t *fdctrl)
8977f3c1 658{
ed5fd2cc 659 FLOPPY_DPRINTF("Reset interrupt\n");
d537cf6c 660 qemu_set_irq(fdctrl->irq, 0);
ed5fd2cc 661 fdctrl->state &= ~FD_CTRL_INTR;
8977f3c1
FB		 662}
663
baca51fa 664static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status)
8977f3c1 665{
6f7e9aec 666 // Sparc mutation
741402f9 667 if (fdctrl->sun && !fdctrl->dma_en) {
6f7e9aec
FB		 668 fdctrl->state &= ~FD_CTRL_BUSY;
669 fdctrl->int_status = status;
670 return;
671 }
baca51fa 672 if (~(fdctrl->state & FD_CTRL_INTR)) {
d537cf6c 673 qemu_set_irq(fdctrl->irq, 1);
baca51fa 674 fdctrl->state |= FD_CTRL_INTR;
8977f3c1
FB		 675 }
676 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
baca51fa 677 fdctrl->int_status = status;
8977f3c1
FB		 678}
679
4b19ec0c 680/* Reset controller */
baca51fa 681static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
8977f3c1
FB		 682{
683 int i;
684
4b19ec0c 685 FLOPPY_DPRINTF("reset controller\n");
baca51fa 686 fdctrl_reset_irq(fdctrl);
4b19ec0c 687 /* Initialise controller */
baca51fa 688 fdctrl->cur_drv = 0;
8977f3c1 689 /* FIFO state */
baca51fa
FB		 690 fdctrl->data_pos = 0;
691 fdctrl->data_len = 0;
692 fdctrl->data_state = FD_STATE_CMD;
693 fdctrl->data_dir = FD_DIR_WRITE;
8977f3c1 694 for (i = 0; i < MAX_FD; i++)
baca51fa
FB		 695 fd_reset(&fdctrl->drives[i]);
696 fdctrl_reset_fifo(fdctrl);
8977f3c1 697 if (do_irq)
ed5fd2cc 698 fdctrl_raise_irq(fdctrl, 0xc0);
baca51fa
FB		 699}
700
701static inline fdrive_t *drv0 (fdctrl_t *fdctrl)
702{
703 return &fdctrl->drives[fdctrl->bootsel];
704}
705
706static inline fdrive_t *drv1 (fdctrl_t *fdctrl)
707{
708 return &fdctrl->drives[1 - fdctrl->bootsel];
709}
710
711static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
712{
713 return fdctrl->cur_drv == 0 ? drv0(fdctrl) : drv1(fdctrl);
8977f3c1
FB		 714}
715
716/* Status B register : 0x01 (read-only) */
baca51fa 717static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
8977f3c1 718{
8977f3c1 719 FLOPPY_DPRINTF("status register: 0x00\n");
8977f3c1
FB		 720 return 0;
721}
722
723/* Digital output register : 0x02 */
baca51fa 724static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
8977f3c1 725{
8977f3c1
FB		 726 uint32_t retval = 0;
727
8977f3c1 728 /* Drive motors state indicators */
baca51fa
FB		 729 if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
730 retval |= 1 << 5;
731 if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
732 retval |= 1 << 4;
8977f3c1 733 /* DMA enable */
baca51fa 734 retval |= fdctrl->dma_en << 3;
8977f3c1 735 /* Reset indicator */
baca51fa 736 retval |= (fdctrl->state & FD_CTRL_RESET) == 0 ? 0x04 : 0;
8977f3c1 737 /* Selected drive */
baca51fa 738 retval |= fdctrl->cur_drv;
8977f3c1
FB		 739 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
740
741 return retval;
742}
743
baca51fa 744static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
8977f3c1 745{
8977f3c1 746 /* Reset mode */
baca51fa 747 if (fdctrl->state & FD_CTRL_RESET) {
8977f3c1 748 if (!(value & 0x04)) {
4b19ec0c 749 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 750 return;
751 }
752 }
753 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
754 /* Drive motors state indicators */
755 if (value & 0x20)
baca51fa 756 fd_start(drv1(fdctrl));
8977f3c1 757 else
baca51fa 758 fd_stop(drv1(fdctrl));
8977f3c1 759 if (value & 0x10)
baca51fa 760 fd_start(drv0(fdctrl));
8977f3c1 761 else
baca51fa 762 fd_stop(drv0(fdctrl));
8977f3c1
FB		 763 /* DMA enable */
764#if 0
baca51fa
FB		 765 if (fdctrl->dma_chann != -1)
766 fdctrl->dma_en = 1 - ((value >> 3) & 1);
8977f3c1
FB		 767#endif
768 /* Reset */
769 if (!(value & 0x04)) {
baca51fa 770 if (!(fdctrl->state & FD_CTRL_RESET)) {
4b19ec0c 771 FLOPPY_DPRINTF("controller enter RESET state\n");
baca51fa 772 fdctrl->state |= FD_CTRL_RESET;
8977f3c1
FB		 773 }
774 } else {
baca51fa 775 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 776 FLOPPY_DPRINTF("controller out of RESET state\n");
fb6cf1d0 777 fdctrl_reset(fdctrl, 1);
baca51fa 778 fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
8977f3c1
FB		 779 }
780 }
781 /* Selected drive */
baca51fa 782 fdctrl->cur_drv = value & 1;
8977f3c1
FB		 783}
784
785/* Tape drive register : 0x03 */
baca51fa 786static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
8977f3c1
FB		 787{
788 uint32_t retval = 0;
789
8977f3c1 790 /* Disk boot selection indicator */
baca51fa 791 retval |= fdctrl->bootsel << 2;
8977f3c1
FB		 792 /* Tape indicators: never allowed */
793 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
794
795 return retval;
796}
797
baca51fa 798static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
8977f3c1 799{
8977f3c1 800 /* Reset mode */
baca51fa 801 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 802 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 803 return;
804 }
805 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
806 /* Disk boot selection indicator */
baca51fa 807 fdctrl->bootsel = (value >> 2) & 1;
8977f3c1
FB		 808 /* Tape indicators: never allow */
809}
810
811/* Main status register : 0x04 (read) */
baca51fa 812static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
8977f3c1
FB		 813{
814 uint32_t retval = 0;
815
baca51fa
FB		 816 fdctrl->state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET);
817 if (!(fdctrl->state & FD_CTRL_BUSY)) {
8977f3c1
FB		 818 /* Data transfer allowed */
819 retval |= 0x80;
820 /* Data transfer direction indicator */
baca51fa 821 if (fdctrl->data_dir == FD_DIR_READ)
8977f3c1
FB		 822 retval |= 0x40;
823 }
824 /* Should handle 0x20 for SPECIFY command */
825 /* Command busy indicator */
baca51fa
FB		 826 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA ||
827 FD_STATE(fdctrl->data_state) == FD_STATE_STATUS)
8977f3c1
FB		 828 retval |= 0x10;
829 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
830
831 return retval;
832}
833
834/* Data select rate register : 0x04 (write) */
baca51fa 835static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
8977f3c1 836{
8977f3c1 837 /* Reset mode */
baca51fa 838 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 839 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 840 return;
841 }
8977f3c1
FB		 842 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
843 /* Reset: autoclear */
844 if (value & 0x80) {
baca51fa
FB		 845 fdctrl->state |= FD_CTRL_RESET;
846 fdctrl_reset(fdctrl, 1);
847 fdctrl->state &= ~FD_CTRL_RESET;
8977f3c1
FB		 848 }
849 if (value & 0x40) {
baca51fa
FB		 850 fdctrl->state |= FD_CTRL_SLEEP;
851 fdctrl_reset(fdctrl, 1);
8977f3c1
FB		 852 }
853// fdctrl.precomp = (value >> 2) & 0x07;
854}
855
ea185bbd
FB		 856static int fdctrl_media_changed(fdrive_t *drv)
857{
858 int ret;
5fafdf24 859 if (!drv->bs)
ea185bbd
FB		 860 return 0;
861 ret = bdrv_media_changed(drv->bs);
862 if (ret) {
863 fd_revalidate(drv);
864 }
865 return ret;
866}
867
8977f3c1 868/* Digital input register : 0x07 (read-only) */
baca51fa 869static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
8977f3c1 870{
8977f3c1
FB		 871 uint32_t retval = 0;
872
ea185bbd
FB		 873 if (fdctrl_media_changed(drv0(fdctrl)) ||
874 fdctrl_media_changed(drv1(fdctrl)))
8977f3c1
FB		 875 retval |= 0x80;
876 if (retval != 0)
baca51fa 877 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
8977f3c1
FB		 878
879 return retval;
880}
881
882/* FIFO state control */
baca51fa 883static void fdctrl_reset_fifo (fdctrl_t *fdctrl)
8977f3c1 884{
baca51fa
FB		 885 fdctrl->data_dir = FD_DIR_WRITE;
886 fdctrl->data_pos = 0;
887 FD_SET_STATE(fdctrl->data_state, FD_STATE_CMD);
8977f3c1
FB		 888}
889
890/* Set FIFO status for the host to read */
baca51fa 891static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq)
8977f3c1 892{
baca51fa
FB		 893 fdctrl->data_dir = FD_DIR_READ;
894 fdctrl->data_len = fifo_len;
895 fdctrl->data_pos = 0;
896 FD_SET_STATE(fdctrl->data_state, FD_STATE_STATUS);
8977f3c1 897 if (do_irq)
baca51fa 898 fdctrl_raise_irq(fdctrl, 0x00);
8977f3c1
FB		 899}
900
901/* Set an error: unimplemented/unknown command */
baca51fa 902static void fdctrl_unimplemented (fdctrl_t *fdctrl)
8977f3c1
FB		 903{
904#if 0
baca51fa
FB		 905 fdrive_t *cur_drv;
906
907 cur_drv = get_cur_drv(fdctrl);
890fa6be 908 fdctrl->fifo[0] = 0x60 | (cur_drv->head << 2) | fdctrl->cur_drv;
baca51fa
FB		 909 fdctrl->fifo[1] = 0x00;
910 fdctrl->fifo[2] = 0x00;
911 fdctrl_set_fifo(fdctrl, 3, 1);
8977f3c1 912#else
baca51fa
FB		 913 // fdctrl_reset_fifo(fdctrl);
914 fdctrl->fifo[0] = 0x80;
915 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 916#endif
917}
918
919/* Callback for transfer end (stop or abort) */
baca51fa
FB		 920static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0,
921 uint8_t status1, uint8_t status2)
8977f3c1 922{
baca51fa 923 fdrive_t *cur_drv;
8977f3c1 924
baca51fa 925 cur_drv = get_cur_drv(fdctrl);
8977f3c1
FB		 926 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
927 status0, status1, status2,
890fa6be
FB		 928 status0 | (cur_drv->head << 2) | fdctrl->cur_drv);
929 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | fdctrl->cur_drv;
baca51fa
FB		 930 fdctrl->fifo[1] = status1;
931 fdctrl->fifo[2] = status2;
932 fdctrl->fifo[3] = cur_drv->track;
933 fdctrl->fifo[4] = cur_drv->head;
934 fdctrl->fifo[5] = cur_drv->sect;
935 fdctrl->fifo[6] = FD_SECTOR_SC;
936 fdctrl->data_dir = FD_DIR_READ;
ed5fd2cc 937 if (fdctrl->state & FD_CTRL_BUSY) {
baca51fa 938 DMA_release_DREQ(fdctrl->dma_chann);
ed5fd2cc
FB		 939 fdctrl->state &= ~FD_CTRL_BUSY;
940 }
baca51fa 941 fdctrl_set_fifo(fdctrl, 7, 1);
8977f3c1
FB		 942}
943
944/* Prepare a data transfer (either DMA or FIFO) */
baca51fa 945static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
8977f3c1 946{
baca51fa 947 fdrive_t *cur_drv;
8977f3c1
FB		 948 uint8_t kh, kt, ks;
949 int did_seek;
950
baca51fa
FB		 951 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
952 cur_drv = get_cur_drv(fdctrl);
953 kt = fdctrl->fifo[2];
954 kh = fdctrl->fifo[3];
955 ks = fdctrl->fifo[4];
4b19ec0c 956 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
baca51fa 957 fdctrl->cur_drv, kh, kt, ks,
8977f3c1
FB		 958 _fd_sector(kh, kt, ks, cur_drv->last_sect));
959 did_seek = 0;
baca51fa 960 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
8977f3c1
FB		 961 case 2:
962 /* sect too big */
baca51fa
FB		 963 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
964 fdctrl->fifo[3] = kt;
965 fdctrl->fifo[4] = kh;
966 fdctrl->fifo[5] = ks;
8977f3c1
FB		 967 return;
968 case 3:
969 /* track too big */
baca51fa
FB		 970 fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00);
971 fdctrl->fifo[3] = kt;
972 fdctrl->fifo[4] = kh;
973 fdctrl->fifo[5] = ks;
8977f3c1
FB		 974 return;
975 case 4:
976 /* No seek enabled */
baca51fa
FB		 977 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
978 fdctrl->fifo[3] = kt;
979 fdctrl->fifo[4] = kh;
980 fdctrl->fifo[5] = ks;
8977f3c1
FB		 981 return;
982 case 1:
983 did_seek = 1;
984 break;
985 default:
986 break;
987 }
988 /* Set the FIFO state */
baca51fa
FB		 989 fdctrl->data_dir = direction;
990 fdctrl->data_pos = 0;
991 FD_SET_STATE(fdctrl->data_state, FD_STATE_DATA); /* FIFO ready for data */
992 if (fdctrl->fifo[0] & 0x80)
993 fdctrl->data_state |= FD_STATE_MULTI;
994 else
995 fdctrl->data_state &= ~FD_STATE_MULTI;
8977f3c1 996 if (did_seek)
baca51fa
FB		 997 fdctrl->data_state |= FD_STATE_SEEK;
998 else
999 fdctrl->data_state &= ~FD_STATE_SEEK;
1000 if (fdctrl->fifo[5] == 00) {
1001 fdctrl->data_len = fdctrl->fifo[8];
1002 } else {
1003 int tmp;
3bcb80f1 1004 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
baca51fa
FB		 1005 tmp = (cur_drv->last_sect - ks + 1);
1006 if (fdctrl->fifo[0] & 0x80)
1007 tmp += cur_drv->last_sect;
1008 fdctrl->data_len *= tmp;
1009 }
890fa6be 1010 fdctrl->eot = fdctrl->fifo[6];
baca51fa 1011 if (fdctrl->dma_en) {
8977f3c1
FB		 1012 int dma_mode;
1013 /* DMA transfer are enabled. Check if DMA channel is well programmed */
baca51fa 1014 dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
8977f3c1 1015 dma_mode = (dma_mode >> 2) & 3;
baca51fa
FB		 1016 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1017 dma_mode, direction,
1018 (128 << fdctrl->fifo[5]) *
1019 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
8977f3c1
FB		 1020 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1021 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1022 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1023 (direction == FD_DIR_READ && dma_mode == 1)) {
1024 /* No access is allowed until DMA transfer has completed */
baca51fa 1025 fdctrl->state |= FD_CTRL_BUSY;
4b19ec0c 1026 /* Now, we just have to wait for the DMA controller to
8977f3c1
FB		 1027 * recall us...
1028 */
baca51fa
FB		 1029 DMA_hold_DREQ(fdctrl->dma_chann);
1030 DMA_schedule(fdctrl->dma_chann);
8977f3c1 1031 return;
baca51fa
FB		 1032 } else {
1033 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
8977f3c1
FB		 1034 }
1035 }
1036 FLOPPY_DPRINTF("start non-DMA transfer\n");
1037 /* IO based transfer: calculate len */
baca51fa 1038 fdctrl_raise_irq(fdctrl, 0x00);
8977f3c1
FB		 1039
1040 return;
1041}
1042
1043/* Prepare a transfer of deleted data */
baca51fa 1044static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
8977f3c1
FB		 1045{
1046 /* We don't handle deleted data,
1047 * so we don't return *ANYTHING*
1048 */
baca51fa 1049 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
8977f3c1
FB		 1050}
1051
1052/* handlers for DMA transfers */
85571bc7
FB		 1053static int fdctrl_transfer_handler (void *opaque, int nchan,
1054 int dma_pos, int dma_len)
8977f3c1 1055{
baca51fa
FB		 1056 fdctrl_t *fdctrl;
1057 fdrive_t *cur_drv;
1058 int len, start_pos, rel_pos;
8977f3c1
FB		 1059 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1060
baca51fa 1061 fdctrl = opaque;
baca51fa 1062 if (!(fdctrl->state & FD_CTRL_BUSY)) {
8977f3c1
FB		 1063 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1064 return 0;
1065 }
baca51fa
FB		 1066 cur_drv = get_cur_drv(fdctrl);
1067 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1068 fdctrl->data_dir == FD_DIR_SCANH)
8977f3c1 1069 status2 = 0x04;
85571bc7
FB		 1070 if (dma_len > fdctrl->data_len)
1071 dma_len = fdctrl->data_len;
890fa6be 1072 if (cur_drv->bs == NULL) {
baca51fa
FB		 1073 if (fdctrl->data_dir == FD_DIR_WRITE)
1074 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1075 else
1076 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1077 len = 0;
890fa6be
FB		 1078 goto transfer_error;
1079 }
baca51fa 1080 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
85571bc7
FB		 1081 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1082 len = dma_len - fdctrl->data_pos;
baca51fa
FB		 1083 if (len + rel_pos > FD_SECTOR_LEN)
1084 len = FD_SECTOR_LEN - rel_pos;
6f7e9aec
FB		 1085 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1086 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
baca51fa
FB		 1087 fdctrl->data_len, fdctrl->cur_drv, cur_drv->head,
1088 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
6f7e9aec 1089 fd_sector(cur_drv) * 512);
baca51fa
FB		 1090 if (fdctrl->data_dir != FD_DIR_WRITE ||
1091 len < FD_SECTOR_LEN || rel_pos != 0) {
1092 /* READ & SCAN commands and realign to a sector for WRITE */
1093 if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1094 fdctrl->fifo, 1) < 0) {
8977f3c1
FB		 1095 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1096 fd_sector(cur_drv));
1097 /* Sure, image size is too small... */
baca51fa 1098 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
8977f3c1 1099 }
890fa6be 1100 }
baca51fa
FB		 1101 switch (fdctrl->data_dir) {
1102 case FD_DIR_READ:
1103 /* READ commands */
85571bc7
FB		 1104 DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1105 fdctrl->data_pos, len);
1106/* cpu_physical_memory_write(addr + fdctrl->data_pos, */
1107/* fdctrl->fifo + rel_pos, len); */
baca51fa
FB		 1108 break;
1109 case FD_DIR_WRITE:
1110 /* WRITE commands */
85571bc7
FB		 1111 DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1112 fdctrl->data_pos, len);
1113/* cpu_physical_memory_read(addr + fdctrl->data_pos, */
1114/* fdctrl->fifo + rel_pos, len); */
baca51fa
FB		 1115 if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1116 fdctrl->fifo, 1) < 0) {
1117 FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
1118 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1119 goto transfer_error;
890fa6be 1120 }
baca51fa
FB		 1121 break;
1122 default:
1123 /* SCAN commands */
1124 {
1125 uint8_t tmpbuf[FD_SECTOR_LEN];
1126 int ret;
85571bc7
FB		 1127 DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1128/* cpu_physical_memory_read(addr + fdctrl->data_pos, */
1129/* tmpbuf, len); */
baca51fa 1130 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
8977f3c1
FB		 1131 if (ret == 0) {
1132 status2 = 0x08;
1133 goto end_transfer;
1134 }
baca51fa
FB		 1135 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1136 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
8977f3c1
FB		 1137 status2 = 0x00;
1138 goto end_transfer;
1139 }
1140 }
baca51fa 1141 break;
8977f3c1 1142 }
baca51fa
FB		 1143 fdctrl->data_pos += len;
1144 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1145 if (rel_pos == 0) {
8977f3c1 1146 /* Seek to next sector */
baca51fa
FB		 1147 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d) (%d)\n",
1148 cur_drv->head, cur_drv->track, cur_drv->sect,
1149 fd_sector(cur_drv),
6f7e9aec 1150 fdctrl->data_pos - len);
890fa6be
FB		 1151 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1152 error in fact */
1153 if (cur_drv->sect >= cur_drv->last_sect ||
1154 cur_drv->sect == fdctrl->eot) {
baca51fa
FB		 1155 cur_drv->sect = 1;
1156 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1157 if (cur_drv->head == 0 &&
5fafdf24 1158 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
890fa6be
FB		 1159 cur_drv->head = 1;
1160 } else {
1161 cur_drv->head = 0;
baca51fa
FB		 1162 cur_drv->track++;
1163 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1164 break;
890fa6be
FB		 1165 }
1166 } else {
1167 cur_drv->track++;
1168 break;
8977f3c1 1169 }
baca51fa
FB		 1170 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1171 cur_drv->head, cur_drv->track,
1172 cur_drv->sect, fd_sector(cur_drv));
890fa6be
FB		 1173 } else {
1174 cur_drv->sect++;
8977f3c1
FB		 1175 }
1176 }
1177 }
1178end_transfer:
baca51fa
FB		 1179 len = fdctrl->data_pos - start_pos;
1180 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1181 fdctrl->data_pos, len, fdctrl->data_len);
1182 if (fdctrl->data_dir == FD_DIR_SCANE ||
1183 fdctrl->data_dir == FD_DIR_SCANL ||
1184 fdctrl->data_dir == FD_DIR_SCANH)
8977f3c1 1185 status2 = 0x08;
baca51fa 1186 if (FD_DID_SEEK(fdctrl->data_state))
8977f3c1 1187 status0 |= 0x20;
baca51fa
FB		 1188 fdctrl->data_len -= len;
1189 // if (fdctrl->data_len == 0)
890fa6be 1190 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
8977f3c1
FB		 1191transfer_error:
1192
baca51fa 1193 return len;
8977f3c1
FB		 1194}
1195
8977f3c1 1196/* Data register : 0x05 */
baca51fa 1197static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
8977f3c1 1198{
baca51fa 1199 fdrive_t *cur_drv;
8977f3c1
FB		 1200 uint32_t retval = 0;
1201 int pos, len;
1202
baca51fa
FB		 1203 cur_drv = get_cur_drv(fdctrl);
1204 fdctrl->state &= ~FD_CTRL_SLEEP;
1205 if (FD_STATE(fdctrl->data_state) == FD_STATE_CMD) {
8977f3c1
FB		 1206 FLOPPY_ERROR("can't read data in CMD state\n");
1207 return 0;
1208 }
baca51fa
FB		 1209 pos = fdctrl->data_pos;
1210 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
8977f3c1
FB		 1211 pos %= FD_SECTOR_LEN;
1212 if (pos == 0) {
baca51fa 1213 len = fdctrl->data_len - fdctrl->data_pos;
8977f3c1
FB		 1214 if (len > FD_SECTOR_LEN)
1215 len = FD_SECTOR_LEN;
1216 bdrv_read(cur_drv->bs, fd_sector(cur_drv),
baca51fa 1217 fdctrl->fifo, len);
8977f3c1
FB		 1218 }
1219 }
baca51fa
FB		 1220 retval = fdctrl->fifo[pos];
1221 if (++fdctrl->data_pos == fdctrl->data_len) {
1222 fdctrl->data_pos = 0;
890fa6be 1223 /* Switch from transfer mode to status mode
8977f3c1
FB		 1224 * then from status mode to command mode
1225 */
ed5fd2cc 1226 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
baca51fa 1227 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
ed5fd2cc 1228 } else {
baca51fa 1229 fdctrl_reset_fifo(fdctrl);
ed5fd2cc
FB		 1230 fdctrl_reset_irq(fdctrl);
1231 }
8977f3c1
FB		 1232 }
1233 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1234
1235 return retval;
1236}
1237
baca51fa 1238static void fdctrl_format_sector (fdctrl_t *fdctrl)
8977f3c1 1239{
baca51fa
FB		 1240 fdrive_t *cur_drv;
1241 uint8_t kh, kt, ks;
1242 int did_seek;
8977f3c1 1243
baca51fa
FB		 1244 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1245 cur_drv = get_cur_drv(fdctrl);
1246 kt = fdctrl->fifo[6];
1247 kh = fdctrl->fifo[7];
1248 ks = fdctrl->fifo[8];
1249 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1250 fdctrl->cur_drv, kh, kt, ks,
1251 _fd_sector(kh, kt, ks, cur_drv->last_sect));
1252 did_seek = 0;
1253 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
1254 case 2:
1255 /* sect too big */
1256 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1257 fdctrl->fifo[3] = kt;
1258 fdctrl->fifo[4] = kh;
1259 fdctrl->fifo[5] = ks;
1260 return;
1261 case 3:
1262 /* track too big */
1263 fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00);
1264 fdctrl->fifo[3] = kt;
1265 fdctrl->fifo[4] = kh;
1266 fdctrl->fifo[5] = ks;
1267 return;
1268 case 4:
1269 /* No seek enabled */
1270 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1271 fdctrl->fifo[3] = kt;
1272 fdctrl->fifo[4] = kh;
1273 fdctrl->fifo[5] = ks;
1274 return;
1275 case 1:
1276 did_seek = 1;
1277 fdctrl->data_state |= FD_STATE_SEEK;
1278 break;
1279 default:
1280 break;
1281 }
1282 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1283 if (cur_drv->bs == NULL ||
1284 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
37a4c539 1285 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
baca51fa
FB		 1286 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1287 } else {
1288 if (cur_drv->sect == cur_drv->last_sect) {
1289 fdctrl->data_state &= ~FD_STATE_FORMAT;
1290 /* Last sector done */
1291 if (FD_DID_SEEK(fdctrl->data_state))
1292 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
1293 else
1294 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1295 } else {
1296 /* More to do */
1297 fdctrl->data_pos = 0;
1298 fdctrl->data_len = 4;
1299 }
1300 }
1301}
1302
1303static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1304{
1305 fdrive_t *cur_drv;
1306
baca51fa 1307 cur_drv = get_cur_drv(fdctrl);
8977f3c1 1308 /* Reset mode */
baca51fa 1309 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 1310 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 1311 return;
1312 }
baca51fa
FB		 1313 fdctrl->state &= ~FD_CTRL_SLEEP;
1314 if (FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) {
8977f3c1
FB		 1315 FLOPPY_ERROR("can't write data in status mode\n");
1316 return;
1317 }
1318 /* Is it write command time ? */
baca51fa 1319 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
8977f3c1 1320 /* FIFO data write */
baca51fa
FB		 1321 fdctrl->fifo[fdctrl->data_pos++] = value;
1322 if (fdctrl->data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) ||
1323 fdctrl->data_pos == fdctrl->data_len) {
8977f3c1 1324 bdrv_write(cur_drv->bs, fd_sector(cur_drv),
baca51fa 1325 fdctrl->fifo, FD_SECTOR_LEN);
8977f3c1 1326 }
890fa6be 1327 /* Switch from transfer mode to status mode
8977f3c1
FB		 1328 * then from status mode to command mode
1329 */
baca51fa
FB		 1330 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA)
1331 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
8977f3c1
FB		 1332 return;
1333 }
baca51fa 1334 if (fdctrl->data_pos == 0) {
8977f3c1
FB		 1335 /* Command */
1336 switch (value & 0x5F) {
1337 case 0x46:
1338 /* READ variants */
1339 FLOPPY_DPRINTF("READ command\n");
1340 /* 8 parameters cmd */
baca51fa 1341 fdctrl->data_len = 9;
8977f3c1
FB		 1342 goto enqueue;
1343 case 0x4C:
1344 /* READ_DELETED variants */
1345 FLOPPY_DPRINTF("READ_DELETED command\n");
1346 /* 8 parameters cmd */
baca51fa 1347 fdctrl->data_len = 9;
8977f3c1
FB		 1348 goto enqueue;
1349 case 0x50:
1350 /* SCAN_EQUAL variants */
1351 FLOPPY_DPRINTF("SCAN_EQUAL command\n");
1352 /* 8 parameters cmd */
baca51fa 1353 fdctrl->data_len = 9;
8977f3c1
FB		 1354 goto enqueue;
1355 case 0x56:
1356 /* VERIFY variants */
1357 FLOPPY_DPRINTF("VERIFY command\n");
1358 /* 8 parameters cmd */
baca51fa 1359 fdctrl->data_len = 9;
8977f3c1
FB		 1360 goto enqueue;
1361 case 0x59:
1362 /* SCAN_LOW_OR_EQUAL variants */
1363 FLOPPY_DPRINTF("SCAN_LOW_OR_EQUAL command\n");
1364 /* 8 parameters cmd */
baca51fa 1365 fdctrl->data_len = 9;
8977f3c1
FB		 1366 goto enqueue;
1367 case 0x5D:
1368 /* SCAN_HIGH_OR_EQUAL variants */
1369 FLOPPY_DPRINTF("SCAN_HIGH_OR_EQUAL command\n");
1370 /* 8 parameters cmd */
baca51fa 1371 fdctrl->data_len = 9;
8977f3c1
FB		 1372 goto enqueue;
1373 default:
1374 break;
1375 }
1376 switch (value & 0x7F) {
1377 case 0x45:
1378 /* WRITE variants */
1379 FLOPPY_DPRINTF("WRITE command\n");
1380 /* 8 parameters cmd */
baca51fa 1381 fdctrl->data_len = 9;
8977f3c1
FB		 1382 goto enqueue;
1383 case 0x49:
1384 /* WRITE_DELETED variants */
1385 FLOPPY_DPRINTF("WRITE_DELETED command\n");
1386 /* 8 parameters cmd */
baca51fa 1387 fdctrl->data_len = 9;
8977f3c1
FB		 1388 goto enqueue;
1389 default:
1390 break;
1391 }
1392 switch (value) {
1393 case 0x03:
1394 /* SPECIFY */
1395 FLOPPY_DPRINTF("SPECIFY command\n");
1396 /* 1 parameter cmd */
baca51fa 1397 fdctrl->data_len = 3;
8977f3c1
FB		 1398 goto enqueue;
1399 case 0x04:
1400 /* SENSE_DRIVE_STATUS */
1401 FLOPPY_DPRINTF("SENSE_DRIVE_STATUS command\n");
1402 /* 1 parameter cmd */
baca51fa 1403 fdctrl->data_len = 2;
8977f3c1
FB		 1404 goto enqueue;
1405 case 0x07:
1406 /* RECALIBRATE */
1407 FLOPPY_DPRINTF("RECALIBRATE command\n");
1408 /* 1 parameter cmd */
baca51fa 1409 fdctrl->data_len = 2;
8977f3c1
FB		 1410 goto enqueue;
1411 case 0x08:
1412 /* SENSE_INTERRUPT_STATUS */
1413 FLOPPY_DPRINTF("SENSE_INTERRUPT_STATUS command (%02x)\n",
baca51fa 1414 fdctrl->int_status);
8977f3c1 1415 /* No parameters cmd: returns status if no interrupt */
953569d2 1416#if 0
baca51fa
FB		 1417 fdctrl->fifo[0] =
1418 fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv;
953569d2
FB		 1419#else
1420 /* XXX: int_status handling is broken for read/write
1421 commands, so we do this hack. It should be suppressed
1422 ASAP */
1423 fdctrl->fifo[0] =
1424 0x20 | (cur_drv->head << 2) | fdctrl->cur_drv;
1425#endif
baca51fa
FB		 1426 fdctrl->fifo[1] = cur_drv->track;
1427 fdctrl_set_fifo(fdctrl, 2, 0);
1428 fdctrl_reset_irq(fdctrl);
1429 fdctrl->int_status = 0xC0;
8977f3c1
FB		 1430 return;
1431 case 0x0E:
1432 /* DUMPREG */
1433 FLOPPY_DPRINTF("DUMPREG command\n");
1434 /* Drives position */
baca51fa
FB		 1435 fdctrl->fifo[0] = drv0(fdctrl)->track;
1436 fdctrl->fifo[1] = drv1(fdctrl)->track;
1437 fdctrl->fifo[2] = 0;
1438 fdctrl->fifo[3] = 0;
8977f3c1 1439 /* timers */
baca51fa
FB		 1440 fdctrl->fifo[4] = fdctrl->timer0;
1441 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | fdctrl->dma_en;
1442 fdctrl->fifo[6] = cur_drv->last_sect;
1443 fdctrl->fifo[7] = (fdctrl->lock << 7) |
8977f3c1 1444 (cur_drv->perpendicular << 2);
baca51fa
FB		 1445 fdctrl->fifo[8] = fdctrl->config;
1446 fdctrl->fifo[9] = fdctrl->precomp_trk;
1447 fdctrl_set_fifo(fdctrl, 10, 0);
8977f3c1
FB		 1448 return;
1449 case 0x0F:
1450 /* SEEK */
1451 FLOPPY_DPRINTF("SEEK command\n");
1452 /* 2 parameters cmd */
baca51fa 1453 fdctrl->data_len = 3;
8977f3c1
FB		 1454 goto enqueue;
1455 case 0x10:
1456 /* VERSION */
1457 FLOPPY_DPRINTF("VERSION command\n");
1458 /* No parameters cmd */
4b19ec0c 1459 /* Controller's version */
baca51fa
FB		 1460 fdctrl->fifo[0] = fdctrl->version;
1461 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1462 return;
1463 case 0x12:
1464 /* PERPENDICULAR_MODE */
1465 FLOPPY_DPRINTF("PERPENDICULAR_MODE command\n");
1466 /* 1 parameter cmd */
baca51fa 1467 fdctrl->data_len = 2;
8977f3c1
FB		 1468 goto enqueue;
1469 case 0x13:
1470 /* CONFIGURE */
1471 FLOPPY_DPRINTF("CONFIGURE command\n");
1472 /* 3 parameters cmd */
baca51fa 1473 fdctrl->data_len = 4;
8977f3c1
FB		 1474 goto enqueue;
1475 case 0x14:
1476 /* UNLOCK */
1477 FLOPPY_DPRINTF("UNLOCK command\n");
1478 /* No parameters cmd */
baca51fa
FB		 1479 fdctrl->lock = 0;
1480 fdctrl->fifo[0] = 0;
1481 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 1482 return;
1483 case 0x17:
1484 /* POWERDOWN_MODE */
1485 FLOPPY_DPRINTF("POWERDOWN_MODE command\n");
1486 /* 2 parameters cmd */
baca51fa 1487 fdctrl->data_len = 3;
8977f3c1
FB		 1488 goto enqueue;
1489 case 0x18:
1490 /* PART_ID */
1491 FLOPPY_DPRINTF("PART_ID command\n");
1492 /* No parameters cmd */
baca51fa
FB		 1493 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1494 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 1495 return;
1496 case 0x2C:
1497 /* SAVE */
1498 FLOPPY_DPRINTF("SAVE command\n");
1499 /* No parameters cmd */
baca51fa
FB		 1500 fdctrl->fifo[0] = 0;
1501 fdctrl->fifo[1] = 0;
8977f3c1 1502 /* Drives position */
baca51fa
FB		 1503 fdctrl->fifo[2] = drv0(fdctrl)->track;
1504 fdctrl->fifo[3] = drv1(fdctrl)->track;
1505 fdctrl->fifo[4] = 0;
1506 fdctrl->fifo[5] = 0;
8977f3c1 1507 /* timers */
baca51fa
FB		 1508 fdctrl->fifo[6] = fdctrl->timer0;
1509 fdctrl->fifo[7] = fdctrl->timer1;
1510 fdctrl->fifo[8] = cur_drv->last_sect;
1511 fdctrl->fifo[9] = (fdctrl->lock << 7) |
8977f3c1 1512 (cur_drv->perpendicular << 2);
baca51fa
FB		 1513 fdctrl->fifo[10] = fdctrl->config;
1514 fdctrl->fifo[11] = fdctrl->precomp_trk;
1515 fdctrl->fifo[12] = fdctrl->pwrd;
1516 fdctrl->fifo[13] = 0;
1517 fdctrl->fifo[14] = 0;
1518 fdctrl_set_fifo(fdctrl, 15, 1);
8977f3c1
FB		 1519 return;
1520 case 0x33:
1521 /* OPTION */
1522 FLOPPY_DPRINTF("OPTION command\n");
1523 /* 1 parameter cmd */
baca51fa 1524 fdctrl->data_len = 2;
8977f3c1
FB		 1525 goto enqueue;
1526 case 0x42:
1527 /* READ_TRACK */
1528 FLOPPY_DPRINTF("READ_TRACK command\n");
1529 /* 8 parameters cmd */
baca51fa 1530 fdctrl->data_len = 9;
8977f3c1
FB		 1531 goto enqueue;
1532 case 0x4A:
1533 /* READ_ID */
1534 FLOPPY_DPRINTF("READ_ID command\n");
1535 /* 1 parameter cmd */
baca51fa 1536 fdctrl->data_len = 2;
8977f3c1
FB		 1537 goto enqueue;
1538 case 0x4C:
1539 /* RESTORE */
1540 FLOPPY_DPRINTF("RESTORE command\n");
1541 /* 17 parameters cmd */
baca51fa 1542 fdctrl->data_len = 18;
8977f3c1
FB		 1543 goto enqueue;
1544 case 0x4D:
1545 /* FORMAT_TRACK */
1546 FLOPPY_DPRINTF("FORMAT_TRACK command\n");
1547 /* 5 parameters cmd */
baca51fa 1548 fdctrl->data_len = 6;
8977f3c1
FB		 1549 goto enqueue;
1550 case 0x8E:
1551 /* DRIVE_SPECIFICATION_COMMAND */
1552 FLOPPY_DPRINTF("DRIVE_SPECIFICATION_COMMAND command\n");
1553 /* 5 parameters cmd */
baca51fa 1554 fdctrl->data_len = 6;
8977f3c1
FB		 1555 goto enqueue;
1556 case 0x8F:
1557 /* RELATIVE_SEEK_OUT */
1558 FLOPPY_DPRINTF("RELATIVE_SEEK_OUT command\n");
1559 /* 2 parameters cmd */
baca51fa 1560 fdctrl->data_len = 3;
8977f3c1
FB		 1561 goto enqueue;
1562 case 0x94:
1563 /* LOCK */
1564 FLOPPY_DPRINTF("LOCK command\n");
1565 /* No parameters cmd */
baca51fa
FB		 1566 fdctrl->lock = 1;
1567 fdctrl->fifo[0] = 0x10;
1568 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1569 return;
1570 case 0xCD:
1571 /* FORMAT_AND_WRITE */
1572 FLOPPY_DPRINTF("FORMAT_AND_WRITE command\n");
1573 /* 10 parameters cmd */
baca51fa 1574 fdctrl->data_len = 11;
8977f3c1
FB		 1575 goto enqueue;
1576 case 0xCF:
1577 /* RELATIVE_SEEK_IN */
1578 FLOPPY_DPRINTF("RELATIVE_SEEK_IN command\n");
1579 /* 2 parameters cmd */
baca51fa 1580 fdctrl->data_len = 3;
8977f3c1
FB		 1581 goto enqueue;
1582 default:
1583 /* Unknown command */
1584 FLOPPY_ERROR("unknown command: 0x%02x\n", value);
baca51fa 1585 fdctrl_unimplemented(fdctrl);
8977f3c1
FB		 1586 return;
1587 }
1588 }
1589enqueue:
baca51fa
FB		 1590 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1591 fdctrl->fifo[fdctrl->data_pos] = value;
1592 if (++fdctrl->data_pos == fdctrl->data_len) {
8977f3c1
FB		 1593 /* We now have all parameters
1594 * and will be able to treat the command
1595 */
baca51fa
FB		 1596 if (fdctrl->data_state & FD_STATE_FORMAT) {
1597 fdctrl_format_sector(fdctrl);
1598 return;
1599 }
1600 switch (fdctrl->fifo[0] & 0x1F) {
8977f3c1
FB		 1601 case 0x06:
1602 {
1603 /* READ variants */
1604 FLOPPY_DPRINTF("treat READ command\n");
baca51fa 1605 fdctrl_start_transfer(fdctrl, FD_DIR_READ);
8977f3c1
FB		 1606 return;
1607 }
1608 case 0x0C:
1609 /* READ_DELETED variants */
1610// FLOPPY_DPRINTF("treat READ_DELETED command\n");
1611 FLOPPY_ERROR("treat READ_DELETED command\n");
baca51fa 1612 fdctrl_start_transfer_del(fdctrl, FD_DIR_READ);
8977f3c1
FB		 1613 return;
1614 case 0x16:
1615 /* VERIFY variants */
1616// FLOPPY_DPRINTF("treat VERIFY command\n");
1617 FLOPPY_ERROR("treat VERIFY command\n");
baca51fa 1618 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
8977f3c1
FB		 1619 return;
1620 case 0x10:
1621 /* SCAN_EQUAL variants */
1622// FLOPPY_DPRINTF("treat SCAN_EQUAL command\n");
1623 FLOPPY_ERROR("treat SCAN_EQUAL command\n");
baca51fa 1624 fdctrl_start_transfer(fdctrl, FD_DIR_SCANE);
8977f3c1
FB		 1625 return;
1626 case 0x19:
1627 /* SCAN_LOW_OR_EQUAL variants */
1628// FLOPPY_DPRINTF("treat SCAN_LOW_OR_EQUAL command\n");
1629 FLOPPY_ERROR("treat SCAN_LOW_OR_EQUAL command\n");
baca51fa 1630 fdctrl_start_transfer(fdctrl, FD_DIR_SCANL);
8977f3c1
FB		 1631 return;
1632 case 0x1D:
1633 /* SCAN_HIGH_OR_EQUAL variants */
1634// FLOPPY_DPRINTF("treat SCAN_HIGH_OR_EQUAL command\n");
1635 FLOPPY_ERROR("treat SCAN_HIGH_OR_EQUAL command\n");
baca51fa 1636 fdctrl_start_transfer(fdctrl, FD_DIR_SCANH);
8977f3c1
FB		 1637 return;
1638 default:
1639 break;
1640 }
baca51fa 1641 switch (fdctrl->fifo[0] & 0x3F) {
8977f3c1
FB		 1642 case 0x05:
1643 /* WRITE variants */
baca51fa
FB		 1644 FLOPPY_DPRINTF("treat WRITE command (%02x)\n", fdctrl->fifo[0]);
1645 fdctrl_start_transfer(fdctrl, FD_DIR_WRITE);
8977f3c1
FB		 1646 return;
1647 case 0x09:
1648 /* WRITE_DELETED variants */
1649// FLOPPY_DPRINTF("treat WRITE_DELETED command\n");
1650 FLOPPY_ERROR("treat WRITE_DELETED command\n");
baca51fa 1651 fdctrl_start_transfer_del(fdctrl, FD_DIR_WRITE);
8977f3c1
FB		 1652 return;
1653 default:
1654 break;
1655 }
baca51fa 1656 switch (fdctrl->fifo[0]) {
8977f3c1
FB		 1657 case 0x03:
1658 /* SPECIFY */
1659 FLOPPY_DPRINTF("treat SPECIFY command\n");
baca51fa 1660 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
e309de25 1661 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
baca51fa 1662 fdctrl->dma_en = 1 - (fdctrl->fifo[2] & 1) ;
8977f3c1 1663 /* No result back */
baca51fa 1664 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1665 break;
1666 case 0x04:
1667 /* SENSE_DRIVE_STATUS */
1668 FLOPPY_DPRINTF("treat SENSE_DRIVE_STATUS command\n");
baca51fa
FB		 1669 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1670 cur_drv = get_cur_drv(fdctrl);
1671 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
8977f3c1 1672 /* 1 Byte status back */
baca51fa 1673 fdctrl->fifo[0] = (cur_drv->ro << 6) |
8977f3c1 1674 (cur_drv->track == 0 ? 0x10 : 0x00) |
890fa6be
FB		 1675 (cur_drv->head << 2) |
1676 fdctrl->cur_drv |
1677 0x28;
baca51fa 1678 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 1679 break;
1680 case 0x07:
1681 /* RECALIBRATE */
1682 FLOPPY_DPRINTF("treat RECALIBRATE command\n");
baca51fa
FB		 1683 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1684 cur_drv = get_cur_drv(fdctrl);
8977f3c1 1685 fd_recalibrate(cur_drv);
baca51fa 1686 fdctrl_reset_fifo(fdctrl);
8977f3c1 1687 /* Raise Interrupt */
baca51fa 1688 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1689 break;
1690 case 0x0F:
1691 /* SEEK */
1692 FLOPPY_DPRINTF("treat SEEK command\n");
baca51fa
FB		 1693 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1694 cur_drv = get_cur_drv(fdctrl);
1695 fd_start(cur_drv);
1696 if (fdctrl->fifo[2] <= cur_drv->track)
8977f3c1
FB		 1697 cur_drv->dir = 1;
1698 else
1699 cur_drv->dir = 0;
baca51fa
FB		 1700 fdctrl_reset_fifo(fdctrl);
1701 if (fdctrl->fifo[2] > cur_drv->max_track) {
1702 fdctrl_raise_irq(fdctrl, 0x60);
8977f3c1 1703 } else {
baca51fa 1704 cur_drv->track = fdctrl->fifo[2];
8977f3c1 1705 /* Raise Interrupt */
baca51fa 1706 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1707 }
1708 break;
1709 case 0x12:
1710 /* PERPENDICULAR_MODE */
1711 FLOPPY_DPRINTF("treat PERPENDICULAR_MODE command\n");
baca51fa
FB		 1712 if (fdctrl->fifo[1] & 0x80)
1713 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
8977f3c1 1714 /* No result back */
baca51fa 1715 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1716 break;
1717 case 0x13:
1718 /* CONFIGURE */
1719 FLOPPY_DPRINTF("treat CONFIGURE command\n");
baca51fa
FB		 1720 fdctrl->config = fdctrl->fifo[2];
1721 fdctrl->precomp_trk = fdctrl->fifo[3];
8977f3c1 1722 /* No result back */
baca51fa 1723 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1724 break;
1725 case 0x17:
1726 /* POWERDOWN_MODE */
1727 FLOPPY_DPRINTF("treat POWERDOWN_MODE command\n");
baca51fa
FB		 1728 fdctrl->pwrd = fdctrl->fifo[1];
1729 fdctrl->fifo[0] = fdctrl->fifo[1];
1730 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1731 break;
1732 case 0x33:
1733 /* OPTION */
1734 FLOPPY_DPRINTF("treat OPTION command\n");
1735 /* No result back */
baca51fa 1736 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1737 break;
1738 case 0x42:
1739 /* READ_TRACK */
1740// FLOPPY_DPRINTF("treat READ_TRACK command\n");
1741 FLOPPY_ERROR("treat READ_TRACK command\n");
baca51fa 1742 fdctrl_start_transfer(fdctrl, FD_DIR_READ);
8977f3c1
FB		 1743 break;
1744 case 0x4A:
1745 /* READ_ID */
baca51fa 1746 FLOPPY_DPRINTF("treat READ_ID command\n");
ed5fd2cc 1747 /* XXX: should set main status register to busy */
890fa6be 1748 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
5fafdf24 1749 qemu_mod_timer(fdctrl->result_timer,
ed5fd2cc 1750 qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
8977f3c1
FB		 1751 break;
1752 case 0x4C:
1753 /* RESTORE */
1754 FLOPPY_DPRINTF("treat RESTORE command\n");
1755 /* Drives position */
baca51fa
FB		 1756 drv0(fdctrl)->track = fdctrl->fifo[3];
1757 drv1(fdctrl)->track = fdctrl->fifo[4];
8977f3c1 1758 /* timers */
baca51fa
FB		 1759 fdctrl->timer0 = fdctrl->fifo[7];
1760 fdctrl->timer1 = fdctrl->fifo[8];
1761 cur_drv->last_sect = fdctrl->fifo[9];
1762 fdctrl->lock = fdctrl->fifo[10] >> 7;
1763 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1764 fdctrl->config = fdctrl->fifo[11];
1765 fdctrl->precomp_trk = fdctrl->fifo[12];
1766 fdctrl->pwrd = fdctrl->fifo[13];
1767 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1768 break;
1769 case 0x4D:
1770 /* FORMAT_TRACK */
baca51fa
FB		 1771 FLOPPY_DPRINTF("treat FORMAT_TRACK command\n");
1772 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1773 cur_drv = get_cur_drv(fdctrl);
1774 fdctrl->data_state |= FD_STATE_FORMAT;
1775 if (fdctrl->fifo[0] & 0x80)
1776 fdctrl->data_state |= FD_STATE_MULTI;
1777 else
1778 fdctrl->data_state &= ~FD_STATE_MULTI;
1779 fdctrl->data_state &= ~FD_STATE_SEEK;
1780 cur_drv->bps =
1781 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1782#if 0
1783 cur_drv->last_sect =
1784 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1785 fdctrl->fifo[3] / 2;
1786#else
1787 cur_drv->last_sect = fdctrl->fifo[3];
1788#endif
b9209030
TS		 1789 /* TODO: implement format using DMA expected by the Bochs BIOS
1790 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1791 * the sector with the specified fill byte
baca51fa
FB		 1792 */
1793 fdctrl->data_state &= ~FD_STATE_FORMAT;
1794 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
8977f3c1
FB		 1795 break;
1796 case 0x8E:
1797 /* DRIVE_SPECIFICATION_COMMAND */
1798 FLOPPY_DPRINTF("treat DRIVE_SPECIFICATION_COMMAND command\n");
baca51fa 1799 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
8977f3c1 1800 /* Command parameters done */
baca51fa
FB		 1801 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1802 fdctrl->fifo[0] = fdctrl->fifo[1];
1803 fdctrl->fifo[2] = 0;
1804 fdctrl->fifo[3] = 0;
1805 fdctrl_set_fifo(fdctrl, 4, 1);
8977f3c1 1806 } else {
baca51fa 1807 fdctrl_reset_fifo(fdctrl);
8977f3c1 1808 }
baca51fa 1809 } else if (fdctrl->data_len > 7) {
8977f3c1 1810 /* ERROR */
baca51fa
FB		 1811 fdctrl->fifo[0] = 0x80 |
1812 (cur_drv->head << 2) | fdctrl->cur_drv;
1813 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1814 }
1815 break;
1816 case 0x8F:
1817 /* RELATIVE_SEEK_OUT */
1818 FLOPPY_DPRINTF("treat RELATIVE_SEEK_OUT command\n");
baca51fa
FB		 1819 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1820 cur_drv = get_cur_drv(fdctrl);
1821 fd_start(cur_drv);
8977f3c1 1822 cur_drv->dir = 0;
baca51fa
FB		 1823 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1824 cur_drv->track = cur_drv->max_track - 1;
1825 } else {
1826 cur_drv->track += fdctrl->fifo[2];
8977f3c1 1827 }
baca51fa
FB		 1828 fdctrl_reset_fifo(fdctrl);
1829 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1830 break;
1831 case 0xCD:
1832 /* FORMAT_AND_WRITE */
1833// FLOPPY_DPRINTF("treat FORMAT_AND_WRITE command\n");
1834 FLOPPY_ERROR("treat FORMAT_AND_WRITE command\n");
baca51fa 1835 fdctrl_unimplemented(fdctrl);
8977f3c1
FB		 1836 break;
1837 case 0xCF:
1838 /* RELATIVE_SEEK_IN */
1839 FLOPPY_DPRINTF("treat RELATIVE_SEEK_IN command\n");
baca51fa
FB		 1840 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1841 cur_drv = get_cur_drv(fdctrl);
1842 fd_start(cur_drv);
8977f3c1 1843 cur_drv->dir = 1;
baca51fa
FB		 1844 if (fdctrl->fifo[2] > cur_drv->track) {
1845 cur_drv->track = 0;
1846 } else {
1847 cur_drv->track -= fdctrl->fifo[2];
8977f3c1 1848 }
baca51fa
FB		 1849 fdctrl_reset_fifo(fdctrl);
1850 /* Raise Interrupt */
1851 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1852 break;
1853 }
1854 }
1855}
ed5fd2cc
FB		 1856
1857static void fdctrl_result_timer(void *opaque)
1858{
1859 fdctrl_t *fdctrl = opaque;
b7ffa3b1
TS		 1860 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1861 /* Pretend we are spinning.
1862 * This is needed for Coherent, which uses READ ID to check for
1863 * sector interleaving.
1864 */
1865 if (cur_drv->last_sect != 0) {
1866 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
1867 }
ed5fd2cc
FB		 1868 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1869}
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