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c4efe1ca AL |
1 | /* |
2 | * libqos PCI bindings | |
3 | * | |
4 | * Copyright IBM, Corp. 2012-2013 | |
5 | * | |
6 | * Authors: | |
7 | * Anthony Liguori <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
13 | #include "libqos/pci.h" | |
14 | ||
15 | #include "hw/pci/pci_regs.h" | |
16 | #include <glib.h> | |
17 | ||
18 | #include <stdio.h> | |
19 | ||
20 | void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, | |
21 | void (*func)(QPCIDevice *dev, int devfn, void *data), | |
22 | void *data) | |
23 | { | |
24 | int slot; | |
25 | ||
26 | for (slot = 0; slot < 32; slot++) { | |
27 | int fn; | |
28 | ||
29 | for (fn = 0; fn < 8; fn++) { | |
30 | QPCIDevice *dev; | |
31 | ||
32 | dev = qpci_device_find(bus, QPCI_DEVFN(slot, fn)); | |
33 | if (!dev) { | |
34 | continue; | |
35 | } | |
36 | ||
37 | if (vendor_id != -1 && | |
38 | qpci_config_readw(dev, PCI_VENDOR_ID) != vendor_id) { | |
39 | continue; | |
40 | } | |
41 | ||
42 | if (device_id != -1 && | |
43 | qpci_config_readw(dev, PCI_DEVICE_ID) != device_id) { | |
44 | continue; | |
45 | } | |
46 | ||
47 | func(dev, QPCI_DEVFN(slot, fn), data); | |
48 | } | |
49 | } | |
50 | } | |
51 | ||
52 | QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn) | |
53 | { | |
54 | QPCIDevice *dev; | |
55 | ||
56 | dev = g_malloc0(sizeof(*dev)); | |
57 | dev->bus = bus; | |
58 | dev->devfn = devfn; | |
59 | ||
60 | if (qpci_config_readw(dev, PCI_VENDOR_ID) == 0xFFFF) { | |
61 | g_free(dev); | |
62 | return NULL; | |
63 | } | |
64 | ||
65 | return dev; | |
66 | } | |
67 | ||
68 | void qpci_device_enable(QPCIDevice *dev) | |
69 | { | |
70 | uint16_t cmd; | |
71 | ||
72 | /* FIXME -- does this need to be a bus callout? */ | |
73 | cmd = qpci_config_readw(dev, PCI_COMMAND); | |
9f0332b8 | 74 | cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; |
c4efe1ca AL |
75 | qpci_config_writew(dev, PCI_COMMAND, cmd); |
76 | } | |
77 | ||
78 | uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset) | |
79 | { | |
80 | return dev->bus->config_readb(dev->bus, dev->devfn, offset); | |
81 | } | |
82 | ||
83 | uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset) | |
84 | { | |
85 | return dev->bus->config_readw(dev->bus, dev->devfn, offset); | |
86 | } | |
87 | ||
88 | uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset) | |
89 | { | |
90 | return dev->bus->config_readl(dev->bus, dev->devfn, offset); | |
91 | } | |
92 | ||
93 | ||
94 | void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value) | |
95 | { | |
96 | dev->bus->config_writeb(dev->bus, dev->devfn, offset, value); | |
97 | } | |
98 | ||
99 | void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value) | |
100 | { | |
101 | dev->bus->config_writew(dev->bus, dev->devfn, offset, value); | |
102 | } | |
103 | ||
104 | void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value) | |
105 | { | |
ad489e93 | 106 | dev->bus->config_writel(dev->bus, dev->devfn, offset, value); |
c4efe1ca AL |
107 | } |
108 | ||
109 | ||
110 | uint8_t qpci_io_readb(QPCIDevice *dev, void *data) | |
111 | { | |
112 | return dev->bus->io_readb(dev->bus, data); | |
113 | } | |
114 | ||
115 | uint16_t qpci_io_readw(QPCIDevice *dev, void *data) | |
116 | { | |
117 | return dev->bus->io_readw(dev->bus, data); | |
118 | } | |
119 | ||
120 | uint32_t qpci_io_readl(QPCIDevice *dev, void *data) | |
121 | { | |
122 | return dev->bus->io_readl(dev->bus, data); | |
123 | } | |
124 | ||
125 | ||
126 | void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value) | |
127 | { | |
128 | dev->bus->io_writeb(dev->bus, data, value); | |
129 | } | |
130 | ||
131 | void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value) | |
132 | { | |
133 | dev->bus->io_writew(dev->bus, data, value); | |
134 | } | |
135 | ||
136 | void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value) | |
137 | { | |
138 | dev->bus->io_writel(dev->bus, data, value); | |
139 | } | |
140 | ||
6ce7100e | 141 | void *qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr) |
c4efe1ca | 142 | { |
6ce7100e | 143 | return dev->bus->iomap(dev->bus, dev, barno, sizeptr); |
c4efe1ca AL |
144 | } |
145 | ||
146 | void qpci_iounmap(QPCIDevice *dev, void *data) | |
147 | { | |
148 | dev->bus->iounmap(dev->bus, data); | |
149 | } | |
150 | ||
151 |