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47d05a86 MF |
1 | /* |
2 | * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. | |
3 | * All rights reserved. | |
4 | * | |
5 | * Redistribution and use in source and binary forms, with or without | |
6 | * modification, are permitted provided that the following conditions are met: | |
7 | * * Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * * Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * * Neither the name of the Open Source and Linux Lab nor the | |
13 | * names of its contributors may be used to endorse or promote products | |
14 | * derived from this software without specific prior written permission. | |
15 | * | |
16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
20 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
21 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
23 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | |
25 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
26 | */ | |
27 | ||
28 | #include "sysemu.h" | |
29 | #include "boards.h" | |
30 | #include "loader.h" | |
31 | #include "elf.h" | |
32 | #include "memory.h" | |
33 | #include "exec-memory.h" | |
34 | ||
35 | static uint64_t translate_phys_addr(void *env, uint64_t addr) | |
36 | { | |
37 | return cpu_get_phys_page_debug(env, addr); | |
38 | } | |
39 | ||
11e7bfd7 | 40 | static void sim_reset(void *opaque) |
47d05a86 | 41 | { |
11e7bfd7 AF |
42 | XtensaCPU *cpu = opaque; |
43 | ||
44 | cpu_reset(CPU(cpu)); | |
47d05a86 MF |
45 | } |
46 | ||
5e408573 | 47 | static void sim_init(ram_addr_t ram_size, |
47d05a86 MF |
48 | const char *boot_device, |
49 | const char *kernel_filename, const char *kernel_cmdline, | |
50 | const char *initrd_filename, const char *cpu_model) | |
51 | { | |
06d26274 | 52 | XtensaCPU *cpu = NULL; |
5bfcb36e | 53 | CPUXtensaState *env = NULL; |
47d05a86 MF |
54 | MemoryRegion *ram, *rom; |
55 | int n; | |
56 | ||
57 | for (n = 0; n < smp_cpus; n++) { | |
06d26274 AF |
58 | cpu = cpu_xtensa_init(cpu_model); |
59 | if (cpu == NULL) { | |
47d05a86 MF |
60 | fprintf(stderr, "Unable to find CPU definition\n"); |
61 | exit(1); | |
62 | } | |
06d26274 AF |
63 | env = &cpu->env; |
64 | ||
47d05a86 | 65 | env->sregs[PRID] = n; |
11e7bfd7 | 66 | qemu_register_reset(sim_reset, cpu); |
47d05a86 MF |
67 | /* Need MMU initialized prior to ELF loading, |
68 | * so that ELF gets loaded into virtual addresses | |
69 | */ | |
11e7bfd7 | 70 | sim_reset(cpu); |
47d05a86 MF |
71 | } |
72 | ||
73 | ram = g_malloc(sizeof(*ram)); | |
c5705a77 AK |
74 | memory_region_init_ram(ram, "xtensa.sram", ram_size); |
75 | vmstate_register_ram_global(ram); | |
47d05a86 MF |
76 | memory_region_add_subregion(get_system_memory(), 0, ram); |
77 | ||
78 | rom = g_malloc(sizeof(*rom)); | |
c5705a77 AK |
79 | memory_region_init_ram(rom, "xtensa.rom", 0x1000); |
80 | vmstate_register_ram_global(rom); | |
47d05a86 MF |
81 | memory_region_add_subregion(get_system_memory(), 0xfe000000, rom); |
82 | ||
83 | if (kernel_filename) { | |
84 | uint64_t elf_entry; | |
85 | uint64_t elf_lowaddr; | |
86 | #ifdef TARGET_WORDS_BIGENDIAN | |
87 | int success = load_elf(kernel_filename, translate_phys_addr, env, | |
88 | &elf_entry, &elf_lowaddr, NULL, 1, ELF_MACHINE, 0); | |
89 | #else | |
90 | int success = load_elf(kernel_filename, translate_phys_addr, env, | |
91 | &elf_entry, &elf_lowaddr, NULL, 0, ELF_MACHINE, 0); | |
92 | #endif | |
93 | if (success > 0) { | |
94 | env->pc = elf_entry; | |
95 | } | |
96 | } | |
97 | } | |
98 | ||
5e408573 | 99 | static void xtensa_sim_init(ram_addr_t ram_size, |
47d05a86 MF |
100 | const char *boot_device, |
101 | const char *kernel_filename, const char *kernel_cmdline, | |
102 | const char *initrd_filename, const char *cpu_model) | |
103 | { | |
104 | if (!cpu_model) { | |
e38077ff | 105 | cpu_model = XTENSA_DEFAULT_CPU_MODEL; |
47d05a86 | 106 | } |
5e408573 | 107 | sim_init(ram_size, boot_device, kernel_filename, kernel_cmdline, |
47d05a86 MF |
108 | initrd_filename, cpu_model); |
109 | } | |
110 | ||
5e408573 MF |
111 | static QEMUMachine xtensa_sim_machine = { |
112 | .name = "sim", | |
e38077ff | 113 | .desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")", |
82e5d464 | 114 | .is_default = true, |
5e408573 | 115 | .init = xtensa_sim_init, |
47d05a86 MF |
116 | .max_cpus = 4, |
117 | }; | |
118 | ||
5e408573 | 119 | static void xtensa_sim_machine_init(void) |
47d05a86 | 120 | { |
5e408573 | 121 | qemu_register_machine(&xtensa_sim_machine); |
47d05a86 MF |
122 | } |
123 | ||
5e408573 | 124 | machine_init(xtensa_sim_machine_init); |