[qemu.git] / hw / intc / xics_kvm.c

/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
 *
 * Copyright (c) 2013 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
#include "trace.h"
#include "sysemu/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"

#include <sys/ioctl.h>

static int kernel_xics_fd = -1;

/*
 * ICP-KVM
 */
static void icp_get_kvm_state(ICPState *icp)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!icp->cs) {
        return;
    }

    ret = kvm_vcpu_ioctl(icp->cs, KVM_GET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to retrieve KVM interrupt controller state"
                " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
        exit(1);
    }

    icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
    icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
        & KVM_REG_PPC_ICP_MFRR_MASK;
    icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
        & KVM_REG_PPC_ICP_PPRI_MASK;
}

static int icp_set_kvm_state(ICPState *icp, int version_id)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!icp->cs) {
        return 0;
    }

    state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
        | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
        | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);

    ret = kvm_vcpu_ioctl(icp->cs, KVM_SET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to restore KVM interrupt controller state (0x%"
                PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
                strerror(errno));
        return ret;
    }

    return 0;
}

static void icp_kvm_reset(void *dev)
{
    ICPState *icp = ICP(dev);

    icp->xirr = 0;
    icp->pending_priority = 0xff;
    icp->mfrr = 0xff;

    /* Make all outputs as deasserted only if the CPU thread is in use */
    if (icp->output) {
        qemu_set_irq(icp->output, 0);
    }

    icp_set_kvm_state(icp, 1);
}

static void icp_kvm_cpu_setup(ICPState *icp, PowerPCCPU *cpu)
{
    CPUState *cs = CPU(cpu);
    int ret;

    if (kernel_xics_fd == -1) {
        abort();
    }

    /*
     * If we are reusing a parked vCPU fd corresponding to the CPU
     * which was hot-removed earlier we don't have to renable
     * KVM_CAP_IRQ_XICS capability again.
     */
    if (icp->cap_irq_xics_enabled) {
        return;
    }

    ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
                              kvm_arch_vcpu_id(cs));
    if (ret < 0) {
        error_report("Unable to connect CPU%ld to kernel XICS: %s",
                     kvm_arch_vcpu_id(cs), strerror(errno));
        exit(1);
    }
    icp->cap_irq_xics_enabled = true;
}

static void icp_kvm_realize(DeviceState *dev, Error **errp)
{
    qemu_register_reset(icp_kvm_reset, dev);
}

static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    ICPStateClass *icpc = ICP_CLASS(klass);

    dc->realize = icp_kvm_realize;
    icpc->pre_save = icp_get_kvm_state;
    icpc->post_load = icp_set_kvm_state;
    icpc->cpu_setup = icp_kvm_cpu_setup;
}

static const TypeInfo icp_kvm_info = {
    .name = TYPE_KVM_ICP,
    .parent = TYPE_ICP,
    .instance_size = sizeof(ICPState),
    .class_init = icp_kvm_class_init,
    .class_size = sizeof(ICPStateClass),
};

/*
 * ICS-KVM
 */
static void ics_get_kvm_state(ICSState *ics)
{
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        ret = ioctl(kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to retrieve KVM interrupt controller state"
                    " for IRQ %d: %s", i + ics->offset, strerror(errno));
            exit(1);
        }

        irq->server = state & KVM_XICS_DESTINATION_MASK;
        irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
            & KVM_XICS_PRIORITY_MASK;
        /*
         * To be consistent with the software emulation in xics.c, we
         * split out the masked state + priority that we get from the
         * kernel into 'current priority' (0xff if masked) and
         * 'saved priority' (if masked, this is the priority the
         * interrupt had before it was masked).  Masking and unmasking
         * are done with the ibm,int-off and ibm,int-on RTAS calls.
         */
        if (state & KVM_XICS_MASKED) {
            irq->priority = 0xff;
        } else {
            irq->priority = irq->saved_priority;
        }

        if (state & KVM_XICS_PENDING) {
            if (state & KVM_XICS_LEVEL_SENSITIVE) {
                irq->status |= XICS_STATUS_ASSERTED;
            } else {
                /*
                 * A pending edge-triggered interrupt (or MSI)
                 * must have been rejected previously when we
                 * first detected it and tried to deliver it,
                 * so mark it as pending and previously rejected
                 * for consistency with how xics.c works.
                 */
                irq->status |= XICS_STATUS_MASKED_PENDING
                    | XICS_STATUS_REJECTED;
            }
        }
    }
}

static int ics_set_kvm_state(ICSState *ics, int version_id)
{
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        state = irq->server;
        state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
            << KVM_XICS_PRIORITY_SHIFT;
        if (irq->priority != irq->saved_priority) {
            assert(irq->priority == 0xff);
            state |= KVM_XICS_MASKED;
        }

        if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
            state |= KVM_XICS_LEVEL_SENSITIVE;
            if (irq->status & XICS_STATUS_ASSERTED) {
                state |= KVM_XICS_PENDING;
            }
        } else {
            if (irq->status & XICS_STATUS_MASKED_PENDING) {
                state |= KVM_XICS_PENDING;
            }
        }

        ret = ioctl(kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to restore KVM interrupt controller state"
                    " for IRQs %d: %s", i + ics->offset, strerror(errno));
            return ret;
        }
    }

    return 0;
}

static void ics_kvm_set_irq(void *opaque, int srcno, int val)
{
    ICSState *ics = opaque;
    struct kvm_irq_level args;
    int rc;

    args.irq = srcno + ics->offset;
    if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
        if (!val) {
            return;
        }
        args.level = KVM_INTERRUPT_SET;
    } else {
        args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
    }
    rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
    if (rc < 0) {
        perror("kvm_irq_line");
    }
}

static void ics_kvm_reset(void *dev)
{
    ICSState *ics = ICS_SIMPLE(dev);
    int i;
    uint8_t flags[ics->nr_irqs];

    for (i = 0; i < ics->nr_irqs; i++) {
        flags[i] = ics->irqs[i].flags;
    }

    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);

    for (i = 0; i < ics->nr_irqs; i++) {
        ics->irqs[i].priority = 0xff;
        ics->irqs[i].saved_priority = 0xff;
        ics->irqs[i].flags = flags[i];
    }

    ics_set_kvm_state(ics, 1);
}

static void ics_kvm_realize(DeviceState *dev, Error **errp)
{
    ICSState *ics = ICS_SIMPLE(dev);

    if (!ics->nr_irqs) {
        error_setg(errp, "Number of interrupts needs to be greater 0");
        return;
    }
    ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);

    qemu_register_reset(ics_kvm_reset, dev);
}

static void ics_kvm_class_init(ObjectClass *klass, void *data)
{
    ICSStateClass *icsc = ICS_BASE_CLASS(klass);

    icsc->realize = ics_kvm_realize;
    icsc->pre_save = ics_get_kvm_state;
    icsc->post_load = ics_set_kvm_state;
}

static const TypeInfo ics_kvm_info = {
    .name = TYPE_ICS_KVM,
    .parent = TYPE_ICS_SIMPLE,
    .instance_size = sizeof(ICSState),
    .class_init = ics_kvm_class_init,
};

/*
 * XICS-KVM
 */

static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                       uint32_t token,
                       uint32_t nargs, target_ulong args,
                       uint32_t nret, target_ulong rets)
{
    error_report("pseries: %s must never be called for in-kernel XICS",
                 __func__);
}

int xics_kvm_init(sPAPRMachineState *spapr, Error **errp)
{
    int rc;
    struct kvm_create_device xics_create_device = {
        .type = KVM_DEV_TYPE_XICS,
        .flags = 0,
    };

    if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
        error_setg(errp,
                   "KVM and IRQ_XICS capability must be present for in-kernel XICS");
        goto fail;
    }

    spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
        goto fail;
    }

    /* Create the kernel ICP */
    rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
    if (rc < 0) {
        error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
        goto fail;
    }

    kernel_xics_fd = xics_create_device.fd;

    kvm_kernel_irqchip = true;
    kvm_msi_via_irqfd_allowed = true;
    kvm_gsi_direct_mapping = true;

    return rc;

fail:
    kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
    return -1;
}

static void xics_kvm_register_types(void)
{
    type_register_static(&ics_kvm_info);
    type_register_static(&icp_kvm_info);
}

type_init(xics_kvm_register_types)
Commit	Line	Data
11ad93f6 DG	1	/*
	2	* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
	3	*
	4	* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
	5	*
	6	* Copyright (c) 2013 David Gibson, IBM Corporation.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a copy
	9	* of this software and associated documentation files (the "Software"), to deal
	10	* in the Software without restriction, including without limitation the rights
	11	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	12	* copies of the Software, and to permit persons to whom the Software is
	13	* furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	21	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	23	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	24	* THE SOFTWARE.
	25	*
	26	*/
	27
0d75590d	28	#include "qemu/osdep.h"
da34e65c	29	#include "qapi/error.h"
4771d756 PB	30	#include "qemu-common.h"
4771d756 PB	31	#include "cpu.h"
11ad93f6 DG	32	#include "hw/hw.h"
11ad93f6 DG	33	#include "trace.h"
77ac58dd	34	#include "sysemu/kvm.h"
11ad93f6 DG	35	#include "hw/ppc/spapr.h"
	36	#include "hw/ppc/xics.h"
	37	#include "kvm_ppc.h"
	38	#include "qemu/config-file.h"
	39	#include "qemu/error-report.h"
	40
	41	#include <sys/ioctl.h>
	42
729f8a4f CLG	43	static int kernel_xics_fd = -1;
729f8a4f CLG	44
11ad93f6 DG	45	/*
	46	* ICP-KVM
	47	*/
8e4fba20	48	static void icp_get_kvm_state(ICPState *icp)
11ad93f6 DG	49	{
	50	uint64_t state;
	51	struct kvm_one_reg reg = {
	52	.id = KVM_REG_PPC_ICP_STATE,
	53	.addr = (uintptr_t)&state,
	54	};
	55	int ret;
	56
	57	/* ICP for this CPU thread is not in use, exiting */
8e4fba20	58	if (!icp->cs) {
11ad93f6 DG	59	return;
	60	}
	61
8e4fba20	62	ret = kvm_vcpu_ioctl(icp->cs, KVM_GET_ONE_REG, &reg);
11ad93f6 DG	63	if (ret != 0) {
11ad93f6 DG	64	error_report("Unable to retrieve KVM interrupt controller state"
8e4fba20	65	" for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
11ad93f6 DG	66	exit(1);
	67	}
	68
8e4fba20 CLG	69	icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
8e4fba20 CLG	70	icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
11ad93f6	71	& KVM_REG_PPC_ICP_MFRR_MASK;
8e4fba20	72	icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
11ad93f6 DG	73	& KVM_REG_PPC_ICP_PPRI_MASK;
	74	}
	75
8e4fba20	76	static int icp_set_kvm_state(ICPState *icp, int version_id)
11ad93f6 DG	77	{
	78	uint64_t state;
	79	struct kvm_one_reg reg = {
	80	.id = KVM_REG_PPC_ICP_STATE,
	81	.addr = (uintptr_t)&state,
	82	};
	83	int ret;
	84
	85	/* ICP for this CPU thread is not in use, exiting */
8e4fba20	86	if (!icp->cs) {
11ad93f6 DG	87	return 0;
	88	}
	89
8e4fba20 CLG	90	state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
	91	\| ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
	92	\| ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
11ad93f6	93
8e4fba20	94	ret = kvm_vcpu_ioctl(icp->cs, KVM_SET_ONE_REG, &reg);
11ad93f6 DG	95	if (ret != 0) {
11ad93f6 DG	96	error_report("Unable to restore KVM interrupt controller state (0x%"
8e4fba20	97	PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
11ad93f6 DG	98	strerror(errno));
	99	return ret;
	100	}
	101
	102	return 0;
	103	}
	104
7ea6e067	105	static void icp_kvm_reset(void *dev)
11ad93f6 DG	106	{
	107	ICPState *icp = ICP(dev);
	108
	109	icp->xirr = 0;
	110	icp->pending_priority = 0xff;
	111	icp->mfrr = 0xff;
	112
4a4b344c BR	113	/* Make all outputs as deasserted only if the CPU thread is in use */
	114	if (icp->output) {
	115	qemu_set_irq(icp->output, 0);
	116	}
11ad93f6 DG	117
	118	icp_set_kvm_state(icp, 1);
	119	}
	120
8e4fba20	121	static void icp_kvm_cpu_setup(ICPState icp, PowerPCCPU cpu)
f0232434 CLG	122	{
	123	CPUState *cs = CPU(cpu);
	124	int ret;
	125
	126	if (kernel_xics_fd == -1) {
	127	abort();
	128	}
	129
	130	/*
	131	* If we are reusing a parked vCPU fd corresponding to the CPU
	132	* which was hot-removed earlier we don't have to renable
	133	* KVM_CAP_IRQ_XICS capability again.
	134	*/
8e4fba20	135	if (icp->cap_irq_xics_enabled) {
f0232434 CLG	136	return;
	137	}
	138
	139	ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
	140	kvm_arch_vcpu_id(cs));
	141	if (ret < 0) {
	142	error_report("Unable to connect CPU%ld to kernel XICS: %s",
	143	kvm_arch_vcpu_id(cs), strerror(errno));
	144	exit(1);
	145	}
8e4fba20	146	icp->cap_irq_xics_enabled = true;
f0232434 CLG	147	}
f0232434 CLG	148
7ea6e067 CLG	149	static void icp_kvm_realize(DeviceState dev, Error *errp)
	150	{
	151	qemu_register_reset(icp_kvm_reset, dev);
	152	}
	153
11ad93f6 DG	154	static void icp_kvm_class_init(ObjectClass klass, void data)
	155	{
	156	DeviceClass *dc = DEVICE_CLASS(klass);
	157	ICPStateClass *icpc = ICP_CLASS(klass);
	158
7ea6e067	159	dc->realize = icp_kvm_realize;
11ad93f6 DG	160	icpc->pre_save = icp_get_kvm_state;
11ad93f6 DG	161	icpc->post_load = icp_set_kvm_state;
f0232434	162	icpc->cpu_setup = icp_kvm_cpu_setup;
11ad93f6 DG	163	}
	164
	165	static const TypeInfo icp_kvm_info = {
	166	.name = TYPE_KVM_ICP,
	167	.parent = TYPE_ICP,
	168	.instance_size = sizeof(ICPState),
	169	.class_init = icp_kvm_class_init,
	170	.class_size = sizeof(ICPStateClass),
	171	};
	172
	173	/*
	174	* ICS-KVM
	175	*/
	176	static void ics_get_kvm_state(ICSState *ics)
	177	{
11ad93f6 DG	178	uint64_t state;
	179	struct kvm_device_attr attr = {
	180	.flags = 0,
	181	.group = KVM_DEV_XICS_GRP_SOURCES,
	182	.addr = (uint64_t)(uintptr_t)&state,
	183	};
	184	int i;
	185
	186	for (i = 0; i < ics->nr_irqs; i++) {
	187	ICSIRQState *irq = &ics->irqs[i];
	188	int ret;
	189
	190	attr.attr = i + ics->offset;
	191
729f8a4f	192	ret = ioctl(kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
11ad93f6 DG	193	if (ret != 0) {
	194	error_report("Unable to retrieve KVM interrupt controller state"
	195	" for IRQ %d: %s", i + ics->offset, strerror(errno));
	196	exit(1);
	197	}
	198
	199	irq->server = state & KVM_XICS_DESTINATION_MASK;
	200	irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
	201	& KVM_XICS_PRIORITY_MASK;
	202	/*
	203	* To be consistent with the software emulation in xics.c, we
	204	* split out the masked state + priority that we get from the
	205	* kernel into 'current priority' (0xff if masked) and
	206	* 'saved priority' (if masked, this is the priority the
	207	* interrupt had before it was masked). Masking and unmasking
	208	* are done with the ibm,int-off and ibm,int-on RTAS calls.
	209	*/
	210	if (state & KVM_XICS_MASKED) {
	211	irq->priority = 0xff;
	212	} else {
	213	irq->priority = irq->saved_priority;
	214	}
	215
	216	if (state & KVM_XICS_PENDING) {
	217	if (state & KVM_XICS_LEVEL_SENSITIVE) {
	218	irq->status \|= XICS_STATUS_ASSERTED;
	219	} else {
	220	/*
	221	* A pending edge-triggered interrupt (or MSI)
	222	* must have been rejected previously when we
	223	* first detected it and tried to deliver it,
	224	* so mark it as pending and previously rejected
	225	* for consistency with how xics.c works.
	226	*/
	227	irq->status \|= XICS_STATUS_MASKED_PENDING
	228	\| XICS_STATUS_REJECTED;
	229	}
	230	}
	231	}
	232	}
	233
	234	static int ics_set_kvm_state(ICSState *ics, int version_id)
	235	{
11ad93f6 DG	236	uint64_t state;
	237	struct kvm_device_attr attr = {
	238	.flags = 0,
	239	.group = KVM_DEV_XICS_GRP_SOURCES,
	240	.addr = (uint64_t)(uintptr_t)&state,
	241	};
	242	int i;
	243
	244	for (i = 0; i < ics->nr_irqs; i++) {
	245	ICSIRQState *irq = &ics->irqs[i];
	246	int ret;
	247
	248	attr.attr = i + ics->offset;
	249
	250	state = irq->server;
	251	state \|= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
	252	<< KVM_XICS_PRIORITY_SHIFT;
	253	if (irq->priority != irq->saved_priority) {
	254	assert(irq->priority == 0xff);
	255	state \|= KVM_XICS_MASKED;
	256	}
	257
4af88944	258	if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
11ad93f6 DG	259	state \|= KVM_XICS_LEVEL_SENSITIVE;
	260	if (irq->status & XICS_STATUS_ASSERTED) {
	261	state \|= KVM_XICS_PENDING;
	262	}
	263	} else {
	264	if (irq->status & XICS_STATUS_MASKED_PENDING) {
	265	state \|= KVM_XICS_PENDING;
	266	}
	267	}
	268
729f8a4f	269	ret = ioctl(kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
11ad93f6 DG	270	if (ret != 0) {
	271	error_report("Unable to restore KVM interrupt controller state"
	272	" for IRQs %d: %s", i + ics->offset, strerror(errno));
	273	return ret;
	274	}
	275	}
	276
	277	return 0;
	278	}
	279
	280	static void ics_kvm_set_irq(void *opaque, int srcno, int val)
	281	{
	282	ICSState *ics = opaque;
	283	struct kvm_irq_level args;
	284	int rc;
	285
	286	args.irq = srcno + ics->offset;
4af88944	287	if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
11ad93f6 DG	288	if (!val) {
	289	return;
	290	}
	291	args.level = KVM_INTERRUPT_SET;
	292	} else {
	293	args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
	294	}
	295	rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
	296	if (rc < 0) {
	297	perror("kvm_irq_line");
	298	}
	299	}
	300
7ea6e067	301	static void ics_kvm_reset(void *dev)
11ad93f6	302	{
d4d7a59a	303	ICSState *ics = ICS_SIMPLE(dev);
fb0e843a	304	int i;
a7e519a8 AK	305	uint8_t flags[ics->nr_irqs];
	306
	307	for (i = 0; i < ics->nr_irqs; i++) {
	308	flags[i] = ics->irqs[i].flags;
	309	}
fb0e843a AK	310
fb0e843a AK	311	memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
a7e519a8	312
fb0e843a AK	313	for (i = 0; i < ics->nr_irqs; i++) {
	314	ics->irqs[i].priority = 0xff;
	315	ics->irqs[i].saved_priority = 0xff;
a7e519a8	316	ics->irqs[i].flags = flags[i];
fb0e843a AK	317	}
	318
	319	ics_set_kvm_state(ics, 1);
11ad93f6 DG	320	}
	321
	322	static void ics_kvm_realize(DeviceState dev, Error *errp)
	323	{
d4d7a59a	324	ICSState *ics = ICS_SIMPLE(dev);
11ad93f6 DG	325
	326	if (!ics->nr_irqs) {
	327	error_setg(errp, "Number of interrupts needs to be greater 0");
	328	return;
	329	}
	330	ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
11ad93f6	331	ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
7ea6e067 CLG	332
7ea6e067 CLG	333	qemu_register_reset(ics_kvm_reset, dev);
11ad93f6 DG	334	}
	335
	336	static void ics_kvm_class_init(ObjectClass klass, void data)
	337	{
d4d7a59a	338	ICSStateClass *icsc = ICS_BASE_CLASS(klass);
11ad93f6	339
4e4169f7	340	icsc->realize = ics_kvm_realize;
11ad93f6 DG	341	icsc->pre_save = ics_get_kvm_state;
	342	icsc->post_load = ics_set_kvm_state;
	343	}
	344
	345	static const TypeInfo ics_kvm_info = {
d4d7a59a BH	346	.name = TYPE_ICS_KVM,
d4d7a59a BH	347	.parent = TYPE_ICS_SIMPLE,
11ad93f6 DG	348	.instance_size = sizeof(ICSState),
	349	.class_init = ics_kvm_class_init,
	350	};
	351
	352	/*
	353	* XICS-KVM
	354	*/
11ad93f6	355
28e02042	356	static void rtas_dummy(PowerPCCPU cpu, sPAPRMachineState spapr,
11ad93f6 DG	357	uint32_t token,
	358	uint32_t nargs, target_ulong args,
	359	uint32_t nret, target_ulong rets)
	360	{
	361	error_report("pseries: %s must never be called for in-kernel XICS",
	362	__func__);
	363	}
	364
2192a930	365	int xics_kvm_init(sPAPRMachineState spapr, Error *errp)
11ad93f6	366	{
817bb6a4	367	int rc;
11ad93f6 DG	368	struct kvm_create_device xics_create_device = {
	369	.type = KVM_DEV_TYPE_XICS,
	370	.flags = 0,
	371	};
	372
	373	if (!kvm_enabled() \|\| !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
	374	error_setg(errp,
	375	"KVM and IRQ_XICS capability must be present for in-kernel XICS");
	376	goto fail;
	377	}
	378
3a3b8502 AK	379	spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
	380	spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
	381	spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
	382	spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
11ad93f6	383
3a3b8502	384	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
11ad93f6 DG	385	if (rc < 0) {
	386	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
	387	goto fail;
	388	}
	389
3a3b8502	390	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
11ad93f6 DG	391	if (rc < 0) {
	392	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
	393	goto fail;
	394	}
	395
3a3b8502	396	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
11ad93f6 DG	397	if (rc < 0) {
	398	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
	399	goto fail;
	400	}
	401
3a3b8502	402	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
11ad93f6 DG	403	if (rc < 0) {
	404	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
	405	goto fail;
	406	}
	407
	408	/* Create the kernel ICP */
	409	rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
	410	if (rc < 0) {
	411	error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
	412	goto fail;
	413	}
	414
729f8a4f	415	kernel_xics_fd = xics_create_device.fd;
11ad93f6	416
9554233c	417	kvm_kernel_irqchip = true;
9554233c AK	418	kvm_msi_via_irqfd_allowed = true;
	419	kvm_gsi_direct_mapping = true;
	420
2192a930	421	return rc;
11ad93f6 DG	422
	423	fail:
	424	kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
	425	kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
	426	kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
	427	kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
2192a930	428	return -1;
11ad93f6 DG	429	}
11ad93f6 DG	430
11ad93f6 DG	431	static void xics_kvm_register_types(void)
11ad93f6 DG	432	{
11ad93f6 DG	433	type_register_static(&ics_kvm_info);
	434	type_register_static(&icp_kvm_info);
	435	}
	436
	437	type_init(xics_kvm_register_types)