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3efda49d 1/*
7fc42b4b 2 * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
a5d7eb65 3 * TI TSC2301 (touchscreen/sensors/keypad).
3efda49d
AZ		 4 *
5 * Copyright (c) 2006 Andrzej Zaborowski <[email protected]>
a5d7eb65 6 * Copyright (C) 2008 Nokia Corporation
3efda49d
AZ		 7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
a5d7eb65
AZ		 10 * published by the Free Software Foundation; either version 2 or
11 * (at your option) version 3 of the License.
3efda49d
AZ		 12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
fad6cb1a 18 * You should have received a copy of the GNU General Public License along
8167ee88 19 * with this program; if not, see <http://www.gnu.org/licenses/>.
3efda49d
AZ		 20 */
21
83c9f4ca 22#include "hw/hw.h"
87ecb68b 23#include "audio/audio.h"
1de7afc9 24#include "qemu/timer.h"
28ecbaee 25#include "ui/console.h"
0d09e41a 26#include "hw/arm/omap.h" /* For I2SCodec and uWireSlave */
bd2be150 27#include "hw/devices.h"
3efda49d
AZ		 28
29#define TSC_DATA_REGISTERS_PAGE 0x0
30#define TSC_CONTROL_REGISTERS_PAGE 0x1
31#define TSC_AUDIO_REGISTERS_PAGE 0x2
32
33#define TSC_VERBOSE
34
35#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
36
bc24a225 37typedef struct {
3efda49d 38 qemu_irq pint;
a5d7eb65
AZ		 39 qemu_irq kbint;
40 qemu_irq davint;
3efda49d 41 QEMUTimer *timer;
d8f699cb 42 QEMUSoundCard card;
bc24a225
PB		 43 uWireSlave chip;
44 I2SCodec codec;
d8f699cb
AZ		 45 uint8_t in_fifo[16384];
46 uint8_t out_fifo[16384];
a5d7eb65 47 uint16_t model;
3efda49d
AZ		 48
49 int x, y;
50 int pressure;
51
52 int state, page, offset, irq;
53 uint16_t command, dav;
54
55 int busy;
56 int enabled;
57 int host_mode;
58 int function;
59 int nextfunction;
60 int precision;
61 int nextprecision;
62 int filter;
63 int pin_func;
64 int ref;
65 int timing;
66 int noise;
67
68 uint16_t audio_ctrl1;
69 uint16_t audio_ctrl2;
70 uint16_t audio_ctrl3;
a5d7eb65 71 uint16_t pll[3];
3efda49d
AZ		 72 uint16_t volume;
73 int64_t volume_change;
74 int softstep;
75 uint16_t dac_power;
76 int64_t powerdown;
77 uint16_t filter_data[0x14];
d8f699cb
AZ		 78
79 const char *name;
80 SWVoiceIn *adc_voice[1];
81 SWVoiceOut *dac_voice[1];
82 int i2s_rx_rate;
83 int i2s_tx_rate;
a5d7eb65
AZ		 84
85 int tr[8];
86
87 struct {
88 uint16_t down;
89 uint16_t mask;
90 int scan;
91 int debounce;
92 int mode;
93 int intr;
94 } kb;
bc24a225 95} TSC210xState;
3efda49d
AZ		 96
97static const int resolution[4] = { 12, 8, 10, 12 };
98
99#define TSC_MODE_NO_SCAN 0x0
100#define TSC_MODE_XY_SCAN 0x1
101#define TSC_MODE_XYZ_SCAN 0x2
102#define TSC_MODE_X 0x3
103#define TSC_MODE_Y 0x4
104#define TSC_MODE_Z 0x5
105#define TSC_MODE_BAT1 0x6
106#define TSC_MODE_BAT2 0x7
107#define TSC_MODE_AUX 0x8
108#define TSC_MODE_AUX_SCAN 0x9
109#define TSC_MODE_TEMP1 0xa
110#define TSC_MODE_PORT_SCAN 0xb
111#define TSC_MODE_TEMP2 0xc
112#define TSC_MODE_XX_DRV 0xd
113#define TSC_MODE_YY_DRV 0xe
114#define TSC_MODE_YX_DRV 0xf
115
116static const uint16_t mode_regs[16] = {
117 0x0000, /* No scan */
118 0x0600, /* X, Y scan */
119 0x0780, /* X, Y, Z scan */
120 0x0400, /* X */
121 0x0200, /* Y */
122 0x0180, /* Z */
123 0x0040, /* BAT1 */
124 0x0030, /* BAT2 */
125 0x0010, /* AUX */
126 0x0010, /* AUX scan */
127 0x0004, /* TEMP1 */
128 0x0070, /* Port scan */
129 0x0002, /* TEMP2 */
130 0x0000, /* X+, X- drivers */
131 0x0000, /* Y+, Y- drivers */
132 0x0000, /* Y+, X- drivers */
133};
134
a5d7eb65
AZ		 135#define X_TRANSFORM(s) \
136 ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
137#define Y_TRANSFORM(s) \
138 ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
3efda49d 139#define Z1_TRANSFORM(s) \
8ef6367e 140 ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
3efda49d 141#define Z2_TRANSFORM(s) \
8ef6367e
AZ		 142 ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
143
3efda49d
AZ		 144#define BAT1_VAL 0x8660
145#define BAT2_VAL 0x0000
146#define AUX1_VAL 0x35c0
147#define AUX2_VAL 0xffff
148#define TEMP1_VAL 0x8c70
149#define TEMP2_VAL 0xa5b0
150
151#define TSC_POWEROFF_DELAY 50
152#define TSC_SOFTSTEP_DELAY 50
153
bc24a225 154static void tsc210x_reset(TSC210xState *s)
3efda49d
AZ		 155{
156 s->state = 0;
157 s->pin_func = 2;
158 s->enabled = 0;
159 s->busy = 0;
160 s->nextfunction = 0;
161 s->ref = 0;
162 s->timing = 0;
163 s->irq = 0;
164 s->dav = 0;
165
166 s->audio_ctrl1 = 0x0000;
167 s->audio_ctrl2 = 0x4410;
168 s->audio_ctrl3 = 0x0000;
169 s->pll[0] = 0x1004;
170 s->pll[1] = 0x0000;
a5d7eb65 171 s->pll[2] = 0x1fff;
3efda49d
AZ		 172 s->volume = 0xffff;
173 s->dac_power = 0x8540;
174 s->softstep = 1;
175 s->volume_change = 0;
176 s->powerdown = 0;
177 s->filter_data[0x00] = 0x6be3;
178 s->filter_data[0x01] = 0x9666;
179 s->filter_data[0x02] = 0x675d;
180 s->filter_data[0x03] = 0x6be3;
181 s->filter_data[0x04] = 0x9666;
182 s->filter_data[0x05] = 0x675d;
183 s->filter_data[0x06] = 0x7d83;
184 s->filter_data[0x07] = 0x84ee;
185 s->filter_data[0x08] = 0x7d83;
186 s->filter_data[0x09] = 0x84ee;
187 s->filter_data[0x0a] = 0x6be3;
188 s->filter_data[0x0b] = 0x9666;
189 s->filter_data[0x0c] = 0x675d;
190 s->filter_data[0x0d] = 0x6be3;
191 s->filter_data[0x0e] = 0x9666;
192 s->filter_data[0x0f] = 0x675d;
193 s->filter_data[0x10] = 0x7d83;
194 s->filter_data[0x11] = 0x84ee;
195 s->filter_data[0x12] = 0x7d83;
196 s->filter_data[0x13] = 0x84ee;
197
d8f699cb
AZ		 198 s->i2s_tx_rate = 0;
199 s->i2s_rx_rate = 0;
200
a5d7eb65
AZ		 201 s->kb.scan = 1;
202 s->kb.debounce = 0;
203 s->kb.mask = 0x0000;
204 s->kb.mode = 3;
205 s->kb.intr = 0;
206
7fc42b4b 207 qemu_set_irq(s->pint, !s->irq);
a5d7eb65
AZ		 208 qemu_set_irq(s->davint, !s->dav);
209 qemu_irq_raise(s->kbint);
3efda49d
AZ		 210}
211
bc24a225 212typedef struct {
d8f699cb
AZ		 213 int rate;
214 int dsor;
215 int fsref;
bc24a225 216} TSC210xRateInfo;
d8f699cb 217
d8f699cb 218/* { rate, dsor, fsref } */
bc24a225 219static const TSC210xRateInfo tsc2102_rates[] = {
d8f699cb
AZ		 220 /* Fsref / 6.0 */
221 { 7350, 63, 1 },
222 { 8000, 63, 0 },
223 /* Fsref / 6.0 */
224 { 7350, 54, 1 },
225 { 8000, 54, 0 },
226 /* Fsref / 5.0 */
227 { 8820, 45, 1 },
228 { 9600, 45, 0 },
229 /* Fsref / 4.0 */
230 { 11025, 36, 1 },
231 { 12000, 36, 0 },
232 /* Fsref / 3.0 */
233 { 14700, 27, 1 },
234 { 16000, 27, 0 },
235 /* Fsref / 2.0 */
236 { 22050, 18, 1 },
237 { 24000, 18, 0 },
238 /* Fsref / 1.5 */
239 { 29400, 9, 1 },
240 { 32000, 9, 0 },
241 /* Fsref */
242 { 44100, 0, 1 },
243 { 48000, 0, 0 },
244
245 { 0, 0, 0 },
246};
247
bc24a225 248static inline void tsc210x_out_flush(TSC210xState *s, int len)
d8f699cb
AZ		 249{
250 uint8_t *data = s->codec.out.fifo + s->codec.out.start;
251 uint8_t *end = data + len;
252
253 while (data < end)
254 data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
255
256 s->codec.out.len -= len;
257 if (s->codec.out.len)
258 memmove(s->codec.out.fifo, end, s->codec.out.len);
259 s->codec.out.start = 0;
260}
261
bc24a225 262static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
d8f699cb
AZ		 263{
264 if (s->codec.out.len >= free_b) {
265 tsc210x_out_flush(s, free_b);
266 return;
267 }
268
269 s->codec.out.size = MIN(free_b, 16384);
270 qemu_irq_raise(s->codec.tx_start);
271}
272
bc24a225 273static void tsc2102_audio_rate_update(TSC210xState *s)
d8f699cb 274{
bc24a225 275 const TSC210xRateInfo *rate;
73560bc8
AZ		 276
277 s->codec.tx_rate = 0;
278 s->codec.rx_rate = 0;
279 if (s->dac_power & (1 << 15)) /* PWDNC */
280 return;
281
282 for (rate = tsc2102_rates; rate->rate; rate ++)
283 if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
284 rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
285 break;
286 if (!rate->rate) {
287 printf("%s: unknown sampling rate configured\n", __FUNCTION__);
288 return;
289 }
290
291 s->codec.tx_rate = rate->rate;
292}
293
bc24a225 294static void tsc2102_audio_output_update(TSC210xState *s)
73560bc8
AZ		 295{
296 int enable;
1ea879e5 297 struct audsettings fmt;
d8f699cb
AZ		 298
299 if (s->dac_voice[0]) {
300 tsc210x_out_flush(s, s->codec.out.len);
301 s->codec.out.size = 0;
302 AUD_set_active_out(s->dac_voice[0], 0);
303 AUD_close_out(&s->card, s->dac_voice[0]);
b9d38e95 304 s->dac_voice[0] = NULL;
d8f699cb 305 }
73560bc8 306 s->codec.cts = 0;
d8f699cb
AZ		 307
308 enable =
309 (~s->dac_power & (1 << 15)) && /* PWDNC */
310 (~s->dac_power & (1 << 10)); /* DAPWDN */
73560bc8 311 if (!enable || !s->codec.tx_rate)
d8f699cb 312 return;
d8f699cb
AZ		 313
314 /* Force our own sampling rate even in slave DAC mode */
315 fmt.endianness = 0;
316 fmt.nchannels = 2;
73560bc8 317 fmt.freq = s->codec.tx_rate;
d8f699cb
AZ		 318 fmt.fmt = AUD_FMT_S16;
319
320 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
321 "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
73560bc8
AZ		 322 if (s->dac_voice[0]) {
323 s->codec.cts = 1;
d8f699cb 324 AUD_set_active_out(s->dac_voice[0], 1);
73560bc8 325 }
d8f699cb
AZ		 326}
327
bc24a225 328static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
3efda49d
AZ		 329{
330 switch (reg) {
331 case 0x00: /* X */
332 s->dav &= 0xfbff;
a5d7eb65 333 return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
3efda49d
AZ		 334 (s->noise & 3);
335
336 case 0x01: /* Y */
337 s->noise ++;
338 s->dav &= 0xfdff;
a5d7eb65 339 return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
3efda49d
AZ		 340 (s->noise & 3);
341
342 case 0x02: /* Z1 */
343 s->dav &= 0xfeff;
344 return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
345 (s->noise & 3);
346
347 case 0x03: /* Z2 */
348 s->dav &= 0xff7f;
349 return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
350 (s->noise & 3);
351
352 case 0x04: /* KPData */
a5d7eb65
AZ		 353 if ((s->model & 0xff00) == 0x2300) {
354 if (s->kb.intr && (s->kb.mode & 2)) {
355 s->kb.intr = 0;
356 qemu_irq_raise(s->kbint);
357 }
358 return s->kb.down;
359 }
360
3efda49d
AZ		 361 return 0xffff;
362
363 case 0x05: /* BAT1 */
364 s->dav &= 0xffbf;
8ef6367e
AZ		 365 return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
366 (s->noise & 6);
3efda49d
AZ		 367
368 case 0x06: /* BAT2 */
369 s->dav &= 0xffdf;
370 return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
371
372 case 0x07: /* AUX1 */
373 s->dav &= 0xffef;
374 return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
375
376 case 0x08: /* AUX2 */
377 s->dav &= 0xfff7;
378 return 0xffff;
379
380 case 0x09: /* TEMP1 */
381 s->dav &= 0xfffb;
8ef6367e
AZ		 382 return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
383 (s->noise & 5);
3efda49d
AZ		 384
385 case 0x0a: /* TEMP2 */
386 s->dav &= 0xfffd;
8ef6367e
AZ		 387 return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
388 (s->noise & 3);
3efda49d
AZ		 389
390 case 0x0b: /* DAC */
391 s->dav &= 0xfffe;
392 return 0xffff;
393
394 default:
395#ifdef TSC_VERBOSE
396 fprintf(stderr, "tsc2102_data_register_read: "
397 "no such register: 0x%02x\n", reg);
398#endif
399 return 0xffff;
400 }
401}
402
403static uint16_t tsc2102_control_register_read(
bc24a225 404 TSC210xState *s, int reg)
3efda49d
AZ		 405{
406 switch (reg) {
407 case 0x00: /* TSC ADC */
408 return (s->pressure << 15) | ((!s->busy) << 14) |
409 (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
410
a5d7eb65
AZ		 411 case 0x01: /* Status / Keypad Control */
412 if ((s->model & 0xff00) == 0x2100)
413 return (s->pin_func << 14) | ((!s->enabled) << 13) |
414 (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
415 else
416 return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
417 (s->kb.debounce << 11);
418
419 case 0x02: /* DAC Control */
420 if ((s->model & 0xff00) == 0x2300)
421 return s->dac_power & 0x8000;
422 else
423 goto bad_reg;
3efda49d
AZ		 424
425 case 0x03: /* Reference */
426 return s->ref;
427
428 case 0x04: /* Reset */
429 return 0xffff;
430
431 case 0x05: /* Configuration */
432 return s->timing;
433
a5d7eb65
AZ		 434 case 0x06: /* Secondary configuration */
435 if ((s->model & 0xff00) == 0x2100)
436 goto bad_reg;
437 return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
438
439 case 0x10: /* Keypad Mask */
440 if ((s->model & 0xff00) == 0x2100)
441 goto bad_reg;
442 return s->kb.mask;
443
3efda49d 444 default:
a5d7eb65 445 bad_reg:
3efda49d
AZ		 446#ifdef TSC_VERBOSE
447 fprintf(stderr, "tsc2102_control_register_read: "
448 "no such register: 0x%02x\n", reg);
449#endif
450 return 0xffff;
451 }
452}
453
bc24a225 454static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
3efda49d
AZ		 455{
456 int l_ch, r_ch;
457 uint16_t val;
458
459 switch (reg) {
460 case 0x00: /* Audio Control 1 */
461 return s->audio_ctrl1;
462
463 case 0x01:
464 return 0xff00;
465
466 case 0x02: /* DAC Volume Control */
467 return s->volume;
468
469 case 0x03:
470 return 0x8b00;
471
472 case 0x04: /* Audio Control 2 */
473 l_ch = 1;
474 r_ch = 1;
475 if (s->softstep && !(s->dac_power & (1 << 10))) {
bc72ad67 476 l_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
3efda49d 477 s->volume_change + TSC_SOFTSTEP_DELAY);
bc72ad67 478 r_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
3efda49d
AZ		 479 s->volume_change + TSC_SOFTSTEP_DELAY);
480 }
481
482 return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
483
484 case 0x05: /* Stereo DAC Power Control */
485 return 0x2aa0 | s->dac_power |
486 (((s->dac_power & (1 << 10)) &&
bc72ad67 487 (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
3efda49d
AZ		 488 s->powerdown + TSC_POWEROFF_DELAY)) << 6);
489
490 case 0x06: /* Audio Control 3 */
491 val = s->audio_ctrl3 | 0x0001;
492 s->audio_ctrl3 &= 0xff3f;
493 return val;
494
495 case 0x07: /* LCH_BASS_BOOST_N0 */
496 case 0x08: /* LCH_BASS_BOOST_N1 */
497 case 0x09: /* LCH_BASS_BOOST_N2 */
498 case 0x0a: /* LCH_BASS_BOOST_N3 */
499 case 0x0b: /* LCH_BASS_BOOST_N4 */
500 case 0x0c: /* LCH_BASS_BOOST_N5 */
501 case 0x0d: /* LCH_BASS_BOOST_D1 */
502 case 0x0e: /* LCH_BASS_BOOST_D2 */
503 case 0x0f: /* LCH_BASS_BOOST_D4 */
504 case 0x10: /* LCH_BASS_BOOST_D5 */
505 case 0x11: /* RCH_BASS_BOOST_N0 */
506 case 0x12: /* RCH_BASS_BOOST_N1 */
507 case 0x13: /* RCH_BASS_BOOST_N2 */
508 case 0x14: /* RCH_BASS_BOOST_N3 */
509 case 0x15: /* RCH_BASS_BOOST_N4 */
510 case 0x16: /* RCH_BASS_BOOST_N5 */
511 case 0x17: /* RCH_BASS_BOOST_D1 */
512 case 0x18: /* RCH_BASS_BOOST_D2 */
513 case 0x19: /* RCH_BASS_BOOST_D4 */
514 case 0x1a: /* RCH_BASS_BOOST_D5 */
515 return s->filter_data[reg - 0x07];
516
517 case 0x1b: /* PLL Programmability 1 */
518 return s->pll[0];
519
520 case 0x1c: /* PLL Programmability 2 */
521 return s->pll[1];
522
523 case 0x1d: /* Audio Control 4 */
524 return (!s->softstep) << 14;
525
526 default:
527#ifdef TSC_VERBOSE
528 fprintf(stderr, "tsc2102_audio_register_read: "
529 "no such register: 0x%02x\n", reg);
530#endif
531 return 0xffff;
532 }
533}
534
535static void tsc2102_data_register_write(
bc24a225 536 TSC210xState *s, int reg, uint16_t value)
3efda49d
AZ		 537{
538 switch (reg) {
539 case 0x00: /* X */
540 case 0x01: /* Y */
541 case 0x02: /* Z1 */
542 case 0x03: /* Z2 */
543 case 0x05: /* BAT1 */
544 case 0x06: /* BAT2 */
545 case 0x07: /* AUX1 */
546 case 0x08: /* AUX2 */
547 case 0x09: /* TEMP1 */
548 case 0x0a: /* TEMP2 */
549 return;
550
551 default:
552#ifdef TSC_VERBOSE
553 fprintf(stderr, "tsc2102_data_register_write: "
554 "no such register: 0x%02x\n", reg);
555#endif
556 }
557}
558
559static void tsc2102_control_register_write(
bc24a225 560 TSC210xState *s, int reg, uint16_t value)
3efda49d
AZ		 561{
562 switch (reg) {
563 case 0x00: /* TSC ADC */
564 s->host_mode = value >> 15;
565 s->enabled = !(value & 0x4000);
566 if (s->busy && !s->enabled)
bc72ad67 567 timer_del(s->timer);
3efda49d
AZ		 568 s->busy &= s->enabled;
569 s->nextfunction = (value >> 10) & 0xf;
570 s->nextprecision = (value >> 8) & 3;
571 s->filter = value & 0xff;
572 return;
573
a5d7eb65
AZ		 574 case 0x01: /* Status / Keypad Control */
575 if ((s->model & 0xff00) == 0x2100)
576 s->pin_func = value >> 14;
577 else {
578 s->kb.scan = (value >> 14) & 1;
579 s->kb.debounce = (value >> 11) & 7;
580 if (s->kb.intr && s->kb.scan) {
581 s->kb.intr = 0;
582 qemu_irq_raise(s->kbint);
583 }
584 }
3efda49d
AZ		 585 return;
586
a5d7eb65
AZ		 587 case 0x02: /* DAC Control */
588 if ((s->model & 0xff00) == 0x2300) {
589 s->dac_power &= 0x7fff;
590 s->dac_power |= 0x8000 & value;
591 } else
592 goto bad_reg;
593 break;
594
3efda49d
AZ		 595 case 0x03: /* Reference */
596 s->ref = value & 0x1f;
597 return;
598
599 case 0x04: /* Reset */
600 if (value == 0xbb00) {
601 if (s->busy)
bc72ad67 602 timer_del(s->timer);
3efda49d
AZ		 603 tsc210x_reset(s);
604#ifdef TSC_VERBOSE
605 } else {
606 fprintf(stderr, "tsc2102_control_register_write: "
607 "wrong value written into RESET\n");
608#endif
609 }
610 return;
611
612 case 0x05: /* Configuration */
613 s->timing = value & 0x3f;
614#ifdef TSC_VERBOSE
615 if (value & ~0x3f)
616 fprintf(stderr, "tsc2102_control_register_write: "
617 "wrong value written into CONFIG\n");
618#endif
619 return;
620
a5d7eb65
AZ		 621 case 0x06: /* Secondary configuration */
622 if ((s->model & 0xff00) == 0x2100)
623 goto bad_reg;
624 s->kb.mode = value >> 14;
625 s->pll[2] = value & 0x3ffff;
626 return;
627
628 case 0x10: /* Keypad Mask */
629 if ((s->model & 0xff00) == 0x2100)
630 goto bad_reg;
631 s->kb.mask = value;
632 return;
633
3efda49d 634 default:
a5d7eb65 635 bad_reg:
3efda49d
AZ		 636#ifdef TSC_VERBOSE
637 fprintf(stderr, "tsc2102_control_register_write: "
638 "no such register: 0x%02x\n", reg);
639#endif
640 }
641}
642
643static void tsc2102_audio_register_write(
bc24a225 644 TSC210xState *s, int reg, uint16_t value)
3efda49d
AZ		 645{
646 switch (reg) {
647 case 0x00: /* Audio Control 1 */
648 s->audio_ctrl1 = value & 0x0f3f;
649#ifdef TSC_VERBOSE
650 if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
651 fprintf(stderr, "tsc2102_audio_register_write: "
652 "wrong value written into Audio 1\n");
653#endif
73560bc8 654 tsc2102_audio_rate_update(s);
22d83b14 655 tsc2102_audio_output_update(s);
3efda49d
AZ		 656 return;
657
658 case 0x01:
659#ifdef TSC_VERBOSE
660 if (value != 0xff00)
661 fprintf(stderr, "tsc2102_audio_register_write: "
662 "wrong value written into reg 0x01\n");
663#endif
664 return;
665
666 case 0x02: /* DAC Volume Control */
667 s->volume = value;
bc72ad67 668 s->volume_change = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
3efda49d
AZ		 669 return;
670
671 case 0x03:
672#ifdef TSC_VERBOSE
673 if (value != 0x8b00)
674 fprintf(stderr, "tsc2102_audio_register_write: "
675 "wrong value written into reg 0x03\n");
676#endif
677 return;
678
679 case 0x04: /* Audio Control 2 */
680 s->audio_ctrl2 = value & 0xf7f2;
681#ifdef TSC_VERBOSE
682 if (value & ~0xf7fd)
683 fprintf(stderr, "tsc2102_audio_register_write: "
684 "wrong value written into Audio 2\n");
685#endif
686 return;
687
688 case 0x05: /* Stereo DAC Power Control */
689 if ((value & ~s->dac_power) & (1 << 10))
bc72ad67 690 s->powerdown = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
3efda49d
AZ		 691
692 s->dac_power = value & 0x9543;
693#ifdef TSC_VERBOSE
694 if ((value & ~0x9543) != 0x2aa0)
695 fprintf(stderr, "tsc2102_audio_register_write: "
696 "wrong value written into Power\n");
697#endif
73560bc8 698 tsc2102_audio_rate_update(s);
22d83b14 699 tsc2102_audio_output_update(s);
3efda49d
AZ		 700 return;
701
702 case 0x06: /* Audio Control 3 */
703 s->audio_ctrl3 &= 0x00c0;
704 s->audio_ctrl3 |= value & 0xf800;
705#ifdef TSC_VERBOSE
706 if (value & ~0xf8c7)
707 fprintf(stderr, "tsc2102_audio_register_write: "
708 "wrong value written into Audio 3\n");
709#endif
22d83b14 710 tsc2102_audio_output_update(s);
3efda49d
AZ		 711 return;
712
713 case 0x07: /* LCH_BASS_BOOST_N0 */
714 case 0x08: /* LCH_BASS_BOOST_N1 */
715 case 0x09: /* LCH_BASS_BOOST_N2 */
716 case 0x0a: /* LCH_BASS_BOOST_N3 */
717 case 0x0b: /* LCH_BASS_BOOST_N4 */
718 case 0x0c: /* LCH_BASS_BOOST_N5 */
719 case 0x0d: /* LCH_BASS_BOOST_D1 */
720 case 0x0e: /* LCH_BASS_BOOST_D2 */
721 case 0x0f: /* LCH_BASS_BOOST_D4 */
722 case 0x10: /* LCH_BASS_BOOST_D5 */
723 case 0x11: /* RCH_BASS_BOOST_N0 */
724 case 0x12: /* RCH_BASS_BOOST_N1 */
725 case 0x13: /* RCH_BASS_BOOST_N2 */
726 case 0x14: /* RCH_BASS_BOOST_N3 */
727 case 0x15: /* RCH_BASS_BOOST_N4 */
728 case 0x16: /* RCH_BASS_BOOST_N5 */
729 case 0x17: /* RCH_BASS_BOOST_D1 */
730 case 0x18: /* RCH_BASS_BOOST_D2 */
731 case 0x19: /* RCH_BASS_BOOST_D4 */
732 case 0x1a: /* RCH_BASS_BOOST_D5 */
733 s->filter_data[reg - 0x07] = value;
734 return;
735
736 case 0x1b: /* PLL Programmability 1 */
737 s->pll[0] = value & 0xfffc;
738#ifdef TSC_VERBOSE
739 if (value & ~0xfffc)
740 fprintf(stderr, "tsc2102_audio_register_write: "
741 "wrong value written into PLL 1\n");
742#endif
743 return;
744
745 case 0x1c: /* PLL Programmability 2 */
746 s->pll[1] = value & 0xfffc;
747#ifdef TSC_VERBOSE
748 if (value & ~0xfffc)
749 fprintf(stderr, "tsc2102_audio_register_write: "
750 "wrong value written into PLL 2\n");
751#endif
752 return;
753
754 case 0x1d: /* Audio Control 4 */
755 s->softstep = !(value & 0x4000);
756#ifdef TSC_VERBOSE
757 if (value & ~0x4000)
758 fprintf(stderr, "tsc2102_audio_register_write: "
759 "wrong value written into Audio 4\n");
760#endif
761 return;
762
763 default:
764#ifdef TSC_VERBOSE
765 fprintf(stderr, "tsc2102_audio_register_write: "
766 "no such register: 0x%02x\n", reg);
767#endif
768 }
769}
770
771/* This handles most of the chip logic. */
bc24a225 772static void tsc210x_pin_update(TSC210xState *s)
3efda49d
AZ		 773{
774 int64_t expires;
775 int pin_state;
776
777 switch (s->pin_func) {
778 case 0:
779 pin_state = s->pressure;
780 break;
781 case 1:
782 pin_state = !!s->dav;
783 break;
784 case 2:
785 default:
786 pin_state = s->pressure && !s->dav;
787 }
788
789 if (!s->enabled)
790 pin_state = 0;
791
792 if (pin_state != s->irq) {
793 s->irq = pin_state;
7fc42b4b 794 qemu_set_irq(s->pint, !s->irq);
3efda49d
AZ		 795 }
796
797 switch (s->nextfunction) {
798 case TSC_MODE_XY_SCAN:
799 case TSC_MODE_XYZ_SCAN:
800 if (!s->pressure)
801 return;
802 break;
803
804 case TSC_MODE_X:
805 case TSC_MODE_Y:
806 case TSC_MODE_Z:
807 if (!s->pressure)
808 return;
809 /* Fall through */
810 case TSC_MODE_BAT1:
811 case TSC_MODE_BAT2:
812 case TSC_MODE_AUX:
813 case TSC_MODE_TEMP1:
814 case TSC_MODE_TEMP2:
815 if (s->dav)
816 s->enabled = 0;
817 break;
818
819 case TSC_MODE_AUX_SCAN:
820 case TSC_MODE_PORT_SCAN:
821 break;
822
823 case TSC_MODE_NO_SCAN:
824 case TSC_MODE_XX_DRV:
825 case TSC_MODE_YY_DRV:
826 case TSC_MODE_YX_DRV:
827 default:
828 return;
829 }
830
a5d7eb65 831 if (!s->enabled || s->busy || s->dav)
3efda49d
AZ		 832 return;
833
834 s->busy = 1;
835 s->precision = s->nextprecision;
836 s->function = s->nextfunction;
bc72ad67
AB		 837 expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() >> 10);
838 timer_mod(s->timer, expires);
3efda49d
AZ		 839}
840
bc24a225 841static uint16_t tsc210x_read(TSC210xState *s)
3efda49d
AZ		 842{
843 uint16_t ret = 0x0000;
844
845 if (!s->command)
846 fprintf(stderr, "tsc210x_read: SPI underrun!\n");
847
848 switch (s->page) {
849 case TSC_DATA_REGISTERS_PAGE:
850 ret = tsc2102_data_register_read(s, s->offset);
a5d7eb65
AZ		 851 if (!s->dav)
852 qemu_irq_raise(s->davint);
3efda49d
AZ		 853 break;
854 case TSC_CONTROL_REGISTERS_PAGE:
855 ret = tsc2102_control_register_read(s, s->offset);
856 break;
857 case TSC_AUDIO_REGISTERS_PAGE:
858 ret = tsc2102_audio_register_read(s, s->offset);
859 break;
860 default:
2ac71179 861 hw_error("tsc210x_read: wrong memory page\n");
3efda49d
AZ		 862 }
863
864 tsc210x_pin_update(s);
865
866 /* Allow sequential reads. */
867 s->offset ++;
868 s->state = 0;
869 return ret;
870}
871
bc24a225 872static void tsc210x_write(TSC210xState *s, uint16_t value)
3efda49d
AZ		 873{
874 /*
875 * This is a two-state state machine for reading
876 * command and data every second time.
877 */
878 if (!s->state) {
879 s->command = value >> 15;
880 s->page = (value >> 11) & 0x0f;
881 s->offset = (value >> 5) & 0x3f;
882 s->state = 1;
883 } else {
884 if (s->command)
885 fprintf(stderr, "tsc210x_write: SPI overrun!\n");
886 else
887 switch (s->page) {
888 case TSC_DATA_REGISTERS_PAGE:
889 tsc2102_data_register_write(s, s->offset, value);
890 break;
891 case TSC_CONTROL_REGISTERS_PAGE:
892 tsc2102_control_register_write(s, s->offset, value);
893 break;
894 case TSC_AUDIO_REGISTERS_PAGE:
895 tsc2102_audio_register_write(s, s->offset, value);
896 break;
897 default:
2ac71179 898 hw_error("tsc210x_write: wrong memory page\n");
3efda49d
AZ		 899 }
900
901 tsc210x_pin_update(s);
902 s->state = 0;
903 }
904}
905
e927bb00 906uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
a5d7eb65 907{
bc24a225 908 TSC210xState *s = opaque;
a5d7eb65
AZ		 909 uint32_t ret = 0;
910
e927bb00 911 if (len != 16)
2ac71179 912 hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
e927bb00 913
a5d7eb65
AZ		 914 /* TODO: sequential reads etc - how do we make sure the host doesn't
915 * unintentionally read out a conversion result from a register while
916 * transmitting the command word of the next command? */
917 if (!value || (s->state && s->command))
918 ret = tsc210x_read(s);
919 if (value || (s->state && !s->command))
920 tsc210x_write(s, value);
921
922 return ret;
923}
924
3efda49d
AZ		 925static void tsc210x_timer_tick(void *opaque)
926{
bc24a225 927 TSC210xState *s = opaque;
3efda49d
AZ		 928
929 /* Timer ticked -- a set of conversions has been finished. */
930
931 if (!s->busy)
932 return;
933
934 s->busy = 0;
935 s->dav |= mode_regs[s->function];
936 tsc210x_pin_update(s);
a5d7eb65 937 qemu_irq_lower(s->davint);
3efda49d
AZ		 938}
939
940static void tsc210x_touchscreen_event(void *opaque,
941 int x, int y, int z, int buttons_state)
942{
bc24a225 943 TSC210xState *s = opaque;
3efda49d
AZ		 944 int p = s->pressure;
945
946 if (buttons_state) {
947 s->x = x;
948 s->y = y;
949 }
950 s->pressure = !!buttons_state;
951
952 /*
953 * Note: We would get better responsiveness in the guest by
954 * signaling TS events immediately, but for now we simulate
955 * the first conversion delay for sake of correctness.
956 */
957 if (p != s->pressure)
958 tsc210x_pin_update(s);
959}
960
bc24a225 961static void tsc210x_i2s_swallow(TSC210xState *s)
d8f699cb
AZ		 962{
963 if (s->dac_voice[0])
964 tsc210x_out_flush(s, s->codec.out.len);
965 else
966 s->codec.out.len = 0;
967}
968
bc24a225 969static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
d8f699cb
AZ		 970{
971 s->i2s_tx_rate = out;
972 s->i2s_rx_rate = in;
973}
974
3efda49d
AZ		 975static void tsc210x_save(QEMUFile *f, void *opaque)
976{
bc24a225 977 TSC210xState *s = (TSC210xState *) opaque;
bc72ad67 978 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
3efda49d
AZ		 979 int i;
980
981 qemu_put_be16(f, s->x);
982 qemu_put_be16(f, s->y);
983 qemu_put_byte(f, s->pressure);
984
985 qemu_put_byte(f, s->state);
986 qemu_put_byte(f, s->page);
987 qemu_put_byte(f, s->offset);
988 qemu_put_byte(f, s->command);
989
990 qemu_put_byte(f, s->irq);
991 qemu_put_be16s(f, &s->dav);
992
40daca54 993 timer_put(f, s->timer);
3efda49d
AZ		 994 qemu_put_byte(f, s->enabled);
995 qemu_put_byte(f, s->host_mode);
996 qemu_put_byte(f, s->function);
997 qemu_put_byte(f, s->nextfunction);
998 qemu_put_byte(f, s->precision);
999 qemu_put_byte(f, s->nextprecision);
1000 qemu_put_byte(f, s->filter);
1001 qemu_put_byte(f, s->pin_func);
1002 qemu_put_byte(f, s->ref);
1003 qemu_put_byte(f, s->timing);
1004 qemu_put_be32(f, s->noise);
1005
1006 qemu_put_be16s(f, &s->audio_ctrl1);
1007 qemu_put_be16s(f, &s->audio_ctrl2);
1008 qemu_put_be16s(f, &s->audio_ctrl3);
1009 qemu_put_be16s(f, &s->pll[0]);
1010 qemu_put_be16s(f, &s->pll[1]);
1011 qemu_put_be16s(f, &s->volume);
b6c4f71f
BS		 1012 qemu_put_sbe64(f, (s->volume_change - now));
1013 qemu_put_sbe64(f, (s->powerdown - now));
3efda49d
AZ		 1014 qemu_put_byte(f, s->softstep);
1015 qemu_put_be16s(f, &s->dac_power);
1016
1017 for (i = 0; i < 0x14; i ++)
1018 qemu_put_be16s(f, &s->filter_data[i]);
1019}
1020
1021static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
1022{
bc24a225 1023 TSC210xState *s = (TSC210xState *) opaque;
bc72ad67 1024 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
3efda49d
AZ		 1025 int i;
1026
1027 s->x = qemu_get_be16(f);
1028 s->y = qemu_get_be16(f);
1029 s->pressure = qemu_get_byte(f);
1030
1031 s->state = qemu_get_byte(f);
1032 s->page = qemu_get_byte(f);
1033 s->offset = qemu_get_byte(f);
1034 s->command = qemu_get_byte(f);
1035
1036 s->irq = qemu_get_byte(f);
1037 qemu_get_be16s(f, &s->dav);
1038
40daca54 1039 timer_get(f, s->timer);
3efda49d
AZ		 1040 s->enabled = qemu_get_byte(f);
1041 s->host_mode = qemu_get_byte(f);
1042 s->function = qemu_get_byte(f);
5193be3b
MT		 1043 if (s->function < 0 || s->function >= ARRAY_SIZE(mode_regs)) {
1044 return -EINVAL;
1045 }
3efda49d 1046 s->nextfunction = qemu_get_byte(f);
5193be3b
MT		 1047 if (s->nextfunction < 0 || s->nextfunction >= ARRAY_SIZE(mode_regs)) {
1048 return -EINVAL;
1049 }
3efda49d 1050 s->precision = qemu_get_byte(f);
5193be3b
MT		 1051 if (s->precision < 0 || s->precision >= ARRAY_SIZE(resolution)) {
1052 return -EINVAL;
1053 }
3efda49d 1054 s->nextprecision = qemu_get_byte(f);
5193be3b
MT		 1055 if (s->nextprecision < 0 || s->nextprecision >= ARRAY_SIZE(resolution)) {
1056 return -EINVAL;
1057 }
3efda49d
AZ		 1058 s->filter = qemu_get_byte(f);
1059 s->pin_func = qemu_get_byte(f);
1060 s->ref = qemu_get_byte(f);
1061 s->timing = qemu_get_byte(f);
1062 s->noise = qemu_get_be32(f);
1063
1064 qemu_get_be16s(f, &s->audio_ctrl1);
1065 qemu_get_be16s(f, &s->audio_ctrl2);
1066 qemu_get_be16s(f, &s->audio_ctrl3);
1067 qemu_get_be16s(f, &s->pll[0]);
1068 qemu_get_be16s(f, &s->pll[1]);
1069 qemu_get_be16s(f, &s->volume);
b6c4f71f
BS		 1070 s->volume_change = qemu_get_sbe64(f) + now;
1071 s->powerdown = qemu_get_sbe64(f) + now;
3efda49d
AZ		 1072 s->softstep = qemu_get_byte(f);
1073 qemu_get_be16s(f, &s->dac_power);
1074
1075 for (i = 0; i < 0x14; i ++)
1076 qemu_get_be16s(f, &s->filter_data[i]);
1077
e93379b0 1078 s->busy = timer_pending(s->timer);
7fc42b4b 1079 qemu_set_irq(s->pint, !s->irq);
a5d7eb65 1080 qemu_set_irq(s->davint, !s->dav);
3efda49d
AZ		 1081
1082 return 0;
1083}
1084
22d83b14 1085uWireSlave *tsc2102_init(qemu_irq pint)
3efda49d 1086{
bc24a225 1087 TSC210xState *s;
3efda49d 1088
bc24a225 1089 s = (TSC210xState *)
7267c094 1090 g_malloc0(sizeof(TSC210xState));
bc24a225 1091 memset(s, 0, sizeof(TSC210xState));
3efda49d
AZ		 1092 s->x = 160;
1093 s->y = 160;
1094 s->pressure = 0;
1095 s->precision = s->nextprecision = 0;
bc72ad67 1096 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
3efda49d 1097 s->pint = pint;
a5d7eb65 1098 s->model = 0x2102;
d8f699cb 1099 s->name = "tsc2102";
3efda49d 1100
a5d7eb65
AZ		 1101 s->tr[0] = 0;
1102 s->tr[1] = 1;
e927bb00
AZ		 1103 s->tr[2] = 1;
1104 s->tr[3] = 0;
a5d7eb65
AZ		 1105 s->tr[4] = 1;
1106 s->tr[5] = 0;
e927bb00
AZ		 1107 s->tr[6] = 1;
1108 s->tr[7] = 0;
a5d7eb65 1109
3efda49d
AZ		 1110 s->chip.opaque = s;
1111 s->chip.send = (void *) tsc210x_write;
1112 s->chip.receive = (void *) tsc210x_read;
1113
d8f699cb
AZ		 1114 s->codec.opaque = s;
1115 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1116 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1117 s->codec.in.fifo = s->in_fifo;
1118 s->codec.out.fifo = s->out_fifo;
1119
3efda49d
AZ		 1120 tsc210x_reset(s);
1121
1122 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1123 "QEMU TSC2102-driven Touchscreen");
1124
1a7dafce 1125 AUD_register_card(s->name, &s->card);
d8f699cb 1126
a08d4367 1127 qemu_register_reset((void *) tsc210x_reset, s);
0be71e32 1128 register_savevm(NULL, s->name, -1, 0,
3efda49d
AZ		 1129 tsc210x_save, tsc210x_load, s);
1130
1131 return &s->chip;
1132}
d8f699cb 1133
22d83b14 1134uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
a5d7eb65 1135{
bc24a225 1136 TSC210xState *s;
a5d7eb65 1137
bc24a225 1138 s = (TSC210xState *)
7267c094 1139 g_malloc0(sizeof(TSC210xState));
bc24a225 1140 memset(s, 0, sizeof(TSC210xState));
a5d7eb65
AZ		 1141 s->x = 400;
1142 s->y = 240;
1143 s->pressure = 0;
1144 s->precision = s->nextprecision = 0;
bc72ad67 1145 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
a5d7eb65
AZ		 1146 s->pint = penirq;
1147 s->kbint = kbirq;
1148 s->davint = dav;
1149 s->model = 0x2301;
1150 s->name = "tsc2301";
a5d7eb65
AZ		 1151
1152 s->tr[0] = 0;
1153 s->tr[1] = 1;
e927bb00
AZ		 1154 s->tr[2] = 1;
1155 s->tr[3] = 0;
a5d7eb65
AZ		 1156 s->tr[4] = 1;
1157 s->tr[5] = 0;
e927bb00
AZ		 1158 s->tr[6] = 1;
1159 s->tr[7] = 0;
a5d7eb65
AZ		 1160
1161 s->chip.opaque = s;
1162 s->chip.send = (void *) tsc210x_write;
1163 s->chip.receive = (void *) tsc210x_read;
1164
1165 s->codec.opaque = s;
1166 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1167 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1168 s->codec.in.fifo = s->in_fifo;
1169 s->codec.out.fifo = s->out_fifo;
1170
1171 tsc210x_reset(s);
1172
1173 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1174 "QEMU TSC2301-driven Touchscreen");
1175
1a7dafce 1176 AUD_register_card(s->name, &s->card);
a5d7eb65 1177
a08d4367 1178 qemu_register_reset((void *) tsc210x_reset, s);
0be71e32 1179 register_savevm(NULL, s->name, -1, 0, tsc210x_save, tsc210x_load, s);
a5d7eb65
AZ		 1180
1181 return &s->chip;
1182}
1183
bc24a225 1184I2SCodec *tsc210x_codec(uWireSlave *chip)
d8f699cb 1185{
bc24a225 1186 TSC210xState *s = (TSC210xState *) chip->opaque;
d8f699cb
AZ		 1187
1188 return &s->codec;
1189}
a5d7eb65
AZ		 1190
1191/*
1192 * Use tslib generated calibration data to generate ADC input values
1193 * from the touchscreen. Assuming 12-bit precision was used during
1194 * tslib calibration.
1195 */
bc24a225
PB		 1196void tsc210x_set_transform(uWireSlave *chip,
1197 MouseTransformInfo *info)
a5d7eb65 1198{
bc24a225 1199 TSC210xState *s = (TSC210xState *) chip->opaque;
a5d7eb65
AZ		 1200#if 0
1201 int64_t ltr[8];
1202
1203 ltr[0] = (int64_t) info->a[1] * info->y;
1204 ltr[1] = (int64_t) info->a[4] * info->x;
1205 ltr[2] = (int64_t) info->a[1] * info->a[3] -
1206 (int64_t) info->a[4] * info->a[0];
1207 ltr[3] = (int64_t) info->a[2] * info->a[4] -
1208 (int64_t) info->a[5] * info->a[1];
1209 ltr[4] = (int64_t) info->a[0] * info->y;
1210 ltr[5] = (int64_t) info->a[3] * info->x;
1211 ltr[6] = (int64_t) info->a[4] * info->a[0] -
1212 (int64_t) info->a[1] * info->a[3];
1213 ltr[7] = (int64_t) info->a[2] * info->a[3] -
1214 (int64_t) info->a[5] * info->a[0];
1215
1216 /* Avoid integer overflow */
1217 s->tr[0] = ltr[0] >> 11;
1218 s->tr[1] = ltr[1] >> 11;
1219 s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
1220 s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
1221 s->tr[4] = ltr[4] >> 11;
1222 s->tr[5] = ltr[5] >> 11;
1223 s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
1224 s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
1225#else
1226
1227 /* This version assumes touchscreen X & Y axis are parallel or
1228 * perpendicular to LCD's X & Y axis in some way. */
1229 if (abs(info->a[0]) > abs(info->a[1])) {
1230 s->tr[0] = 0;
1231 s->tr[1] = -info->a[6] * info->x;
1232 s->tr[2] = info->a[0];
1233 s->tr[3] = -info->a[2] / info->a[0];
1234 s->tr[4] = info->a[6] * info->y;
1235 s->tr[5] = 0;
1236 s->tr[6] = info->a[4];
1237 s->tr[7] = -info->a[5] / info->a[4];
1238 } else {
1239 s->tr[0] = info->a[6] * info->y;
1240 s->tr[1] = 0;
1241 s->tr[2] = info->a[1];
1242 s->tr[3] = -info->a[2] / info->a[1];
1243 s->tr[4] = 0;
1244 s->tr[5] = -info->a[6] * info->x;
1245 s->tr[6] = info->a[3];
1246 s->tr[7] = -info->a[5] / info->a[3];
1247 }
1248
1249 s->tr[0] >>= 11;
1250 s->tr[1] >>= 11;
1251 s->tr[3] <<= 4;
1252 s->tr[4] >>= 11;
1253 s->tr[5] >>= 11;
1254 s->tr[7] <<= 4;
1255#endif
1256}
1257
bc24a225 1258void tsc210x_key_event(uWireSlave *chip, int key, int down)
a5d7eb65 1259{
bc24a225 1260 TSC210xState *s = (TSC210xState *) chip->opaque;
a5d7eb65
AZ		 1261
1262 if (down)
1263 s->kb.down |= 1 << key;
1264 else
1265 s->kb.down &= ~(1 << key);
1266
1267 if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
1268 s->kb.intr = 1;
1269 qemu_irq_lower(s->kbint);
1270 } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
1271 !(s->kb.mode & 1)) {
1272 s->kb.intr = 0;
1273 qemu_irq_raise(s->kbint);
1274 }
1275}
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