]> Git Repo - qemu.git/blame - target/hppa/gdbstub.c
target/hppa: Implement tlb_fill
[qemu.git] / target / hppa / gdbstub.c
CommitLineData
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1/*
2 * HPPA gdb server stub
3 *
4 * Copyright (c) 2016 Richard Henderson <[email protected]>
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "qemu/osdep.h"
21#include "qemu-common.h"
22#include "cpu.h"
23#include "exec/gdbstub.h"
24
25int hppa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
26{
27 HPPACPU *cpu = HPPA_CPU(cs);
28 CPUHPPAState *env = &cpu->env;
eaa3783b 29 target_ureg val;
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30
31 switch (n) {
32 case 0:
33 val = cpu_hppa_get_psw(env);
34 break;
35 case 1 ... 31:
36 val = env->gr[n];
37 break;
38 case 32:
35136a77 39 val = env->cr[CR_SAR];
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40 break;
41 case 33:
42 val = env->iaoq_f;
43 break;
44 case 35:
45 val = env->iaoq_b;
46 break;
47 case 59:
35136a77 48 val = env->cr[26];
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49 break;
50 case 60:
35136a77 51 val = env->cr[27];
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52 break;
53 case 64 ... 127:
54 val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
55 break;
56 default:
57 if (n < 128) {
58 val = 0;
59 } else {
60 return 0;
61 }
62 break;
63 }
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64
65 if (TARGET_REGISTER_BITS == 64) {
66 return gdb_get_reg64(mem_buf, val);
67 } else {
68 return gdb_get_reg32(mem_buf, val);
69 }
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70}
71
72int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
73{
74 HPPACPU *cpu = HPPA_CPU(cs);
75 CPUHPPAState *env = &cpu->env;
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76 target_ureg val;
77
78 if (TARGET_REGISTER_BITS == 64) {
79 val = ldq_p(mem_buf);
80 } else {
81 val = ldl_p(mem_buf);
82 }
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83
84 switch (n) {
85 case 0:
86 cpu_hppa_put_psw(env, val);
87 break;
88 case 1 ... 31:
89 env->gr[n] = val;
90 break;
91 case 32:
35136a77 92 env->cr[CR_SAR] = val;
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93 break;
94 case 33:
95 env->iaoq_f = val;
96 break;
97 case 35:
98 env->iaoq_b = val;
6836a8fb 99 break;
61766fe9 100 case 59:
35136a77 101 env->cr[26] = val;
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102 break;
103 case 60:
35136a77 104 env->cr[27] = val;
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105 break;
106 case 64:
107 env->fr[0] = deposit64(env->fr[0], 32, 32, val);
108 cpu_hppa_loaded_fr0(env);
109 break;
110 case 65 ... 127:
111 {
112 uint64_t *fr = &env->fr[(n - 64) / 2];
113 *fr = deposit64(*fr, val, (n & 1 ? 0 : 32), 32);
114 }
115 break;
116 default:
117 if (n >= 128) {
118 return 0;
119 }
120 break;
121 }
eaa3783b 122 return sizeof(target_ureg);
61766fe9 123}
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