]> Git Repo - qemu.git/blame - hw/core/or-irq.c
Include hw/irq.h a lot less
[qemu.git] / hw / core / or-irq.c
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1/*
2 * QEMU IRQ/GPIO common code.
3 *
4 * Copyright (c) 2016 Alistair Francis <[email protected]>.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25#include "qemu/osdep.h"
64552b6b 26#include "hw/irq.h"
1b255677 27#include "hw/or-irq.h"
0b8fa32f 28#include "qemu/module.h"
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29
30static void or_irq_handler(void *opaque, int n, int level)
31{
32 qemu_or_irq *s = OR_IRQ(opaque);
33 int or_level = 0;
34 int i;
35
36 s->levels[n] = level;
37
38 for (i = 0; i < s->num_lines; i++) {
39 or_level |= s->levels[i];
40 }
41
42 qemu_set_irq(s->out_irq, or_level);
43}
44
45static void or_irq_reset(DeviceState *dev)
46{
47 qemu_or_irq *s = OR_IRQ(dev);
48 int i;
49
50 for (i = 0; i < MAX_OR_LINES; i++) {
51 s->levels[i] = false;
52 }
53}
54
55static void or_irq_realize(DeviceState *dev, Error **errp)
56{
57 qemu_or_irq *s = OR_IRQ(dev);
58
59 assert(s->num_lines < MAX_OR_LINES);
60
61 qdev_init_gpio_in(dev, or_irq_handler, s->num_lines);
62}
63
64static void or_irq_init(Object *obj)
65{
66 qemu_or_irq *s = OR_IRQ(obj);
67
68 qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
69}
70
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71/* The original version of this device had a fixed 16 entries in its
72 * VMState array; devices with more inputs than this need to
73 * migrate the extra lines via a subsection.
74 * The subsection migrates as much of the levels[] array as is needed
75 * (including repeating the first 16 elements), to avoid the awkwardness
76 * of splitting it in two to meet the requirements of VMSTATE_VARRAY_UINT16.
77 */
78#define OLD_MAX_OR_LINES 16
79#if MAX_OR_LINES < OLD_MAX_OR_LINES
80#error MAX_OR_LINES must be at least 16 for migration compatibility
81#endif
82
83static bool vmstate_extras_needed(void *opaque)
84{
85 qemu_or_irq *s = OR_IRQ(opaque);
86
87 return s->num_lines >= OLD_MAX_OR_LINES;
88}
89
90static const VMStateDescription vmstate_or_irq_extras = {
91 .name = "or-irq-extras",
92 .version_id = 1,
93 .minimum_version_id = 1,
94 .needed = vmstate_extras_needed,
95 .fields = (VMStateField[]) {
96 VMSTATE_VARRAY_UINT16_UNSAFE(levels, qemu_or_irq, num_lines, 0,
97 vmstate_info_bool, bool),
98 VMSTATE_END_OF_LIST(),
99 },
100};
101
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102static const VMStateDescription vmstate_or_irq = {
103 .name = TYPE_OR_IRQ,
104 .version_id = 1,
105 .minimum_version_id = 1,
106 .fields = (VMStateField[]) {
f81804a5 107 VMSTATE_BOOL_SUB_ARRAY(levels, qemu_or_irq, 0, OLD_MAX_OR_LINES),
1b255677 108 VMSTATE_END_OF_LIST(),
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109 },
110 .subsections = (const VMStateDescription*[]) {
111 &vmstate_or_irq_extras,
112 NULL
113 },
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114};
115
116static Property or_irq_properties[] = {
117 DEFINE_PROP_UINT16("num-lines", qemu_or_irq, num_lines, 1),
118 DEFINE_PROP_END_OF_LIST(),
119};
120
121static void or_irq_class_init(ObjectClass *klass, void *data)
122{
123 DeviceClass *dc = DEVICE_CLASS(klass);
124
125 dc->reset = or_irq_reset;
126 dc->props = or_irq_properties;
127 dc->realize = or_irq_realize;
128 dc->vmsd = &vmstate_or_irq;
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129
130 /* Reason: Needs to be wired up to work, e.g. see stm32f205_soc.c */
e90f2a8c 131 dc->user_creatable = false;
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132}
133
134static const TypeInfo or_irq_type_info = {
135 .name = TYPE_OR_IRQ,
136 .parent = TYPE_DEVICE,
137 .instance_size = sizeof(qemu_or_irq),
138 .instance_init = or_irq_init,
139 .class_init = or_irq_class_init,
140};
141
142static void or_irq_register_types(void)
143{
144 type_register_static(&or_irq_type_info);
145}
146
147type_init(or_irq_register_types)
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