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Commit | Line | Data |
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29e4bcb2 AF |
1 | /* |
2 | * QEMU S/390 CPU | |
3 | * | |
1ac1a749 AF |
4 | * Copyright (c) 2009 Ulrich Hecht |
5 | * Copyright (c) 2011 Alexander Graf | |
29e4bcb2 | 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
70bada03 | 7 | * Copyright (c) 2012 IBM Corp. |
29e4bcb2 AF |
8 | * |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2.1 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see | |
21 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
70bada03 JF |
22 | * Contributions after 2012-12-11 are licensed under the terms of the |
23 | * GNU GPL, version 2 or (at your option) any later version. | |
29e4bcb2 AF |
24 | */ |
25 | ||
9615495a | 26 | #include "qemu/osdep.h" |
da34e65c | 27 | #include "qapi/error.h" |
564b863d | 28 | #include "cpu.h" |
29e4bcb2 | 29 | #include "qemu-common.h" |
f348b6d1 | 30 | #include "qemu/cutils.h" |
1de7afc9 | 31 | #include "qemu/timer.h" |
eb24f7c6 | 32 | #include "qemu/error-report.h" |
eb24f7c6 | 33 | #include "trace.h" |
96b1a8bb | 34 | #include "qapi/visitor.h" |
741da0d3 | 35 | #include "migration/vmstate.h" |
63c91552 | 36 | #include "exec/exec-all.h" |
c7396bbb | 37 | #ifndef CONFIG_USER_ONLY |
741da0d3 | 38 | #include "hw/hw.h" |
904e5fd5 | 39 | #include "sysemu/arch_init.h" |
96b1a8bb | 40 | #include "sysemu/sysemu.h" |
a006b67f | 41 | #include "hw/s390x/sclp.h" |
904e5fd5 VM |
42 | #endif |
43 | ||
70bada03 JF |
44 | #define CR0_RESET 0xE0UL |
45 | #define CR14_RESET 0xC2000000UL; | |
46 | ||
904e5fd5 VM |
47 | /* generate CPU information for cpu -? */ |
48 | void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
49 | { | |
50 | #ifdef CONFIG_KVM | |
51 | (*cpu_fprintf)(f, "s390 %16s\n", "host"); | |
52 | #endif | |
53 | } | |
29e4bcb2 | 54 | |
904e5fd5 VM |
55 | #ifndef CONFIG_USER_ONLY |
56 | CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) | |
57 | { | |
58 | CpuDefinitionInfoList *entry; | |
59 | CpuDefinitionInfo *info; | |
60 | ||
61 | info = g_malloc0(sizeof(*info)); | |
62 | info->name = g_strdup("host"); | |
63 | ||
64 | entry = g_malloc0(sizeof(*entry)); | |
65 | entry->value = info; | |
66 | ||
67 | return entry; | |
68 | } | |
69 | #endif | |
29e4bcb2 | 70 | |
f45748f1 AF |
71 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
72 | { | |
73 | S390CPU *cpu = S390_CPU(cs); | |
74 | ||
75 | cpu->env.psw.addr = value; | |
76 | } | |
77 | ||
8c2e1b00 AF |
78 | static bool s390_cpu_has_work(CPUState *cs) |
79 | { | |
80 | S390CPU *cpu = S390_CPU(cs); | |
81 | CPUS390XState *env = &cpu->env; | |
82 | ||
83 | return (cs->interrupt_request & CPU_INTERRUPT_HARD) && | |
84 | (env->psw.mask & PSW_MASK_EXT); | |
85 | } | |
86 | ||
29c6157c CB |
87 | #if !defined(CONFIG_USER_ONLY) |
88 | /* S390CPUClass::load_normal() */ | |
89 | static void s390_cpu_load_normal(CPUState *s) | |
90 | { | |
91 | S390CPU *cpu = S390_CPU(s); | |
fdfba1a2 | 92 | cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; |
29c6157c | 93 | cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64; |
eb24f7c6 | 94 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); |
29c6157c CB |
95 | } |
96 | #endif | |
97 | ||
f5ae2a4f | 98 | /* S390CPUClass::cpu_reset() */ |
29e4bcb2 AF |
99 | static void s390_cpu_reset(CPUState *s) |
100 | { | |
101 | S390CPU *cpu = S390_CPU(s); | |
102 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
103 | CPUS390XState *env = &cpu->env; | |
104 | ||
819bd309 | 105 | env->pfault_token = -1UL; |
f5ae2a4f | 106 | scc->parent_reset(s); |
18ff9494 | 107 | cpu->env.sigp_order = 0; |
eb24f7c6 | 108 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); |
00c8cb0a | 109 | tlb_flush(s, 1); |
f5ae2a4f CB |
110 | } |
111 | ||
112 | /* S390CPUClass::initial_reset() */ | |
113 | static void s390_cpu_initial_reset(CPUState *s) | |
114 | { | |
115 | S390CPU *cpu = S390_CPU(s); | |
116 | CPUS390XState *env = &cpu->env; | |
cc0d079d | 117 | int i; |
f5ae2a4f CB |
118 | |
119 | s390_cpu_reset(s); | |
120 | /* initial reset does not touch regs,fregs and aregs */ | |
f0c3c505 | 121 | memset(&env->fpc, 0, offsetof(CPUS390XState, cpu_num) - |
f5ae2a4f CB |
122 | offsetof(CPUS390XState, fpc)); |
123 | ||
124 | /* architectured initial values for CR 0 and 14 */ | |
125 | env->cregs[0] = CR0_RESET; | |
126 | env->cregs[14] = CR14_RESET; | |
819bd309 | 127 | |
3da0ab35 AJ |
128 | /* architectured initial value for Breaking-Event-Address register */ |
129 | env->gbea = 1; | |
130 | ||
819bd309 | 131 | env->pfault_token = -1UL; |
7107e5a7 | 132 | env->ext_index = -1; |
cc0d079d AJ |
133 | for (i = 0; i < ARRAY_SIZE(env->io_index); i++) { |
134 | env->io_index[i] = -1; | |
135 | } | |
49f5c9e9 | 136 | |
4a33565f AJ |
137 | /* tininess for underflow is detected before rounding */ |
138 | set_float_detect_tininess(float_tininess_before_rounding, | |
139 | &env->fpu_status); | |
140 | ||
49f5c9e9 TH |
141 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
142 | if (kvm_enabled()) { | |
99607144 | 143 | kvm_s390_reset_vcpu(cpu); |
49f5c9e9 | 144 | } |
cbed0ba7 | 145 | tlb_flush(s, 1); |
f5ae2a4f CB |
146 | } |
147 | ||
148 | /* CPUClass:reset() */ | |
149 | static void s390_cpu_full_reset(CPUState *s) | |
150 | { | |
151 | S390CPU *cpu = S390_CPU(s); | |
152 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
153 | CPUS390XState *env = &cpu->env; | |
cc0d079d | 154 | int i; |
f5ae2a4f | 155 | |
29e4bcb2 | 156 | scc->parent_reset(s); |
18ff9494 | 157 | cpu->env.sigp_order = 0; |
eb24f7c6 | 158 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); |
29e4bcb2 | 159 | |
f0c3c505 | 160 | memset(env, 0, offsetof(CPUS390XState, cpu_num)); |
70bada03 JF |
161 | |
162 | /* architectured initial values for CR 0 and 14 */ | |
163 | env->cregs[0] = CR0_RESET; | |
164 | env->cregs[14] = CR14_RESET; | |
819bd309 | 165 | |
3da0ab35 AJ |
166 | /* architectured initial value for Breaking-Event-Address register */ |
167 | env->gbea = 1; | |
168 | ||
819bd309 | 169 | env->pfault_token = -1UL; |
7107e5a7 | 170 | env->ext_index = -1; |
cc0d079d AJ |
171 | for (i = 0; i < ARRAY_SIZE(env->io_index); i++) { |
172 | env->io_index[i] = -1; | |
173 | } | |
819bd309 | 174 | |
4a33565f AJ |
175 | /* tininess for underflow is detected before rounding */ |
176 | set_float_detect_tininess(float_tininess_before_rounding, | |
177 | &env->fpu_status); | |
178 | ||
99607144 | 179 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
50a2c6e5 PB |
180 | if (kvm_enabled()) { |
181 | kvm_s390_reset_vcpu(cpu); | |
182 | } | |
00c8cb0a | 183 | tlb_flush(s, 1); |
29e4bcb2 AF |
184 | } |
185 | ||
70bada03 JF |
186 | #if !defined(CONFIG_USER_ONLY) |
187 | static void s390_cpu_machine_reset_cb(void *opaque) | |
188 | { | |
189 | S390CPU *cpu = opaque; | |
190 | ||
1fad8b3b | 191 | run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, CPU(cpu)); |
70bada03 JF |
192 | } |
193 | #endif | |
194 | ||
dbad6b74 PC |
195 | static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) |
196 | { | |
197 | info->mach = bfd_mach_s390_64; | |
198 | info->print_insn = print_insn_s390; | |
199 | } | |
200 | ||
1f136632 AF |
201 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
202 | { | |
14a10fc3 | 203 | CPUState *cs = CPU(dev); |
1f136632 | 204 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
c6644fc8 MR |
205 | S390CPU *cpu = S390_CPU(dev); |
206 | CPUS390XState *env = &cpu->env; | |
207 | Error *err = NULL; | |
208 | ||
96b1a8bb MR |
209 | #if !defined(CONFIG_USER_ONLY) |
210 | if (cpu->id >= max_cpus) { | |
211 | error_setg(&err, "Unable to add CPU: %" PRIi64 | |
212 | ", max allowed: %d", cpu->id, max_cpus - 1); | |
213 | goto out; | |
214 | } | |
215 | #endif | |
216 | if (cpu_exists(cpu->id)) { | |
217 | error_setg(&err, "Unable to add CPU: %" PRIi64 | |
218 | ", it already exists", cpu->id); | |
219 | goto out; | |
220 | } | |
221 | if (cpu->id != scc->next_cpu_id) { | |
222 | error_setg(&err, "Unable to add CPU: %" PRIi64 | |
223 | ", The next available id is %" PRIi64, cpu->id, | |
224 | scc->next_cpu_id); | |
225 | goto out; | |
226 | } | |
227 | ||
c6644fc8 MR |
228 | cpu_exec_init(cs, &err); |
229 | if (err != NULL) { | |
96b1a8bb | 230 | goto out; |
c6644fc8 | 231 | } |
96b1a8bb | 232 | scc->next_cpu_id++; |
1f136632 | 233 | |
c6644fc8 MR |
234 | #if !defined(CONFIG_USER_ONLY) |
235 | qemu_register_reset(s390_cpu_machine_reset_cb, cpu); | |
236 | #endif | |
96b1a8bb | 237 | env->cpu_num = cpu->id; |
73d510c9 | 238 | s390_cpu_gdb_init(cs); |
14a10fc3 | 239 | qemu_init_vcpu(cs); |
159855f0 DH |
240 | #if !defined(CONFIG_USER_ONLY) |
241 | run_on_cpu(cs, s390_do_cpu_full_reset, cs); | |
242 | #else | |
14a10fc3 | 243 | cpu_reset(cs); |
159855f0 | 244 | #endif |
1f136632 | 245 | |
96b1a8bb MR |
246 | scc->parent_realize(dev, &err); |
247 | ||
a006b67f MR |
248 | #if !defined(CONFIG_USER_ONLY) |
249 | if (dev->hotplugged) { | |
250 | raise_irq_cpu_hotplug(); | |
251 | } | |
252 | #endif | |
253 | ||
96b1a8bb MR |
254 | out: |
255 | error_propagate(errp, err); | |
256 | } | |
257 | ||
258 | static void s390x_cpu_get_id(Object *obj, Visitor *v, const char *name, | |
259 | void *opaque, Error **errp) | |
260 | { | |
261 | S390CPU *cpu = S390_CPU(obj); | |
262 | int64_t value = cpu->id; | |
263 | ||
264 | visit_type_int(v, name, &value, errp); | |
265 | } | |
266 | ||
267 | static void s390x_cpu_set_id(Object *obj, Visitor *v, const char *name, | |
268 | void *opaque, Error **errp) | |
269 | { | |
270 | S390CPU *cpu = S390_CPU(obj); | |
271 | DeviceState *dev = DEVICE(obj); | |
272 | const int64_t min = 0; | |
273 | const int64_t max = UINT32_MAX; | |
274 | Error *err = NULL; | |
275 | int64_t value; | |
276 | ||
277 | if (dev->realized) { | |
278 | error_setg(errp, "Attempt to set property '%s' on '%s' after " | |
279 | "it was realized", name, object_get_typename(obj)); | |
280 | return; | |
281 | } | |
282 | ||
283 | visit_type_int(v, name, &value, &err); | |
284 | if (err) { | |
285 | error_propagate(errp, err); | |
286 | return; | |
287 | } | |
288 | if (value < min || value > max) { | |
289 | error_setg(errp, "Property %s.%s doesn't take value %" PRId64 | |
290 | " (minimum: %" PRId64 ", maximum: %" PRId64 ")" , | |
291 | object_get_typename(obj), name, value, min, max); | |
292 | return; | |
293 | } | |
294 | cpu->id = value; | |
1f136632 AF |
295 | } |
296 | ||
8f22e0df AF |
297 | static void s390_cpu_initfn(Object *obj) |
298 | { | |
c05efcb1 | 299 | CPUState *cs = CPU(obj); |
8f22e0df AF |
300 | S390CPU *cpu = S390_CPU(obj); |
301 | CPUS390XState *env = &cpu->env; | |
2b7ac767 | 302 | static bool inited; |
8f22e0df AF |
303 | #if !defined(CONFIG_USER_ONLY) |
304 | struct tm tm; | |
305 | #endif | |
306 | ||
c05efcb1 | 307 | cs->env_ptr = env; |
ef3027af MR |
308 | cs->halted = 1; |
309 | cs->exception_index = EXCP_HLT; | |
96b1a8bb MR |
310 | object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id, |
311 | s390x_cpu_set_id, NULL, NULL, NULL); | |
8f22e0df AF |
312 | #if !defined(CONFIG_USER_ONLY) |
313 | qemu_get_timedate(&tm, 0); | |
314 | env->tod_offset = TOD_UNIX_EPOCH + | |
315 | (time2tod(mktimegm(&tm)) * 1000000000ULL); | |
316 | env->tod_basetime = 0; | |
bc72ad67 AB |
317 | env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); |
318 | env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); | |
eb24f7c6 | 319 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); |
8f22e0df | 320 | #endif |
2b7ac767 AF |
321 | |
322 | if (tcg_enabled() && !inited) { | |
323 | inited = true; | |
324 | s390x_translate_init(); | |
325 | } | |
8f22e0df AF |
326 | } |
327 | ||
d5627ce8 AF |
328 | static void s390_cpu_finalize(Object *obj) |
329 | { | |
330 | #if !defined(CONFIG_USER_ONLY) | |
331 | S390CPU *cpu = S390_CPU(obj); | |
332 | ||
333 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | |
3cda44f7 | 334 | g_free(cpu->irqstate); |
d5627ce8 AF |
335 | #endif |
336 | } | |
337 | ||
75973bfe | 338 | #if !defined(CONFIG_USER_ONLY) |
eb24f7c6 DH |
339 | static bool disabled_wait(CPUState *cpu) |
340 | { | |
341 | return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & | |
342 | (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)); | |
343 | } | |
344 | ||
75973bfe DH |
345 | static unsigned s390_count_running_cpus(void) |
346 | { | |
347 | CPUState *cpu; | |
348 | int nr_running = 0; | |
349 | ||
350 | CPU_FOREACH(cpu) { | |
351 | uint8_t state = S390_CPU(cpu)->env.cpu_state; | |
352 | if (state == CPU_STATE_OPERATING || | |
353 | state == CPU_STATE_LOAD) { | |
eb24f7c6 DH |
354 | if (!disabled_wait(cpu)) { |
355 | nr_running++; | |
356 | } | |
75973bfe DH |
357 | } |
358 | } | |
359 | ||
360 | return nr_running; | |
361 | } | |
362 | ||
eb24f7c6 | 363 | unsigned int s390_cpu_halt(S390CPU *cpu) |
75973bfe DH |
364 | { |
365 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 366 | trace_cpu_halt(cs->cpu_index); |
75973bfe | 367 | |
eb24f7c6 DH |
368 | if (!cs->halted) { |
369 | cs->halted = 1; | |
370 | cs->exception_index = EXCP_HLT; | |
75973bfe | 371 | } |
eb24f7c6 DH |
372 | |
373 | return s390_count_running_cpus(); | |
75973bfe DH |
374 | } |
375 | ||
eb24f7c6 | 376 | void s390_cpu_unhalt(S390CPU *cpu) |
75973bfe DH |
377 | { |
378 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 379 | trace_cpu_unhalt(cs->cpu_index); |
75973bfe | 380 | |
eb24f7c6 DH |
381 | if (cs->halted) { |
382 | cs->halted = 0; | |
383 | cs->exception_index = -1; | |
384 | } | |
385 | } | |
386 | ||
387 | unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) | |
388 | { | |
389 | trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state); | |
390 | ||
391 | switch (cpu_state) { | |
392 | case CPU_STATE_STOPPED: | |
393 | case CPU_STATE_CHECK_STOP: | |
394 | /* halt the cpu for common infrastructure */ | |
395 | s390_cpu_halt(cpu); | |
396 | break; | |
397 | case CPU_STATE_OPERATING: | |
398 | case CPU_STATE_LOAD: | |
399 | /* unhalt the cpu for common infrastructure */ | |
400 | s390_cpu_unhalt(cpu); | |
401 | break; | |
402 | default: | |
403 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
404 | cpu_state); | |
405 | exit(1); | |
75973bfe | 406 | } |
c9e659c9 DH |
407 | if (kvm_enabled() && cpu->env.cpu_state != cpu_state) { |
408 | kvm_s390_set_cpu_state(cpu, cpu_state); | |
409 | } | |
eb24f7c6 | 410 | cpu->env.cpu_state = cpu_state; |
75973bfe DH |
411 | |
412 | return s390_count_running_cpus(); | |
413 | } | |
414 | #endif | |
415 | ||
b3820e6c DH |
416 | static gchar *s390_gdb_arch_name(CPUState *cs) |
417 | { | |
418 | return g_strdup("s390:64-bit"); | |
419 | } | |
420 | ||
29e4bcb2 AF |
421 | static void s390_cpu_class_init(ObjectClass *oc, void *data) |
422 | { | |
423 | S390CPUClass *scc = S390_CPU_CLASS(oc); | |
424 | CPUClass *cc = CPU_CLASS(scc); | |
c7396bbb | 425 | DeviceClass *dc = DEVICE_CLASS(oc); |
29e4bcb2 | 426 | |
c6644fc8 | 427 | scc->next_cpu_id = 0; |
1f136632 AF |
428 | scc->parent_realize = dc->realize; |
429 | dc->realize = s390_cpu_realizefn; | |
430 | ||
29e4bcb2 | 431 | scc->parent_reset = cc->reset; |
29c6157c CB |
432 | #if !defined(CONFIG_USER_ONLY) |
433 | scc->load_normal = s390_cpu_load_normal; | |
434 | #endif | |
f5ae2a4f CB |
435 | scc->cpu_reset = s390_cpu_reset; |
436 | scc->initial_cpu_reset = s390_cpu_initial_reset; | |
437 | cc->reset = s390_cpu_full_reset; | |
8c2e1b00 | 438 | cc->has_work = s390_cpu_has_work; |
97a8ea5a | 439 | cc->do_interrupt = s390_cpu_do_interrupt; |
878096ee | 440 | cc->dump_state = s390_cpu_dump_state; |
f45748f1 | 441 | cc->set_pc = s390_cpu_set_pc; |
5b50e790 AF |
442 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
443 | cc->gdb_write_register = s390_cpu_gdb_write_register; | |
7510454e AF |
444 | #ifdef CONFIG_USER_ONLY |
445 | cc->handle_mmu_fault = s390_cpu_handle_mmu_fault; | |
446 | #else | |
00b941e5 | 447 | cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; |
ef1df130 | 448 | cc->vmsd = &vmstate_s390_cpu; |
9b4f38e1 | 449 | cc->write_elf64_note = s390_cpu_write_elf64_note; |
02bb9bbf | 450 | cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; |
311918b9 | 451 | cc->debug_excp_handler = s390x_cpu_debug_excp_handler; |
00b941e5 | 452 | #endif |
dbad6b74 PC |
453 | cc->disas_set_info = s390_cpu_disas_set_info; |
454 | ||
73d510c9 DH |
455 | cc->gdb_num_core_regs = S390_NUM_CORE_REGS; |
456 | cc->gdb_core_xml_file = "s390x-core64.xml"; | |
b3820e6c | 457 | cc->gdb_arch_name = s390_gdb_arch_name; |
4c315c27 MA |
458 | |
459 | /* | |
c6644fc8 | 460 | * Reason: s390_cpu_realizefn() calls cpu_exec_init(), which saves |
4c315c27 MA |
461 | * the object in cpus -> dangling pointer after final |
462 | * object_unref(). | |
463 | */ | |
464 | dc->cannot_destroy_with_object_finalize_yet = true; | |
29e4bcb2 AF |
465 | } |
466 | ||
467 | static const TypeInfo s390_cpu_type_info = { | |
468 | .name = TYPE_S390_CPU, | |
469 | .parent = TYPE_CPU, | |
470 | .instance_size = sizeof(S390CPU), | |
8f22e0df | 471 | .instance_init = s390_cpu_initfn, |
d5627ce8 | 472 | .instance_finalize = s390_cpu_finalize, |
29e4bcb2 AF |
473 | .abstract = false, |
474 | .class_size = sizeof(S390CPUClass), | |
475 | .class_init = s390_cpu_class_init, | |
476 | }; | |
477 | ||
478 | static void s390_cpu_register_types(void) | |
479 | { | |
480 | type_register_static(&s390_cpu_type_info); | |
481 | } | |
482 | ||
483 | type_init(s390_cpu_register_types) |