[qemu.git] / hw / i386 / acpi-defs.h

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.

 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.

 * You should have received a copy of the GNU General Public License along
 * with this program; if not, see <http://www.gnu.org/licenses/>.
 */
#ifndef QEMU_ACPI_DEFS_H
#define QEMU_ACPI_DEFS_H

enum {
    ACPI_FADT_F_WBINVD,
    ACPI_FADT_F_WBINVD_FLUSH,
    ACPI_FADT_F_PROC_C1,
    ACPI_FADT_F_P_LVL2_UP,
    ACPI_FADT_F_PWR_BUTTON,
    ACPI_FADT_F_SLP_BUTTON,
    ACPI_FADT_F_FIX_RTC,
    ACPI_FADT_F_RTC_S4,
    ACPI_FADT_F_TMR_VAL_EXT,
    ACPI_FADT_F_DCK_CAP,
    ACPI_FADT_F_RESET_REG_SUP,
    ACPI_FADT_F_SEALED_CASE,
    ACPI_FADT_F_HEADLESS,
    ACPI_FADT_F_CPU_SW_SLP,
    ACPI_FADT_F_PCI_EXP_WAK,
    ACPI_FADT_F_USE_PLATFORM_CLOCK,
    ACPI_FADT_F_S4_RTC_STS_VALID,
    ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
    ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
    ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
    ACPI_FADT_F_HW_REDUCED_ACPI,
    ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
};

/*
 * ACPI 2.0 Generic Address Space definition.
 */
struct Acpi20GenericAddress {
    uint8_t  address_space_id;
    uint8_t  register_bit_width;
    uint8_t  register_bit_offset;
    uint8_t  reserved;
    uint64_t address;
} QEMU_PACKED;
typedef struct Acpi20GenericAddress Acpi20GenericAddress;

struct AcpiRsdpDescriptor {        /* Root System Descriptor Pointer */
    uint64_t signature;              /* ACPI signature, contains "RSD PTR " */
    uint8_t  checksum;               /* To make sum of struct == 0 */
    uint8_t  oem_id [6];             /* OEM identification */
    uint8_t  revision;               /* Must be 0 for 1.0, 2 for 2.0 */
    uint32_t rsdt_physical_address;  /* 32-bit physical address of RSDT */
    uint32_t length;                 /* XSDT Length in bytes including hdr */
    uint64_t xsdt_physical_address;  /* 64-bit physical address of XSDT */
    uint8_t  extended_checksum;      /* Checksum of entire table */
    uint8_t  reserved [3];           /* Reserved field must be 0 */
} QEMU_PACKED;
typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;

/* Table structure from Linux kernel (the ACPI tables are under the
   BSD license) */


#define ACPI_TABLE_HEADER_DEF   /* ACPI common table header */ \
    uint32_t signature;          /* ACPI signature (4 ASCII characters) */ \
    uint32_t length;                 /* Length of table, in bytes, including header */ \
    uint8_t  revision;               /* ACPI Specification minor version # */ \
    uint8_t  checksum;               /* To make sum of entire table == 0 */ \
    uint8_t  oem_id [6];             /* OEM identification */ \
    uint8_t  oem_table_id [8];       /* OEM table identification */ \
    uint32_t oem_revision;           /* OEM revision number */ \
    uint8_t  asl_compiler_id [4];    /* ASL compiler vendor ID */ \
    uint32_t asl_compiler_revision;  /* ASL compiler revision number */


struct AcpiTableHeader         /* ACPI common table header */
{
    ACPI_TABLE_HEADER_DEF
} QEMU_PACKED;
typedef struct AcpiTableHeader AcpiTableHeader;

/*
 * ACPI 1.0 Fixed ACPI Description Table (FADT)
 */
struct AcpiFadtDescriptorRev1
{
    ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
    uint32_t firmware_ctrl;          /* Physical address of FACS */
    uint32_t dsdt;                   /* Physical address of DSDT */
    uint8_t  model;                  /* System Interrupt Model */
    uint8_t  reserved1;              /* Reserved */
    uint16_t sci_int;                /* System vector of SCI interrupt */
    uint32_t smi_cmd;                /* Port address of SMI command port */
    uint8_t  acpi_enable;            /* Value to write to smi_cmd to enable ACPI */
    uint8_t  acpi_disable;           /* Value to write to smi_cmd to disable ACPI */
    uint8_t  S4bios_req;             /* Value to write to SMI CMD to enter S4BIOS state */
    uint8_t  reserved2;              /* Reserved - must be zero */
    uint32_t pm1a_evt_blk;           /* Port address of Power Mgt 1a acpi_event Reg Blk */
    uint32_t pm1b_evt_blk;           /* Port address of Power Mgt 1b acpi_event Reg Blk */
    uint32_t pm1a_cnt_blk;           /* Port address of Power Mgt 1a Control Reg Blk */
    uint32_t pm1b_cnt_blk;           /* Port address of Power Mgt 1b Control Reg Blk */
    uint32_t pm2_cnt_blk;            /* Port address of Power Mgt 2 Control Reg Blk */
    uint32_t pm_tmr_blk;             /* Port address of Power Mgt Timer Ctrl Reg Blk */
    uint32_t gpe0_blk;               /* Port addr of General Purpose acpi_event 0 Reg Blk */
    uint32_t gpe1_blk;               /* Port addr of General Purpose acpi_event 1 Reg Blk */
    uint8_t  pm1_evt_len;            /* Byte length of ports at pm1_x_evt_blk */
    uint8_t  pm1_cnt_len;            /* Byte length of ports at pm1_x_cnt_blk */
    uint8_t  pm2_cnt_len;            /* Byte Length of ports at pm2_cnt_blk */
    uint8_t  pm_tmr_len;             /* Byte Length of ports at pm_tm_blk */
    uint8_t  gpe0_blk_len;           /* Byte Length of ports at gpe0_blk */
    uint8_t  gpe1_blk_len;           /* Byte Length of ports at gpe1_blk */
    uint8_t  gpe1_base;              /* Offset in gpe model where gpe1 events start */
    uint8_t  reserved3;              /* Reserved */
    uint16_t plvl2_lat;              /* Worst case HW latency to enter/exit C2 state */
    uint16_t plvl3_lat;              /* Worst case HW latency to enter/exit C3 state */
    uint16_t flush_size;             /* Size of area read to flush caches */
    uint16_t flush_stride;           /* Stride used in flushing caches */
    uint8_t  duty_offset;            /* Bit location of duty cycle field in p_cnt reg */
    uint8_t  duty_width;             /* Bit width of duty cycle field in p_cnt reg */
    uint8_t  day_alrm;               /* Index to day-of-month alarm in RTC CMOS RAM */
    uint8_t  mon_alrm;               /* Index to month-of-year alarm in RTC CMOS RAM */
    uint8_t  century;                /* Index to century in RTC CMOS RAM */
    uint8_t  reserved4;              /* Reserved */
    uint8_t  reserved4a;             /* Reserved */
    uint8_t  reserved4b;             /* Reserved */
    uint32_t flags;
} QEMU_PACKED;
typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1;

/*
 * ACPI 1.0 Root System Description Table (RSDT)
 */
struct AcpiRsdtDescriptorRev1
{
    ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
    uint32_t table_offset_entry[0];  /* Array of pointers to other */
    /* ACPI tables */
} QEMU_PACKED;
typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;

/*
 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
 */
struct AcpiFacsDescriptorRev1
{
    uint32_t signature;           /* ACPI Signature */
    uint32_t length;                 /* Length of structure, in bytes */
    uint32_t hardware_signature;     /* Hardware configuration signature */
    uint32_t firmware_waking_vector; /* ACPI OS waking vector */
    uint32_t global_lock;            /* Global Lock */
    uint32_t flags;
    uint8_t  resverved3 [40];        /* Reserved - must be zero */
} QEMU_PACKED;
typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;

/*
 * Differentiated System Description Table (DSDT)
 */

/*
 * MADT values and structures
 */

/* Values for MADT PCATCompat */

#define ACPI_DUAL_PIC                0
#define ACPI_MULTIPLE_APIC           1

/* Master MADT */

struct AcpiMultipleApicTable
{
    ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
    uint32_t local_apic_address;     /* Physical address of local APIC */
    uint32_t flags;
} QEMU_PACKED;
typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;

/* Values for Type in APIC sub-headers */

#define ACPI_APIC_PROCESSOR          0
#define ACPI_APIC_IO                 1
#define ACPI_APIC_XRUPT_OVERRIDE     2
#define ACPI_APIC_NMI                3
#define ACPI_APIC_LOCAL_NMI          4
#define ACPI_APIC_ADDRESS_OVERRIDE   5
#define ACPI_APIC_IO_SAPIC           6
#define ACPI_APIC_LOCAL_SAPIC        7
#define ACPI_APIC_XRUPT_SOURCE       8
#define ACPI_APIC_RESERVED           9           /* 9 and greater are reserved */

/*
 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
 */
#define ACPI_SUB_HEADER_DEF   /* Common ACPI sub-structure header */\
    uint8_t  type;                               \
    uint8_t  length;

/* Sub-structures for MADT */

struct AcpiMadtProcessorApic
{
    ACPI_SUB_HEADER_DEF
    uint8_t  processor_id;           /* ACPI processor id */
    uint8_t  local_apic_id;          /* Processor's local APIC id */
    uint32_t flags;
} QEMU_PACKED;
typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;

struct AcpiMadtIoApic
{
    ACPI_SUB_HEADER_DEF
    uint8_t  io_apic_id;             /* I/O APIC ID */
    uint8_t  reserved;               /* Reserved - must be zero */
    uint32_t address;                /* APIC physical address */
    uint32_t interrupt;              /* Global system interrupt where INTI
                                 * lines start */
} QEMU_PACKED;
typedef struct AcpiMadtIoApic AcpiMadtIoApic;

struct AcpiMadtIntsrcovr {
    ACPI_SUB_HEADER_DEF
    uint8_t  bus;
    uint8_t  source;
    uint32_t gsi;
    uint16_t flags;
} QEMU_PACKED;
typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;

struct AcpiMadtLocalNmi {
    ACPI_SUB_HEADER_DEF
    uint8_t  processor_id;           /* ACPI processor id */
    uint16_t flags;                  /* MPS INTI flags */
    uint8_t  lint;                   /* Local APIC LINT# */
} QEMU_PACKED;
typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;

/*
 * HPET Description Table
 */
struct Acpi20Hpet {
    ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
    uint32_t           timer_block_id;
    Acpi20GenericAddress addr;
    uint8_t            hpet_number;
    uint16_t           min_tick;
    uint8_t            page_protect;
} QEMU_PACKED;
typedef struct Acpi20Hpet Acpi20Hpet;

/*
 * SRAT (NUMA topology description) table
 */

struct AcpiSystemResourceAffinityTable
{
    ACPI_TABLE_HEADER_DEF
    uint32_t    reserved1;
    uint32_t    reserved2[2];
} QEMU_PACKED;
typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;

#define ACPI_SRAT_PROCESSOR          0
#define ACPI_SRAT_MEMORY             1

struct AcpiSratProcessorAffinity
{
    ACPI_SUB_HEADER_DEF
    uint8_t     proximity_lo;
    uint8_t     local_apic_id;
    uint32_t    flags;
    uint8_t     local_sapic_eid;
    uint8_t     proximity_hi[3];
    uint32_t    reserved;
} QEMU_PACKED;
typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;

struct AcpiSratMemoryAffinity
{
    ACPI_SUB_HEADER_DEF
    uint8_t     proximity[4];
    uint16_t    reserved1;
    uint64_t    base_addr;
    uint64_t    range_length;
    uint32_t    reserved2;
    uint32_t    flags;
    uint32_t    reserved3[2];
} QEMU_PACKED;
typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;

/* PCI fw r3.0 MCFG table. */
/* Subtable */
struct AcpiMcfgAllocation {
    uint64_t address;                /* Base address, processor-relative */
    uint16_t pci_segment;            /* PCI segment group number */
    uint8_t start_bus_number;       /* Starting PCI Bus number */
    uint8_t end_bus_number;         /* Final PCI Bus number */
    uint32_t reserved;
} QEMU_PACKED;
typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;

struct AcpiTableMcfg {
    ACPI_TABLE_HEADER_DEF;
    uint8_t reserved[8];
    AcpiMcfgAllocation allocation[0];
} QEMU_PACKED;
typedef struct AcpiTableMcfg AcpiTableMcfg;

#endif
Commit	Line	Data
72c194f7 MT	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License as published by
	4	* the Free Software Foundation; either version 2 of the License, or
	5	* (at your option) any later version.
	6
	7	* This program is distributed in the hope that it will be useful,
	8	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	9	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	10	* GNU General Public License for more details.
	11
	12	* You should have received a copy of the GNU General Public License along
	13	* with this program; if not, see <http://www.gnu.org/licenses/>.
	14	*/
	15	#ifndef QEMU_ACPI_DEFS_H
	16	#define QEMU_ACPI_DEFS_H
	17
	18	enum {
	19	ACPI_FADT_F_WBINVD,
	20	ACPI_FADT_F_WBINVD_FLUSH,
	21	ACPI_FADT_F_PROC_C1,
	22	ACPI_FADT_F_P_LVL2_UP,
	23	ACPI_FADT_F_PWR_BUTTON,
	24	ACPI_FADT_F_SLP_BUTTON,
	25	ACPI_FADT_F_FIX_RTC,
	26	ACPI_FADT_F_RTC_S4,
	27	ACPI_FADT_F_TMR_VAL_EXT,
	28	ACPI_FADT_F_DCK_CAP,
	29	ACPI_FADT_F_RESET_REG_SUP,
	30	ACPI_FADT_F_SEALED_CASE,
	31	ACPI_FADT_F_HEADLESS,
	32	ACPI_FADT_F_CPU_SW_SLP,
	33	ACPI_FADT_F_PCI_EXP_WAK,
	34	ACPI_FADT_F_USE_PLATFORM_CLOCK,
	35	ACPI_FADT_F_S4_RTC_STS_VALID,
	36	ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
	37	ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
	38	ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
	39	ACPI_FADT_F_HW_REDUCED_ACPI,
	40	ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
	41	};
	42
	43	/*
	44	* ACPI 2.0 Generic Address Space definition.
	45	*/
	46	struct Acpi20GenericAddress {
	47	uint8_t address_space_id;
	48	uint8_t register_bit_width;
	49	uint8_t register_bit_offset;
	50	uint8_t reserved;
	51	uint64_t address;
	52	} QEMU_PACKED;
	53	typedef struct Acpi20GenericAddress Acpi20GenericAddress;
	54
72c194f7 MT	55	struct AcpiRsdpDescriptor { /* Root System Descriptor Pointer */
	56	uint64_t signature; /* ACPI signature, contains "RSD PTR " */
	57	uint8_t checksum; /* To make sum of struct == 0 */
	58	uint8_t oem_id [6]; /* OEM identification */
	59	uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */
	60	uint32_t rsdt_physical_address; /* 32-bit physical address of RSDT */
	61	uint32_t length; /* XSDT Length in bytes including hdr */
	62	uint64_t xsdt_physical_address; /* 64-bit physical address of XSDT */
	63	uint8_t extended_checksum; /* Checksum of entire table */
	64	uint8_t reserved [3]; /* Reserved field must be 0 */
	65	} QEMU_PACKED;
	66	typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
	67
	68	/* Table structure from Linux kernel (the ACPI tables are under the
	69	BSD license) */
	70
	71
	72	#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
	73	uint32_t signature; /* ACPI signature (4 ASCII characters) */ \
	74	uint32_t length; /* Length of table, in bytes, including header */ \
	75	uint8_t revision; /* ACPI Specification minor version # */ \
	76	uint8_t checksum; /* To make sum of entire table == 0 */ \
	77	uint8_t oem_id [6]; /* OEM identification */ \
	78	uint8_t oem_table_id [8]; /* OEM table identification */ \
	79	uint32_t oem_revision; /* OEM revision number */ \
	80	uint8_t asl_compiler_id [4]; /* ASL compiler vendor ID */ \
	81	uint32_t asl_compiler_revision; /* ASL compiler revision number */
	82
	83
	84	struct AcpiTableHeader /* ACPI common table header */
	85	{
	86	ACPI_TABLE_HEADER_DEF
	87	} QEMU_PACKED;
	88	typedef struct AcpiTableHeader AcpiTableHeader;
	89
	90	/*
	91	* ACPI 1.0 Fixed ACPI Description Table (FADT)
	92	*/
72c194f7 MT	93	struct AcpiFadtDescriptorRev1
	94	{
	95	ACPI_TABLE_HEADER_DEF /* ACPI common table header */
	96	uint32_t firmware_ctrl; /* Physical address of FACS */
	97	uint32_t dsdt; /* Physical address of DSDT */
	98	uint8_t model; /* System Interrupt Model */
	99	uint8_t reserved1; /* Reserved */
	100	uint16_t sci_int; /* System vector of SCI interrupt */
	101	uint32_t smi_cmd; /* Port address of SMI command port */
	102	uint8_t acpi_enable; /* Value to write to smi_cmd to enable ACPI */
	103	uint8_t acpi_disable; /* Value to write to smi_cmd to disable ACPI */
	104	uint8_t S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
	105	uint8_t reserved2; /* Reserved - must be zero */
	106	uint32_t pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
	107	uint32_t pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
	108	uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
	109	uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
	110	uint32_t pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
	111	uint32_t pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
	112	uint32_t gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
	113	uint32_t gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
	114	uint8_t pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
	115	uint8_t pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
	116	uint8_t pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
	117	uint8_t pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
	118	uint8_t gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
	119	uint8_t gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
	120	uint8_t gpe1_base; /* Offset in gpe model where gpe1 events start */
	121	uint8_t reserved3; /* Reserved */
	122	uint16_t plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
	123	uint16_t plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
	124	uint16_t flush_size; /* Size of area read to flush caches */
	125	uint16_t flush_stride; /* Stride used in flushing caches */
	126	uint8_t duty_offset; /* Bit location of duty cycle field in p_cnt reg */
	127	uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */
	128	uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
	129	uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
	130	uint8_t century; /* Index to century in RTC CMOS RAM */
	131	uint8_t reserved4; /* Reserved */
	132	uint8_t reserved4a; /* Reserved */
	133	uint8_t reserved4b; /* Reserved */
	134	uint32_t flags;
	135	} QEMU_PACKED;
	136	typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1;
	137
	138	/*
	139	* ACPI 1.0 Root System Description Table (RSDT)
	140	*/
72c194f7 MT	141	struct AcpiRsdtDescriptorRev1
	142	{
	143	ACPI_TABLE_HEADER_DEF /* ACPI common table header */
	144	uint32_t table_offset_entry[0]; /* Array of pointers to other */
	145	/* ACPI tables */
	146	} QEMU_PACKED;
	147	typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
	148
	149	/*
	150	* ACPI 1.0 Firmware ACPI Control Structure (FACS)
	151	*/
72c194f7 MT	152	struct AcpiFacsDescriptorRev1
	153	{
	154	uint32_t signature; /* ACPI Signature */
	155	uint32_t length; /* Length of structure, in bytes */
	156	uint32_t hardware_signature; /* Hardware configuration signature */
	157	uint32_t firmware_waking_vector; /* ACPI OS waking vector */
	158	uint32_t global_lock; /* Global Lock */
	159	uint32_t flags;
	160	uint8_t resverved3 [40]; /* Reserved - must be zero */
	161	} QEMU_PACKED;
	162	typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
	163
	164	/*
	165	* Differentiated System Description Table (DSDT)
	166	*/
72c194f7 MT	167
	168	/*
	169	* MADT values and structures
	170	*/
	171
	172	/* Values for MADT PCATCompat */
	173
	174	#define ACPI_DUAL_PIC 0
	175	#define ACPI_MULTIPLE_APIC 1
	176
	177	/* Master MADT */
	178
72c194f7 MT	179	struct AcpiMultipleApicTable
	180	{
	181	ACPI_TABLE_HEADER_DEF /* ACPI common table header */
	182	uint32_t local_apic_address; /* Physical address of local APIC */
	183	uint32_t flags;
	184	} QEMU_PACKED;
	185	typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
	186
	187	/* Values for Type in APIC sub-headers */
	188
	189	#define ACPI_APIC_PROCESSOR 0
	190	#define ACPI_APIC_IO 1
	191	#define ACPI_APIC_XRUPT_OVERRIDE 2
	192	#define ACPI_APIC_NMI 3
	193	#define ACPI_APIC_LOCAL_NMI 4
	194	#define ACPI_APIC_ADDRESS_OVERRIDE 5
	195	#define ACPI_APIC_IO_SAPIC 6
	196	#define ACPI_APIC_LOCAL_SAPIC 7
	197	#define ACPI_APIC_XRUPT_SOURCE 8
	198	#define ACPI_APIC_RESERVED 9 /* 9 and greater are reserved */
	199
	200	/*
	201	* MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
	202	*/
	203	#define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
	204	uint8_t type; \
	205	uint8_t length;
	206
	207	/* Sub-structures for MADT */
	208
	209	struct AcpiMadtProcessorApic
	210	{
	211	ACPI_SUB_HEADER_DEF
	212	uint8_t processor_id; /* ACPI processor id */
	213	uint8_t local_apic_id; /* Processor's local APIC id */
	214	uint32_t flags;
	215	} QEMU_PACKED;
	216	typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
	217
	218	struct AcpiMadtIoApic
	219	{
	220	ACPI_SUB_HEADER_DEF
	221	uint8_t io_apic_id; /* I/O APIC ID */
	222	uint8_t reserved; /* Reserved - must be zero */
	223	uint32_t address; /* APIC physical address */
	224	uint32_t interrupt; /* Global system interrupt where INTI
	225	* lines start */
	226	} QEMU_PACKED;
	227	typedef struct AcpiMadtIoApic AcpiMadtIoApic;
	228
	229	struct AcpiMadtIntsrcovr {
	230	ACPI_SUB_HEADER_DEF
	231	uint8_t bus;
	232	uint8_t source;
	233	uint32_t gsi;
	234	uint16_t flags;
	235	} QEMU_PACKED;
	236	typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
	237
	238	struct AcpiMadtLocalNmi {
	239	ACPI_SUB_HEADER_DEF
	240	uint8_t processor_id; /* ACPI processor id */
	241	uint16_t flags; /* MPS INTI flags */
	242	uint8_t lint; /* Local APIC LINT# */
243	} QEMU_PACKED;
244	typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
245
246	/*
247	* HPET Description Table
248	*/
72c194f7 MT	249	struct Acpi20Hpet {
	250	ACPI_TABLE_HEADER_DEF /* ACPI common table header */
	251	uint32_t timer_block_id;
	252	Acpi20GenericAddress addr;
	253	uint8_t hpet_number;
	254	uint16_t min_tick;
	255	uint8_t page_protect;
	256	} QEMU_PACKED;
	257	typedef struct Acpi20Hpet Acpi20Hpet;
	258
	259	/*
	260	* SRAT (NUMA topology description) table
	261	*/
	262
72c194f7 MT	263	struct AcpiSystemResourceAffinityTable
	264	{
	265	ACPI_TABLE_HEADER_DEF
	266	uint32_t reserved1;
	267	uint32_t reserved2[2];
	268	} QEMU_PACKED;
	269	typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
	270
	271	#define ACPI_SRAT_PROCESSOR 0
	272	#define ACPI_SRAT_MEMORY 1
	273
	274	struct AcpiSratProcessorAffinity
	275	{
	276	ACPI_SUB_HEADER_DEF
	277	uint8_t proximity_lo;
	278	uint8_t local_apic_id;
	279	uint32_t flags;
	280	uint8_t local_sapic_eid;
	281	uint8_t proximity_hi[3];
	282	uint32_t reserved;
	283	} QEMU_PACKED;
	284	typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
	285
	286	struct AcpiSratMemoryAffinity
	287	{
	288	ACPI_SUB_HEADER_DEF
	289	uint8_t proximity[4];
	290	uint16_t reserved1;
	291	uint64_t base_addr;
	292	uint64_t range_length;
	293	uint32_t reserved2;
	294	uint32_t flags;
	295	uint32_t reserved3[2];
	296	} QEMU_PACKED;
	297	typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
	298
	299	/* PCI fw r3.0 MCFG table. */
	300	/* Subtable */
	301	struct AcpiMcfgAllocation {
	302	uint64_t address; /* Base address, processor-relative */
	303	uint16_t pci_segment; /* PCI segment group number */
	304	uint8_t start_bus_number; /* Starting PCI Bus number */
	305	uint8_t end_bus_number; /* Final PCI Bus number */
	306	uint32_t reserved;
	307	} QEMU_PACKED;
	308	typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
	309
72c194f7 MT	310	struct AcpiTableMcfg {
	311	ACPI_TABLE_HEADER_DEF;
	312	uint8_t reserved[8];
	313	AcpiMcfgAllocation allocation[0];
	314	} QEMU_PACKED;
	315	typedef struct AcpiTableMcfg AcpiTableMcfg;
	316
	317	#endif