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[qemu.git] / hw / pci / pcie_host.c
CommitLineData
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1/*
2 * pcie_host.c
3 * utility functions for pci express host bridge.
4 *
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17
18 * You should have received a copy of the GNU General Public License along
70539e18 19 * with this program; if not, see <http://www.gnu.org/licenses/>.
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20 */
21
97d5408f 22#include "qemu/osdep.h"
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23#include "hw/hw.h"
24#include "hw/pci/pci.h"
25#include "hw/pci/pcie_host.h"
022c62cb 26#include "exec/address-spaces.h"
a9f49946 27
a9f49946 28/* a helper function to get a PCIDevice for a given mmconfig address */
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29static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s,
30 uint32_t mmcfg_addr)
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31{
32 return pci_find_device(s, PCIE_MMCFG_BUS(mmcfg_addr),
5256d8bf 33 PCIE_MMCFG_DEVFN(mmcfg_addr));
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34}
35
a8170e5e 36static void pcie_mmcfg_data_write(void *opaque, hwaddr mmcfg_addr,
c76f990e 37 uint64_t val, unsigned len)
a9f49946 38{
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39 PCIExpressHost *e = opaque;
40 PCIBus *s = e->pci.bus;
8d6514f8 41 PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
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42 uint32_t addr;
43 uint32_t limit;
a9f49946 44
42e4126b 45 if (!pci_dev) {
a9f49946 46 return;
42e4126b 47 }
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48 addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
49 limit = pci_config_size(pci_dev);
43e86c8f 50 pci_host_config_write_common(pci_dev, addr, limit, val, len);
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51}
52
c76f990e 53static uint64_t pcie_mmcfg_data_read(void *opaque,
a8170e5e 54 hwaddr mmcfg_addr,
c76f990e 55 unsigned len)
a9f49946 56{
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57 PCIExpressHost *e = opaque;
58 PCIBus *s = e->pci.bus;
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59 PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
60 uint32_t addr;
61 uint32_t limit;
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62
63 if (!pci_dev) {
4677d8ed 64 return ~0x0;
a9f49946 65 }
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66 addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
67 limit = pci_config_size(pci_dev);
43e86c8f 68 return pci_host_config_read_common(pci_dev, addr, limit, len);
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69}
70
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71static const MemoryRegionOps pcie_mmcfg_ops = {
72 .read = pcie_mmcfg_data_read,
73 .write = pcie_mmcfg_data_write,
a6c242aa 74 .endianness = DEVICE_LITTLE_ENDIAN,
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75};
76
7c8b7248 77static void pcie_host_init(Object *obj)
a9f49946 78{
7c8b7248 79 PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
a9f49946 80
7c8b7248 81 e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
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82 memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio",
83 PCIE_MMCFG_SIZE_MAX);
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84}
85
86void pcie_host_mmcfg_unmap(PCIExpressHost *e)
87{
88 if (e->base_addr != PCIE_BASE_ADDR_UNMAPPED) {
c76f990e 89 memory_region_del_subregion(get_system_memory(), &e->mmio);
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90 e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
91 }
92}
93
27fb9688 94void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size)
a9f49946 95{
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96 assert(!(size & (size - 1))); /* power of 2 */
97 assert(size >= PCIE_MMCFG_SIZE_MIN);
98 assert(size <= PCIE_MMCFG_SIZE_MAX);
99 e->size = size;
3a8f2a9c 100 memory_region_set_size(&e->mmio, e->size);
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101}
102
103void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
104 uint32_t size)
105{
106 pcie_host_mmcfg_init(e, size);
a9f49946 107 e->base_addr = addr;
c76f990e 108 memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);
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109}
110
111void pcie_host_mmcfg_update(PCIExpressHost *e,
112 int enable,
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113 hwaddr addr,
114 uint32_t size)
a9f49946 115{
3a8f2a9c 116 memory_region_transaction_begin();
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117 pcie_host_mmcfg_unmap(e);
118 if (enable) {
c702ddb8 119 pcie_host_mmcfg_map(e, addr, size);
a9f49946 120 }
3a8f2a9c 121 memory_region_transaction_commit();
a9f49946 122}
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123
124static const TypeInfo pcie_host_type_info = {
125 .name = TYPE_PCIE_HOST_BRIDGE,
126 .parent = TYPE_PCI_HOST_BRIDGE,
127 .abstract = true,
128 .instance_size = sizeof(PCIExpressHost),
7c8b7248 129 .instance_init = pcie_host_init,
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130};
131
132static void pcie_host_register_types(void)
133{
134 type_register_static(&pcie_host_type_info);
135}
136
137type_init(pcie_host_register_types)
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