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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "tcg.h" | |
25 | ||
bf6247fb | 26 | #ifdef CONFIG_DYNGEN_OP |
c896fe29 FB |
27 | /* legacy dyngen operations */ |
28 | #include "gen-op.h" | |
cf2be984 | 29 | #endif |
c896fe29 FB |
30 | |
31 | int gen_new_label(void); | |
32 | ||
ac56dd48 | 33 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
c896fe29 FB |
34 | { |
35 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 36 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 FB |
37 | } |
38 | ||
ac56dd48 | 39 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
c896fe29 FB |
40 | { |
41 | *gen_opc_ptr++ = opc; | |
42 | *gen_opparam_ptr++ = arg1; | |
c896fe29 FB |
43 | } |
44 | ||
ac56dd48 | 45 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
c896fe29 FB |
46 | { |
47 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
48 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
49 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
50 | } |
51 | ||
ac56dd48 | 52 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
c896fe29 FB |
53 | { |
54 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 55 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 | 56 | *gen_opparam_ptr++ = arg2; |
ac56dd48 PB |
57 | } |
58 | ||
bcb0126f PB |
59 | static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2) |
60 | { | |
61 | *gen_opc_ptr++ = opc; | |
62 | *gen_opparam_ptr++ = arg1; | |
63 | *gen_opparam_ptr++ = arg2; | |
64 | } | |
65 | ||
ac56dd48 PB |
66 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
67 | { | |
68 | *gen_opc_ptr++ = opc; | |
69 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
70 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
71 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
72 | } | |
73 | ||
74 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) | |
75 | { | |
76 | *gen_opc_ptr++ = opc; | |
77 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
78 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 | 79 | *gen_opparam_ptr++ = arg3; |
ac56dd48 PB |
80 | } |
81 | ||
82 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
83 | TCGv arg4) | |
84 | { | |
85 | *gen_opc_ptr++ = opc; | |
86 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
87 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
88 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
89 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
90 | } | |
91 | ||
92 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
93 | TCGArg arg4) | |
94 | { | |
95 | *gen_opc_ptr++ = opc; | |
96 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
97 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
98 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
c896fe29 FB |
99 | *gen_opparam_ptr++ = arg4; |
100 | } | |
101 | ||
ac56dd48 PB |
102 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
103 | TCGArg arg4) | |
c896fe29 FB |
104 | { |
105 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
106 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
107 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
108 | *gen_opparam_ptr++ = arg3; |
109 | *gen_opparam_ptr++ = arg4; | |
ac56dd48 PB |
110 | } |
111 | ||
112 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, | |
113 | TCGv arg3, TCGv arg4, | |
114 | TCGv arg5) | |
115 | { | |
116 | *gen_opc_ptr++ = opc; | |
117 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
118 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
119 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
120 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
121 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
122 | } | |
123 | ||
124 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, | |
125 | TCGv arg3, TCGv arg4, | |
126 | TCGArg arg5) | |
127 | { | |
128 | *gen_opc_ptr++ = opc; | |
129 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
130 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
131 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
132 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
133 | *gen_opparam_ptr++ = arg5; |
134 | } | |
135 | ||
ac56dd48 PB |
136 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
137 | TCGv arg3, TCGv arg4, | |
138 | TCGv arg5, TCGv arg6) | |
c896fe29 FB |
139 | { |
140 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
141 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
142 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
143 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
144 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
145 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
146 | *gen_opparam_ptr++ = GET_TCGV(arg6); | |
147 | } | |
148 | ||
149 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, | |
150 | TCGv arg3, TCGv arg4, | |
151 | TCGArg arg5, TCGArg arg6) | |
152 | { | |
153 | *gen_opc_ptr++ = opc; | |
154 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
155 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
156 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
157 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
158 | *gen_opparam_ptr++ = arg5; |
159 | *gen_opparam_ptr++ = arg6; | |
160 | } | |
161 | ||
162 | static inline void gen_set_label(int n) | |
163 | { | |
ac56dd48 | 164 | tcg_gen_op1i(INDEX_op_set_label, n); |
c896fe29 FB |
165 | } |
166 | ||
fb50d413 BS |
167 | static inline void tcg_gen_br(int label) |
168 | { | |
169 | tcg_gen_op1i(INDEX_op_br, label); | |
170 | } | |
171 | ||
ac56dd48 | 172 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
c896fe29 | 173 | { |
98156423 | 174 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
4d07272d | 175 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
c896fe29 FB |
176 | } |
177 | ||
ac56dd48 | 178 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
c896fe29 | 179 | { |
ac56dd48 | 180 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
c896fe29 FB |
181 | } |
182 | ||
183 | /* helper calls */ | |
184 | #define TCG_HELPER_CALL_FLAGS 0 | |
185 | ||
186 | static inline void tcg_gen_helper_0_0(void *func) | |
187 | { | |
e8996ee0 FB |
188 | TCGv t0; |
189 | t0 = tcg_const_ptr((tcg_target_long)func); | |
c896fe29 | 190 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 191 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 192 | 0, NULL, 0, NULL); |
e8996ee0 | 193 | tcg_temp_free(t0); |
c896fe29 FB |
194 | } |
195 | ||
ac56dd48 | 196 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
c896fe29 | 197 | { |
e8996ee0 FB |
198 | TCGv t0; |
199 | t0 = tcg_const_ptr((tcg_target_long)func); | |
c896fe29 | 200 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 201 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 202 | 0, NULL, 1, &arg); |
e8996ee0 | 203 | tcg_temp_free(t0); |
c896fe29 FB |
204 | } |
205 | ||
ac56dd48 | 206 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
c896fe29 | 207 | { |
ac56dd48 | 208 | TCGv args[2]; |
e8996ee0 | 209 | TCGv t0; |
c896fe29 FB |
210 | args[0] = arg1; |
211 | args[1] = arg2; | |
e8996ee0 | 212 | t0 = tcg_const_ptr((tcg_target_long)func); |
c896fe29 | 213 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 214 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 215 | 0, NULL, 2, args); |
e8996ee0 | 216 | tcg_temp_free(t0); |
c896fe29 FB |
217 | } |
218 | ||
b0109805 PB |
219 | static inline void tcg_gen_helper_0_3(void *func, |
220 | TCGv arg1, TCGv arg2, TCGv arg3) | |
221 | { | |
222 | TCGv args[3]; | |
e8996ee0 | 223 | TCGv t0; |
b0109805 PB |
224 | args[0] = arg1; |
225 | args[1] = arg2; | |
226 | args[2] = arg3; | |
e8996ee0 | 227 | t0 = tcg_const_ptr((tcg_target_long)func); |
b0109805 | 228 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 229 | t0, TCG_HELPER_CALL_FLAGS, |
b0109805 | 230 | 0, NULL, 3, args); |
e8996ee0 | 231 | tcg_temp_free(t0); |
b0109805 PB |
232 | } |
233 | ||
f8422f52 BS |
234 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
235 | TCGv arg3, TCGv arg4) | |
236 | { | |
237 | TCGv args[4]; | |
e8996ee0 | 238 | TCGv t0; |
f8422f52 BS |
239 | args[0] = arg1; |
240 | args[1] = arg2; | |
241 | args[2] = arg3; | |
242 | args[3] = arg4; | |
e8996ee0 | 243 | t0 = tcg_const_ptr((tcg_target_long)func); |
f8422f52 | 244 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 245 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 246 | 0, NULL, 4, args); |
e8996ee0 | 247 | tcg_temp_free(t0); |
f8422f52 BS |
248 | } |
249 | ||
250 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) | |
251 | { | |
e8996ee0 FB |
252 | TCGv t0; |
253 | t0 = tcg_const_ptr((tcg_target_long)func); | |
f8422f52 | 254 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 255 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 256 | 1, &ret, 0, NULL); |
e8996ee0 | 257 | tcg_temp_free(t0); |
f8422f52 BS |
258 | } |
259 | ||
260 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) | |
261 | { | |
e8996ee0 FB |
262 | TCGv t0; |
263 | t0 = tcg_const_ptr((tcg_target_long)func); | |
f8422f52 | 264 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 265 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 266 | 1, &ret, 1, &arg1); |
e8996ee0 | 267 | tcg_temp_free(t0); |
f8422f52 BS |
268 | } |
269 | ||
ac56dd48 PB |
270 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
271 | TCGv arg1, TCGv arg2) | |
c896fe29 | 272 | { |
ac56dd48 | 273 | TCGv args[2]; |
e8996ee0 | 274 | TCGv t0; |
c896fe29 FB |
275 | args[0] = arg1; |
276 | args[1] = arg2; | |
e8996ee0 | 277 | t0 = tcg_const_ptr((tcg_target_long)func); |
c896fe29 | 278 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 279 | t0, TCG_HELPER_CALL_FLAGS, |
c896fe29 | 280 | 1, &ret, 2, args); |
e8996ee0 | 281 | tcg_temp_free(t0); |
c896fe29 FB |
282 | } |
283 | ||
6ddbc6e4 PB |
284 | static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
285 | TCGv arg1, TCGv arg2, TCGv arg3) | |
286 | { | |
287 | TCGv args[3]; | |
e8996ee0 | 288 | TCGv t0; |
6ddbc6e4 PB |
289 | args[0] = arg1; |
290 | args[1] = arg2; | |
291 | args[2] = arg3; | |
e8996ee0 | 292 | t0 = tcg_const_ptr((tcg_target_long)func); |
6ddbc6e4 | 293 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 294 | t0, TCG_HELPER_CALL_FLAGS, |
6ddbc6e4 | 295 | 1, &ret, 3, args); |
e8996ee0 | 296 | tcg_temp_free(t0); |
6ddbc6e4 PB |
297 | } |
298 | ||
f8422f52 BS |
299 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
300 | TCGv arg1, TCGv arg2, TCGv arg3, | |
301 | TCGv arg4) | |
302 | { | |
303 | TCGv args[4]; | |
e8996ee0 | 304 | TCGv t0; |
f8422f52 BS |
305 | args[0] = arg1; |
306 | args[1] = arg2; | |
307 | args[2] = arg3; | |
308 | args[3] = arg4; | |
e8996ee0 | 309 | t0 = tcg_const_ptr((tcg_target_long)func); |
f8422f52 | 310 | tcg_gen_call(&tcg_ctx, |
e8996ee0 | 311 | t0, TCG_HELPER_CALL_FLAGS, |
f8422f52 | 312 | 1, &ret, 4, args); |
e8996ee0 | 313 | tcg_temp_free(t0); |
f8422f52 BS |
314 | } |
315 | ||
c896fe29 FB |
316 | /* 32 bit ops */ |
317 | ||
ac56dd48 | 318 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 319 | { |
ac56dd48 | 320 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
c896fe29 FB |
321 | } |
322 | ||
ac56dd48 | 323 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 324 | { |
ac56dd48 | 325 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
c896fe29 FB |
326 | } |
327 | ||
ac56dd48 | 328 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 329 | { |
ac56dd48 | 330 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
c896fe29 FB |
331 | } |
332 | ||
ac56dd48 | 333 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 334 | { |
ac56dd48 | 335 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
c896fe29 FB |
336 | } |
337 | ||
ac56dd48 | 338 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 339 | { |
ac56dd48 | 340 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
c896fe29 FB |
341 | } |
342 | ||
ac56dd48 | 343 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 344 | { |
ac56dd48 | 345 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
c896fe29 FB |
346 | } |
347 | ||
ac56dd48 | 348 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 349 | { |
ac56dd48 | 350 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
c896fe29 FB |
351 | } |
352 | ||
ac56dd48 | 353 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 354 | { |
ac56dd48 | 355 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
c896fe29 FB |
356 | } |
357 | ||
ac56dd48 | 358 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
359 | { |
360 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); | |
361 | } | |
362 | ||
ac56dd48 | 363 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 364 | { |
7089442c BS |
365 | /* some cases can be optimized here */ |
366 | if (arg2 == 0) { | |
367 | tcg_gen_mov_i32(ret, arg1); | |
368 | } else { | |
e8996ee0 FB |
369 | TCGv t0 = tcg_const_i32(arg2); |
370 | tcg_gen_add_i32(ret, arg1, t0); | |
371 | tcg_temp_free(t0); | |
7089442c | 372 | } |
c896fe29 FB |
373 | } |
374 | ||
ac56dd48 | 375 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
376 | { |
377 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); | |
378 | } | |
379 | ||
ac56dd48 | 380 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 381 | { |
7089442c BS |
382 | /* some cases can be optimized here */ |
383 | if (arg2 == 0) { | |
384 | tcg_gen_mov_i32(ret, arg1); | |
385 | } else { | |
e8996ee0 FB |
386 | TCGv t0 = tcg_const_i32(arg2); |
387 | tcg_gen_sub_i32(ret, arg1, t0); | |
388 | tcg_temp_free(t0); | |
7089442c | 389 | } |
c896fe29 FB |
390 | } |
391 | ||
ac56dd48 | 392 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
393 | { |
394 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); | |
395 | } | |
396 | ||
ac56dd48 | 397 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
398 | { |
399 | /* some cases can be optimized here */ | |
400 | if (arg2 == 0) { | |
401 | tcg_gen_movi_i32(ret, 0); | |
402 | } else if (arg2 == 0xffffffff) { | |
403 | tcg_gen_mov_i32(ret, arg1); | |
404 | } else { | |
e8996ee0 FB |
405 | TCGv t0 = tcg_const_i32(arg2); |
406 | tcg_gen_and_i32(ret, arg1, t0); | |
407 | tcg_temp_free(t0); | |
c896fe29 FB |
408 | } |
409 | } | |
410 | ||
ac56dd48 | 411 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
412 | { |
413 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); | |
414 | } | |
415 | ||
ac56dd48 | 416 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
417 | { |
418 | /* some cases can be optimized here */ | |
419 | if (arg2 == 0xffffffff) { | |
7089442c | 420 | tcg_gen_movi_i32(ret, 0xffffffff); |
c896fe29 FB |
421 | } else if (arg2 == 0) { |
422 | tcg_gen_mov_i32(ret, arg1); | |
423 | } else { | |
e8996ee0 FB |
424 | TCGv t0 = tcg_const_i32(arg2); |
425 | tcg_gen_or_i32(ret, arg1, t0); | |
426 | tcg_temp_free(t0); | |
c896fe29 FB |
427 | } |
428 | } | |
429 | ||
ac56dd48 | 430 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
431 | { |
432 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); | |
433 | } | |
434 | ||
ac56dd48 | 435 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
436 | { |
437 | /* some cases can be optimized here */ | |
438 | if (arg2 == 0) { | |
439 | tcg_gen_mov_i32(ret, arg1); | |
440 | } else { | |
e8996ee0 FB |
441 | TCGv t0 = tcg_const_i32(arg2); |
442 | tcg_gen_xor_i32(ret, arg1, t0); | |
443 | tcg_temp_free(t0); | |
c896fe29 FB |
444 | } |
445 | } | |
446 | ||
ac56dd48 | 447 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
448 | { |
449 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); | |
450 | } | |
451 | ||
ac56dd48 | 452 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 453 | { |
34151a20 FB |
454 | if (arg2 == 0) { |
455 | tcg_gen_mov_i32(ret, arg1); | |
456 | } else { | |
e8996ee0 FB |
457 | TCGv t0 = tcg_const_i32(arg2); |
458 | tcg_gen_shl_i32(ret, arg1, t0); | |
459 | tcg_temp_free(t0); | |
34151a20 | 460 | } |
c896fe29 FB |
461 | } |
462 | ||
ac56dd48 | 463 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
464 | { |
465 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); | |
466 | } | |
467 | ||
ac56dd48 | 468 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 469 | { |
34151a20 FB |
470 | if (arg2 == 0) { |
471 | tcg_gen_mov_i32(ret, arg1); | |
472 | } else { | |
e8996ee0 FB |
473 | TCGv t0 = tcg_const_i32(arg2); |
474 | tcg_gen_shr_i32(ret, arg1, t0); | |
475 | tcg_temp_free(t0); | |
34151a20 | 476 | } |
c896fe29 FB |
477 | } |
478 | ||
ac56dd48 | 479 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
480 | { |
481 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); | |
482 | } | |
483 | ||
ac56dd48 | 484 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 485 | { |
34151a20 FB |
486 | if (arg2 == 0) { |
487 | tcg_gen_mov_i32(ret, arg1); | |
488 | } else { | |
e8996ee0 FB |
489 | TCGv t0 = tcg_const_i32(arg2); |
490 | tcg_gen_sar_i32(ret, arg1, t0); | |
491 | tcg_temp_free(t0); | |
34151a20 | 492 | } |
c896fe29 FB |
493 | } |
494 | ||
ac56dd48 | 495 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
496 | int label_index) |
497 | { | |
ac56dd48 | 498 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
c896fe29 FB |
499 | } |
500 | ||
cb63669a PB |
501 | static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, |
502 | int label_index) | |
503 | { | |
504 | TCGv t0 = tcg_const_i32(arg2); | |
505 | tcg_gen_brcond_i32(cond, arg1, t0, label_index); | |
506 | tcg_temp_free(t0); | |
507 | } | |
508 | ||
ac56dd48 | 509 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
510 | { |
511 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); | |
512 | } | |
513 | ||
f730fd27 TS |
514 | static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
515 | { | |
e8996ee0 FB |
516 | TCGv t0 = tcg_const_i32(arg2); |
517 | tcg_gen_mul_i32(ret, arg1, t0); | |
518 | tcg_temp_free(t0); | |
f730fd27 TS |
519 | } |
520 | ||
c896fe29 | 521 | #ifdef TCG_TARGET_HAS_div_i32 |
ac56dd48 | 522 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
523 | { |
524 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); | |
525 | } | |
526 | ||
ac56dd48 | 527 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
528 | { |
529 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); | |
530 | } | |
531 | ||
ac56dd48 | 532 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
533 | { |
534 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); | |
535 | } | |
536 | ||
ac56dd48 | 537 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
538 | { |
539 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); | |
540 | } | |
541 | #else | |
ac56dd48 | 542 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 543 | { |
ac56dd48 | 544 | TCGv t0; |
c896fe29 FB |
545 | t0 = tcg_temp_new(TCG_TYPE_I32); |
546 | tcg_gen_sari_i32(t0, arg1, 31); | |
547 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 548 | tcg_temp_free(t0); |
c896fe29 FB |
549 | } |
550 | ||
ac56dd48 | 551 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 552 | { |
ac56dd48 | 553 | TCGv t0; |
c896fe29 FB |
554 | t0 = tcg_temp_new(TCG_TYPE_I32); |
555 | tcg_gen_sari_i32(t0, arg1, 31); | |
556 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 557 | tcg_temp_free(t0); |
c896fe29 FB |
558 | } |
559 | ||
ac56dd48 | 560 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 561 | { |
ac56dd48 | 562 | TCGv t0; |
c896fe29 FB |
563 | t0 = tcg_temp_new(TCG_TYPE_I32); |
564 | tcg_gen_movi_i32(t0, 0); | |
565 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 566 | tcg_temp_free(t0); |
c896fe29 FB |
567 | } |
568 | ||
ac56dd48 | 569 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 570 | { |
ac56dd48 | 571 | TCGv t0; |
c896fe29 FB |
572 | t0 = tcg_temp_new(TCG_TYPE_I32); |
573 | tcg_gen_movi_i32(t0, 0); | |
574 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 575 | tcg_temp_free(t0); |
c896fe29 FB |
576 | } |
577 | #endif | |
578 | ||
579 | #if TCG_TARGET_REG_BITS == 32 | |
580 | ||
ac56dd48 | 581 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 | 582 | { |
98156423 | 583 | if (GET_TCGV(ret) != GET_TCGV(arg)) { |
4d07272d BS |
584 | tcg_gen_mov_i32(ret, arg); |
585 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); | |
586 | } | |
c896fe29 FB |
587 | } |
588 | ||
ac56dd48 | 589 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 FB |
590 | { |
591 | tcg_gen_movi_i32(ret, arg); | |
ac56dd48 | 592 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
c896fe29 FB |
593 | } |
594 | ||
ac56dd48 | 595 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
596 | { |
597 | tcg_gen_ld8u_i32(ret, arg2, offset); | |
ac56dd48 | 598 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
599 | } |
600 | ||
ac56dd48 | 601 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
602 | { |
603 | tcg_gen_ld8s_i32(ret, arg2, offset); | |
ac56dd48 | 604 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
605 | } |
606 | ||
ac56dd48 | 607 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
608 | { |
609 | tcg_gen_ld16u_i32(ret, arg2, offset); | |
ac56dd48 | 610 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
611 | } |
612 | ||
ac56dd48 | 613 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
614 | { |
615 | tcg_gen_ld16s_i32(ret, arg2, offset); | |
ac56dd48 | 616 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
617 | } |
618 | ||
ac56dd48 | 619 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
620 | { |
621 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 622 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
623 | } |
624 | ||
ac56dd48 | 625 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
626 | { |
627 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 628 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
629 | } |
630 | ||
ac56dd48 | 631 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
632 | { |
633 | /* since arg2 and ret have different types, they cannot be the | |
634 | same temporary */ | |
635 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 636 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
c896fe29 FB |
637 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
638 | #else | |
639 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 640 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
c896fe29 FB |
641 | #endif |
642 | } | |
643 | ||
ac56dd48 | 644 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
645 | { |
646 | tcg_gen_st8_i32(arg1, arg2, offset); | |
647 | } | |
648 | ||
ac56dd48 | 649 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
650 | { |
651 | tcg_gen_st16_i32(arg1, arg2, offset); | |
652 | } | |
653 | ||
ac56dd48 | 654 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
655 | { |
656 | tcg_gen_st_i32(arg1, arg2, offset); | |
657 | } | |
658 | ||
ac56dd48 | 659 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
660 | { |
661 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 662 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
c896fe29 FB |
663 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
664 | #else | |
665 | tcg_gen_st_i32(arg1, arg2, offset); | |
ac56dd48 | 666 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
c896fe29 FB |
667 | #endif |
668 | } | |
669 | ||
ac56dd48 | 670 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 671 | { |
ac56dd48 PB |
672 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
673 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
674 | } |
675 | ||
ac56dd48 | 676 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 677 | { |
ac56dd48 PB |
678 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
679 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
680 | } |
681 | ||
ac56dd48 | 682 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
683 | { |
684 | tcg_gen_and_i32(ret, arg1, arg2); | |
ac56dd48 | 685 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
686 | } |
687 | ||
ac56dd48 | 688 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
689 | { |
690 | tcg_gen_andi_i32(ret, arg1, arg2); | |
ac56dd48 | 691 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
692 | } |
693 | ||
ac56dd48 | 694 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
695 | { |
696 | tcg_gen_or_i32(ret, arg1, arg2); | |
ac56dd48 | 697 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
698 | } |
699 | ||
ac56dd48 | 700 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
701 | { |
702 | tcg_gen_ori_i32(ret, arg1, arg2); | |
ac56dd48 | 703 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
704 | } |
705 | ||
ac56dd48 | 706 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
707 | { |
708 | tcg_gen_xor_i32(ret, arg1, arg2); | |
ac56dd48 | 709 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
710 | } |
711 | ||
ac56dd48 | 712 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
713 | { |
714 | tcg_gen_xori_i32(ret, arg1, arg2); | |
ac56dd48 | 715 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
716 | } |
717 | ||
718 | /* XXX: use generic code when basic block handling is OK or CPU | |
719 | specific code (x86) */ | |
ac56dd48 | 720 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
721 | { |
722 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); | |
723 | } | |
724 | ||
ac56dd48 | 725 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
726 | { |
727 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); | |
728 | } | |
729 | ||
ac56dd48 | 730 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
731 | { |
732 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); | |
733 | } | |
734 | ||
ac56dd48 | 735 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
736 | { |
737 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); | |
738 | } | |
739 | ||
ac56dd48 | 740 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
741 | { |
742 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); | |
743 | } | |
744 | ||
ac56dd48 | 745 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
746 | { |
747 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); | |
748 | } | |
749 | ||
ac56dd48 | 750 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
751 | int label_index) |
752 | { | |
ac56dd48 PB |
753 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
754 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), | |
755 | cond, label_index); | |
c896fe29 FB |
756 | } |
757 | ||
ac56dd48 | 758 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 759 | { |
ac56dd48 | 760 | TCGv t0, t1; |
c896fe29 FB |
761 | |
762 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
763 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
764 | ||
ac56dd48 | 765 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
c896fe29 | 766 | |
ac56dd48 PB |
767 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
768 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
769 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); | |
770 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
c896fe29 FB |
771 | |
772 | tcg_gen_mov_i64(ret, t0); | |
e8996ee0 FB |
773 | tcg_temp_free(t0); |
774 | tcg_temp_free(t1); | |
c896fe29 FB |
775 | } |
776 | ||
ac56dd48 | 777 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
778 | { |
779 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); | |
780 | } | |
781 | ||
ac56dd48 | 782 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
783 | { |
784 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); | |
785 | } | |
786 | ||
ac56dd48 | 787 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
788 | { |
789 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); | |
790 | } | |
791 | ||
ac56dd48 | 792 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
793 | { |
794 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); | |
795 | } | |
796 | ||
797 | #else | |
798 | ||
ac56dd48 | 799 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 | 800 | { |
98156423 | 801 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
4d07272d | 802 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
c896fe29 FB |
803 | } |
804 | ||
ac56dd48 | 805 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 | 806 | { |
ac56dd48 | 807 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
c896fe29 FB |
808 | } |
809 | ||
ac56dd48 PB |
810 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
811 | tcg_target_long offset) | |
c896fe29 | 812 | { |
ac56dd48 | 813 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
c896fe29 FB |
814 | } |
815 | ||
ac56dd48 PB |
816 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
817 | tcg_target_long offset) | |
c896fe29 | 818 | { |
ac56dd48 | 819 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
c896fe29 FB |
820 | } |
821 | ||
ac56dd48 PB |
822 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
823 | tcg_target_long offset) | |
c896fe29 | 824 | { |
ac56dd48 | 825 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
c896fe29 FB |
826 | } |
827 | ||
ac56dd48 PB |
828 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
829 | tcg_target_long offset) | |
c896fe29 | 830 | { |
ac56dd48 | 831 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
c896fe29 FB |
832 | } |
833 | ||
ac56dd48 PB |
834 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
835 | tcg_target_long offset) | |
c896fe29 | 836 | { |
ac56dd48 | 837 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
c896fe29 FB |
838 | } |
839 | ||
ac56dd48 PB |
840 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
841 | tcg_target_long offset) | |
c896fe29 | 842 | { |
ac56dd48 | 843 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
c896fe29 FB |
844 | } |
845 | ||
ac56dd48 | 846 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 847 | { |
ac56dd48 | 848 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
c896fe29 FB |
849 | } |
850 | ||
ac56dd48 PB |
851 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
852 | tcg_target_long offset) | |
c896fe29 | 853 | { |
ac56dd48 | 854 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
c896fe29 FB |
855 | } |
856 | ||
ac56dd48 PB |
857 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
858 | tcg_target_long offset) | |
c896fe29 | 859 | { |
ac56dd48 | 860 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
c896fe29 FB |
861 | } |
862 | ||
ac56dd48 PB |
863 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
864 | tcg_target_long offset) | |
c896fe29 | 865 | { |
ac56dd48 | 866 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
c896fe29 FB |
867 | } |
868 | ||
ac56dd48 | 869 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 870 | { |
ac56dd48 | 871 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
c896fe29 FB |
872 | } |
873 | ||
ac56dd48 | 874 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
875 | { |
876 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); | |
877 | } | |
878 | ||
ac56dd48 | 879 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
880 | { |
881 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); | |
882 | } | |
883 | ||
ac56dd48 | 884 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
885 | { |
886 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); | |
887 | } | |
888 | ||
ac56dd48 | 889 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 890 | { |
e8996ee0 FB |
891 | TCGv t0 = tcg_const_i64(arg2); |
892 | tcg_gen_and_i64(ret, arg1, t0); | |
893 | tcg_temp_free(t0); | |
c896fe29 FB |
894 | } |
895 | ||
ac56dd48 | 896 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
897 | { |
898 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); | |
899 | } | |
900 | ||
ac56dd48 | 901 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 902 | { |
e8996ee0 FB |
903 | TCGv t0 = tcg_const_i64(arg2); |
904 | tcg_gen_or_i64(ret, arg1, t0); | |
905 | tcg_temp_free(t0); | |
c896fe29 FB |
906 | } |
907 | ||
ac56dd48 | 908 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
909 | { |
910 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); | |
911 | } | |
912 | ||
ac56dd48 | 913 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 914 | { |
e8996ee0 FB |
915 | TCGv t0 = tcg_const_i64(arg2); |
916 | tcg_gen_xor_i64(ret, arg1, t0); | |
917 | tcg_temp_free(t0); | |
c896fe29 FB |
918 | } |
919 | ||
ac56dd48 | 920 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
921 | { |
922 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); | |
923 | } | |
924 | ||
ac56dd48 | 925 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 926 | { |
34151a20 FB |
927 | if (arg2 == 0) { |
928 | tcg_gen_mov_i64(ret, arg1); | |
929 | } else { | |
e8996ee0 FB |
930 | TCGv t0 = tcg_const_i64(arg2); |
931 | tcg_gen_shl_i64(ret, arg1, t0); | |
932 | tcg_temp_free(t0); | |
34151a20 | 933 | } |
c896fe29 FB |
934 | } |
935 | ||
ac56dd48 | 936 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
937 | { |
938 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); | |
939 | } | |
940 | ||
ac56dd48 | 941 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 942 | { |
34151a20 FB |
943 | if (arg2 == 0) { |
944 | tcg_gen_mov_i64(ret, arg1); | |
945 | } else { | |
e8996ee0 FB |
946 | TCGv t0 = tcg_const_i64(arg2); |
947 | tcg_gen_shr_i64(ret, arg1, t0); | |
948 | tcg_temp_free(t0); | |
34151a20 | 949 | } |
c896fe29 FB |
950 | } |
951 | ||
ac56dd48 | 952 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
953 | { |
954 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); | |
955 | } | |
956 | ||
ac56dd48 | 957 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 958 | { |
34151a20 FB |
959 | if (arg2 == 0) { |
960 | tcg_gen_mov_i64(ret, arg1); | |
961 | } else { | |
e8996ee0 FB |
962 | TCGv t0 = tcg_const_i64(arg2); |
963 | tcg_gen_sar_i64(ret, arg1, t0); | |
964 | tcg_temp_free(t0); | |
34151a20 | 965 | } |
c896fe29 FB |
966 | } |
967 | ||
ac56dd48 | 968 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
969 | int label_index) |
970 | { | |
ac56dd48 | 971 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
c896fe29 FB |
972 | } |
973 | ||
ac56dd48 | 974 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
975 | { |
976 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); | |
977 | } | |
978 | ||
979 | #ifdef TCG_TARGET_HAS_div_i64 | |
ac56dd48 | 980 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
981 | { |
982 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); | |
983 | } | |
984 | ||
ac56dd48 | 985 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
986 | { |
987 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); | |
988 | } | |
989 | ||
ac56dd48 | 990 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
991 | { |
992 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); | |
993 | } | |
994 | ||
ac56dd48 | 995 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
996 | { |
997 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); | |
998 | } | |
999 | #else | |
ac56dd48 | 1000 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1001 | { |
ac56dd48 | 1002 | TCGv t0; |
c896fe29 FB |
1003 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1004 | tcg_gen_sari_i64(t0, arg1, 63); | |
1005 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 1006 | tcg_temp_free(t0); |
c896fe29 FB |
1007 | } |
1008 | ||
ac56dd48 | 1009 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1010 | { |
ac56dd48 | 1011 | TCGv t0; |
c896fe29 FB |
1012 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1013 | tcg_gen_sari_i64(t0, arg1, 63); | |
1014 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 1015 | tcg_temp_free(t0); |
c896fe29 FB |
1016 | } |
1017 | ||
ac56dd48 | 1018 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1019 | { |
ac56dd48 | 1020 | TCGv t0; |
c896fe29 FB |
1021 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1022 | tcg_gen_movi_i64(t0, 0); | |
1023 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); | |
e8996ee0 | 1024 | tcg_temp_free(t0); |
c896fe29 FB |
1025 | } |
1026 | ||
ac56dd48 | 1027 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 1028 | { |
ac56dd48 | 1029 | TCGv t0; |
c896fe29 FB |
1030 | t0 = tcg_temp_new(TCG_TYPE_I64); |
1031 | tcg_gen_movi_i64(t0, 0); | |
1032 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); | |
e8996ee0 | 1033 | tcg_temp_free(t0); |
c896fe29 FB |
1034 | } |
1035 | #endif | |
1036 | ||
1037 | #endif | |
1038 | ||
6359706f AJ |
1039 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1040 | { | |
1041 | /* some cases can be optimized here */ | |
1042 | if (arg2 == 0) { | |
1043 | tcg_gen_mov_i64(ret, arg1); | |
1044 | } else { | |
1045 | TCGv t0 = tcg_const_i64(arg2); | |
1046 | tcg_gen_add_i64(ret, arg1, t0); | |
1047 | tcg_temp_free(t0); | |
1048 | } | |
1049 | } | |
1050 | ||
cb63669a PB |
1051 | static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, |
1052 | int label_index) | |
1053 | { | |
1054 | TCGv t0 = tcg_const_i64(arg2); | |
1055 | tcg_gen_brcond_i64(cond, arg1, t0, label_index); | |
1056 | tcg_temp_free(t0); | |
1057 | } | |
1058 | ||
6359706f AJ |
1059 | static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1060 | { | |
1061 | TCGv t0 = tcg_const_i64(arg2); | |
1062 | tcg_gen_mul_i64(ret, arg1, t0); | |
1063 | tcg_temp_free(t0); | |
1064 | } | |
1065 | ||
1066 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) | |
1067 | { | |
1068 | /* some cases can be optimized here */ | |
1069 | if (arg2 == 0) { | |
1070 | tcg_gen_mov_i64(ret, arg1); | |
1071 | } else { | |
1072 | TCGv t0 = tcg_const_i64(arg2); | |
1073 | tcg_gen_sub_i64(ret, arg1, t0); | |
1074 | tcg_temp_free(t0); | |
1075 | } | |
1076 | } | |
1077 | ||
c896fe29 FB |
1078 | /***************************************/ |
1079 | /* optional operations */ | |
1080 | ||
ac56dd48 | 1081 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1082 | { |
1083 | #ifdef TCG_TARGET_HAS_ext8s_i32 | |
1084 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); | |
1085 | #else | |
1086 | tcg_gen_shli_i32(ret, arg, 24); | |
5ff9d6a4 | 1087 | tcg_gen_sari_i32(ret, ret, 24); |
c896fe29 FB |
1088 | #endif |
1089 | } | |
1090 | ||
ac56dd48 | 1091 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1092 | { |
1093 | #ifdef TCG_TARGET_HAS_ext16s_i32 | |
1094 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); | |
1095 | #else | |
1096 | tcg_gen_shli_i32(ret, arg, 16); | |
5ff9d6a4 | 1097 | tcg_gen_sari_i32(ret, ret, 16); |
c896fe29 FB |
1098 | #endif |
1099 | } | |
1100 | ||
86831435 PB |
1101 | /* These are currently just for convenience. |
1102 | We assume a target will recognise these automatically . */ | |
1103 | static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) | |
1104 | { | |
1105 | tcg_gen_andi_i32(ret, arg, 0xffu); | |
1106 | } | |
1107 | ||
1108 | static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) | |
1109 | { | |
1110 | tcg_gen_andi_i32(ret, arg, 0xffffu); | |
1111 | } | |
1112 | ||
c896fe29 | 1113 | /* Note: we assume the two high bytes are set to zero */ |
ac56dd48 | 1114 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1115 | { |
1116 | #ifdef TCG_TARGET_HAS_bswap16_i32 | |
1117 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); | |
1118 | #else | |
ac56dd48 | 1119 | TCGv t0, t1; |
c896fe29 FB |
1120 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1121 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1122 | ||
1123 | tcg_gen_shri_i32(t0, arg, 8); | |
1124 | tcg_gen_andi_i32(t1, arg, 0x000000ff); | |
1125 | tcg_gen_shli_i32(t1, t1, 8); | |
1126 | tcg_gen_or_i32(ret, t0, t1); | |
e8996ee0 FB |
1127 | tcg_temp_free(t0); |
1128 | tcg_temp_free(t1); | |
c896fe29 FB |
1129 | #endif |
1130 | } | |
1131 | ||
ac56dd48 | 1132 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1133 | { |
1134 | #ifdef TCG_TARGET_HAS_bswap_i32 | |
1135 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); | |
1136 | #else | |
ac56dd48 | 1137 | TCGv t0, t1; |
c896fe29 FB |
1138 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1139 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1140 | ||
1141 | tcg_gen_shli_i32(t0, arg, 24); | |
1142 | ||
1143 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); | |
1144 | tcg_gen_shli_i32(t1, t1, 8); | |
1145 | tcg_gen_or_i32(t0, t0, t1); | |
1146 | ||
1147 | tcg_gen_shri_i32(t1, arg, 8); | |
1148 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); | |
1149 | tcg_gen_or_i32(t0, t0, t1); | |
1150 | ||
1151 | tcg_gen_shri_i32(t1, arg, 24); | |
1152 | tcg_gen_or_i32(ret, t0, t1); | |
e8996ee0 FB |
1153 | tcg_temp_free(t0); |
1154 | tcg_temp_free(t1); | |
c896fe29 FB |
1155 | #endif |
1156 | } | |
1157 | ||
1158 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1159 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1160 | { |
1161 | tcg_gen_ext8s_i32(ret, arg); | |
ac56dd48 | 1162 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1163 | } |
1164 | ||
ac56dd48 | 1165 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1166 | { |
1167 | tcg_gen_ext16s_i32(ret, arg); | |
ac56dd48 | 1168 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1169 | } |
1170 | ||
ac56dd48 | 1171 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1172 | { |
1173 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1174 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1175 | } |
1176 | ||
86831435 PB |
1177 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1178 | { | |
1179 | tcg_gen_ext8u_i32(ret, arg); | |
1180 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1181 | } | |
1182 | ||
1183 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) | |
1184 | { | |
1185 | tcg_gen_ext16u_i32(ret, arg); | |
1186 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1187 | } | |
1188 | ||
1189 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) | |
1190 | { | |
1191 | tcg_gen_mov_i32(ret, arg); | |
1192 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1193 | } | |
1194 | ||
ac56dd48 | 1195 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1196 | { |
1197 | tcg_gen_mov_i32(ret, arg); | |
1198 | } | |
1199 | ||
ac56dd48 | 1200 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1201 | { |
1202 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1203 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
1204 | } |
1205 | ||
ac56dd48 | 1206 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1207 | { |
1208 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1209 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1210 | } |
1211 | ||
ac56dd48 | 1212 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 | 1213 | { |
ac56dd48 | 1214 | TCGv t0, t1; |
c896fe29 FB |
1215 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1216 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1217 | ||
1218 | tcg_gen_bswap_i32(t0, arg); | |
ac56dd48 | 1219 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
c896fe29 | 1220 | tcg_gen_mov_i32(ret, t1); |
ac56dd48 | 1221 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
e8996ee0 FB |
1222 | tcg_temp_free(t0); |
1223 | tcg_temp_free(t1); | |
c896fe29 FB |
1224 | } |
1225 | #else | |
1226 | ||
ac56dd48 | 1227 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1228 | { |
1229 | #ifdef TCG_TARGET_HAS_ext8s_i64 | |
1230 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); | |
1231 | #else | |
1232 | tcg_gen_shli_i64(ret, arg, 56); | |
5ff9d6a4 | 1233 | tcg_gen_sari_i64(ret, ret, 56); |
c896fe29 FB |
1234 | #endif |
1235 | } | |
1236 | ||
ac56dd48 | 1237 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1238 | { |
1239 | #ifdef TCG_TARGET_HAS_ext16s_i64 | |
1240 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); | |
1241 | #else | |
1242 | tcg_gen_shli_i64(ret, arg, 48); | |
5ff9d6a4 | 1243 | tcg_gen_sari_i64(ret, ret, 48); |
c896fe29 FB |
1244 | #endif |
1245 | } | |
1246 | ||
ac56dd48 | 1247 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1248 | { |
1249 | #ifdef TCG_TARGET_HAS_ext32s_i64 | |
1250 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); | |
1251 | #else | |
1252 | tcg_gen_shli_i64(ret, arg, 32); | |
5ff9d6a4 | 1253 | tcg_gen_sari_i64(ret, ret, 32); |
c896fe29 FB |
1254 | #endif |
1255 | } | |
1256 | ||
86831435 PB |
1257 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1258 | { | |
1259 | tcg_gen_andi_i64(ret, arg, 0xffu); | |
1260 | } | |
1261 | ||
1262 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) | |
1263 | { | |
1264 | tcg_gen_andi_i64(ret, arg, 0xffffu); | |
1265 | } | |
1266 | ||
1267 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) | |
1268 | { | |
1269 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); | |
1270 | } | |
1271 | ||
c896fe29 | 1272 | /* Note: we assume the target supports move between 32 and 64 bit |
ac56dd48 PB |
1273 | registers. This will probably break MIPS64 targets. */ |
1274 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) | |
c896fe29 FB |
1275 | { |
1276 | tcg_gen_mov_i32(ret, arg); | |
1277 | } | |
1278 | ||
1279 | /* Note: we assume the target supports move between 32 and 64 bit | |
1280 | registers */ | |
ac56dd48 | 1281 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 | 1282 | { |
86831435 | 1283 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); |
c896fe29 FB |
1284 | } |
1285 | ||
1286 | /* Note: we assume the target supports move between 32 and 64 bit | |
1287 | registers */ | |
ac56dd48 | 1288 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1289 | { |
1290 | tcg_gen_ext32s_i64(ret, arg); | |
1291 | } | |
1292 | ||
ac56dd48 | 1293 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1294 | { |
1295 | #ifdef TCG_TARGET_HAS_bswap_i64 | |
1296 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); | |
1297 | #else | |
ac56dd48 | 1298 | TCGv t0, t1; |
c896fe29 FB |
1299 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1300 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1301 | ||
1302 | tcg_gen_shli_i64(t0, arg, 56); | |
1303 | ||
1304 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); | |
1305 | tcg_gen_shli_i64(t1, t1, 40); | |
1306 | tcg_gen_or_i64(t0, t0, t1); | |
1307 | ||
1308 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); | |
1309 | tcg_gen_shli_i64(t1, t1, 24); | |
1310 | tcg_gen_or_i64(t0, t0, t1); | |
1311 | ||
1312 | tcg_gen_andi_i64(t1, arg, 0xff000000); | |
1313 | tcg_gen_shli_i64(t1, t1, 8); | |
1314 | tcg_gen_or_i64(t0, t0, t1); | |
1315 | ||
1316 | tcg_gen_shri_i64(t1, arg, 8); | |
1317 | tcg_gen_andi_i64(t1, t1, 0xff000000); | |
1318 | tcg_gen_or_i64(t0, t0, t1); | |
1319 | ||
1320 | tcg_gen_shri_i64(t1, arg, 24); | |
1321 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); | |
1322 | tcg_gen_or_i64(t0, t0, t1); | |
1323 | ||
1324 | tcg_gen_shri_i64(t1, arg, 40); | |
1325 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); | |
1326 | tcg_gen_or_i64(t0, t0, t1); | |
1327 | ||
1328 | tcg_gen_shri_i64(t1, arg, 56); | |
1329 | tcg_gen_or_i64(ret, t0, t1); | |
e8996ee0 FB |
1330 | tcg_temp_free(t0); |
1331 | tcg_temp_free(t1); | |
c896fe29 FB |
1332 | #endif |
1333 | } | |
1334 | ||
1335 | #endif | |
1336 | ||
390efc54 PB |
1337 | static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1338 | { | |
1339 | #ifdef TCG_TARGET_HAS_neg_i32 | |
1340 | tcg_gen_op2(INDEX_op_neg_i32, ret, arg); | |
1341 | #else | |
e8996ee0 FB |
1342 | TCGv t0 = tcg_const_i32(0); |
1343 | tcg_gen_sub_i32(ret, t0, arg); | |
1344 | tcg_temp_free(t0); | |
390efc54 PB |
1345 | #endif |
1346 | } | |
1347 | ||
1348 | static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) | |
1349 | { | |
1350 | #ifdef TCG_TARGET_HAS_neg_i64 | |
1351 | tcg_gen_op2(INDEX_op_neg_i64, ret, arg); | |
1352 | #else | |
e8996ee0 FB |
1353 | TCGv t0 = tcg_const_i64(0); |
1354 | tcg_gen_sub_i64(ret, t0, arg); | |
1355 | tcg_temp_free(t0); | |
390efc54 PB |
1356 | #endif |
1357 | } | |
1358 | ||
0b6ce4cf FB |
1359 | static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
1360 | { | |
e8996ee0 | 1361 | tcg_gen_xori_i32(ret, arg, -1); |
0b6ce4cf FB |
1362 | } |
1363 | ||
1364 | static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) | |
1365 | { | |
e8996ee0 | 1366 | tcg_gen_xori_i64(ret, arg, -1); |
0b6ce4cf | 1367 | } |
5ff9d6a4 FB |
1368 | |
1369 | static inline void tcg_gen_discard_i32(TCGv arg) | |
1370 | { | |
1371 | tcg_gen_op1(INDEX_op_discard, arg); | |
1372 | } | |
1373 | ||
1374 | #if TCG_TARGET_REG_BITS == 32 | |
1375 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1376 | { | |
1377 | tcg_gen_discard_i32(arg); | |
1378 | tcg_gen_discard_i32(TCGV_HIGH(arg)); | |
1379 | } | |
1380 | #else | |
1381 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1382 | { | |
1383 | tcg_gen_op1(INDEX_op_discard, arg); | |
1384 | } | |
1385 | #endif | |
1386 | ||
36aa55dc PB |
1387 | static inline void tcg_gen_concat_i32_i64(TCGv dest, TCGv low, TCGv high) |
1388 | { | |
1389 | #if TCG_TARGET_REG_BITS == 32 | |
1390 | tcg_gen_mov_i32(dest, low); | |
1391 | tcg_gen_mov_i32(TCGV_HIGH(dest), high); | |
1392 | #else | |
1393 | TCGv tmp = tcg_temp_new (TCG_TYPE_I64); | |
1394 | /* This extension is only needed for type correctness. | |
1395 | We may be able to do better given target specific information. */ | |
1396 | tcg_gen_extu_i32_i64(tmp, high); | |
1397 | tcg_gen_shli_i64(tmp, tmp, 32); | |
1398 | tcg_gen_extu_i32_i64(dest, low); | |
1399 | tcg_gen_or_i64(dest, dest, tmp); | |
1400 | tcg_temp_free(tmp); | |
1401 | #endif | |
1402 | } | |
1403 | ||
945ca823 BS |
1404 | static inline void tcg_gen_concat32_i64(TCGv dest, TCGv low, TCGv high) |
1405 | { | |
1406 | #if TCG_TARGET_REG_BITS == 32 | |
1407 | tcg_gen_concat_i32_i64(dest, low, high); | |
1408 | #else | |
1409 | TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
88422e2e | 1410 | tcg_gen_ext32u_i64(dest, low); |
945ca823 | 1411 | tcg_gen_shli_i64(tmp, high, 32); |
88422e2e | 1412 | tcg_gen_or_i64(dest, dest, tmp); |
945ca823 BS |
1413 | tcg_temp_free(tmp); |
1414 | #endif | |
1415 | } | |
1416 | ||
f24cb33e AJ |
1417 | static inline void tcg_gen_andc_i32(TCGv ret, TCGv arg1, TCGv arg2) |
1418 | { | |
1419 | TCGv t0; | |
1420 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1421 | tcg_gen_not_i32(t0, arg2); | |
1422 | tcg_gen_and_i32(ret, arg1, t0); | |
1423 | tcg_temp_free(t0); | |
1424 | } | |
1425 | ||
1426 | static inline void tcg_gen_andc_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1427 | { | |
1428 | TCGv t0; | |
1429 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1430 | tcg_gen_not_i64(t0, arg2); | |
1431 | tcg_gen_and_i64(ret, arg1, t0); | |
1432 | tcg_temp_free(t0); | |
1433 | } | |
1434 | ||
1435 | static inline void tcg_gen_eqv_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1436 | { | |
1437 | TCGv t0; | |
1438 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1439 | tcg_gen_xor_i32(t0, arg1, arg2); | |
1440 | tcg_gen_not_i32(ret, t0); | |
1441 | tcg_temp_free(t0); | |
1442 | } | |
1443 | ||
1444 | static inline void tcg_gen_eqv_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1445 | { | |
1446 | TCGv t0; | |
1447 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1448 | tcg_gen_xor_i64(t0, arg1, arg2); | |
1449 | tcg_gen_not_i64(ret, t0); | |
1450 | tcg_temp_free(t0); | |
1451 | } | |
1452 | ||
1453 | static inline void tcg_gen_nand_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1454 | { | |
1455 | TCGv t0; | |
1456 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1457 | tcg_gen_and_i32(t0, arg1, arg2); | |
1458 | tcg_gen_not_i32(ret, t0); | |
1459 | tcg_temp_free(t0); | |
1460 | } | |
1461 | ||
1462 | static inline void tcg_gen_nand_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1463 | { | |
1464 | TCGv t0; | |
1465 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1466 | tcg_gen_and_i64(t0, arg1, arg2); | |
1467 | tcg_gen_not_i64(ret, t0); | |
1468 | tcg_temp_free(t0); | |
1469 | } | |
1470 | ||
1471 | static inline void tcg_gen_nor_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1472 | { | |
1473 | TCGv t0; | |
1474 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1475 | tcg_gen_or_i32(t0, arg1, arg2); | |
1476 | tcg_gen_not_i32(ret, t0); | |
1477 | tcg_temp_free(t0); | |
1478 | } | |
1479 | ||
1480 | static inline void tcg_gen_nor_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1481 | { | |
1482 | TCGv t0; | |
1483 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1484 | tcg_gen_or_i64(t0, arg1, arg2); | |
1485 | tcg_gen_not_i64(ret, t0); | |
1486 | tcg_temp_free(t0); | |
1487 | } | |
1488 | ||
1489 | static inline void tcg_gen_orc_i32(TCGv ret, TCGv arg1, TCGv arg2) | |
1490 | { | |
1491 | TCGv t0; | |
1492 | t0 = tcg_temp_new(TCG_TYPE_I32); | |
1493 | tcg_gen_not_i32(t0, arg2); | |
1494 | tcg_gen_or_i32(ret, arg1, t0); | |
1495 | tcg_temp_free(t0); | |
1496 | } | |
1497 | ||
1498 | static inline void tcg_gen_orc_i64(TCGv ret, TCGv arg1, TCGv arg2) | |
1499 | { | |
1500 | TCGv t0; | |
1501 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
1502 | tcg_gen_not_i64(t0, arg2); | |
1503 | tcg_gen_or_i64(ret, arg1, t0); | |
1504 | tcg_temp_free(t0); | |
1505 | } | |
1506 | ||
c896fe29 FB |
1507 | /***************************************/ |
1508 | /* QEMU specific operations. Their type depend on the QEMU CPU | |
1509 | type. */ | |
1510 | #ifndef TARGET_LONG_BITS | |
1511 | #error must include QEMU headers | |
1512 | #endif | |
1513 | ||
7e4597d7 FB |
1514 | /* debug info: write the PC of the corresponding QEMU CPU instruction */ |
1515 | static inline void tcg_gen_debug_insn_start(uint64_t pc) | |
1516 | { | |
1517 | /* XXX: must really use a 32 bit size for TCGArg in all cases */ | |
1518 | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS | |
bcb0126f PB |
1519 | tcg_gen_op2ii(INDEX_op_debug_insn_start, |
1520 | (uint32_t)(pc), (uint32_t)(pc >> 32)); | |
7e4597d7 FB |
1521 | #else |
1522 | tcg_gen_op1i(INDEX_op_debug_insn_start, pc); | |
1523 | #endif | |
1524 | } | |
1525 | ||
c896fe29 FB |
1526 | static inline void tcg_gen_exit_tb(tcg_target_long val) |
1527 | { | |
ac56dd48 | 1528 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
c896fe29 FB |
1529 | } |
1530 | ||
1531 | static inline void tcg_gen_goto_tb(int idx) | |
1532 | { | |
ac56dd48 | 1533 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
c896fe29 FB |
1534 | } |
1535 | ||
1536 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1537 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1538 | { |
1539 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1540 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 | 1541 | #else |
ac56dd48 PB |
1542 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1543 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1544 | #endif |
1545 | } | |
1546 | ||
ac56dd48 | 1547 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1548 | { |
1549 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1550 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 | 1551 | #else |
ac56dd48 | 1552 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1553 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1554 | #endif |
1555 | } | |
1556 | ||
ac56dd48 | 1557 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1558 | { |
1559 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1560 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 | 1561 | #else |
ac56dd48 PB |
1562 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1563 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1564 | #endif |
1565 | } | |
1566 | ||
ac56dd48 | 1567 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1568 | { |
1569 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1570 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 | 1571 | #else |
ac56dd48 | 1572 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1573 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1574 | #endif |
1575 | } | |
1576 | ||
ac56dd48 | 1577 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1578 | { |
1579 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1580 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1581 | #else |
ac56dd48 PB |
1582 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1583 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1584 | #endif |
1585 | } | |
1586 | ||
ac56dd48 | 1587 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1588 | { |
1589 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1590 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1591 | #else |
ac56dd48 PB |
1592 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1593 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); | |
c896fe29 FB |
1594 | #endif |
1595 | } | |
1596 | ||
ac56dd48 | 1597 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1598 | { |
1599 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1600 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
c896fe29 | 1601 | #else |
ac56dd48 PB |
1602 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1603 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1604 | #endif |
1605 | } | |
1606 | ||
ac56dd48 | 1607 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1608 | { |
1609 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1610 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 | 1611 | #else |
ac56dd48 | 1612 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1613 | #endif |
1614 | } | |
1615 | ||
ac56dd48 | 1616 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1617 | { |
1618 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1619 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 | 1620 | #else |
ac56dd48 | 1621 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1622 | #endif |
1623 | } | |
1624 | ||
ac56dd48 | 1625 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1626 | { |
1627 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1628 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 | 1629 | #else |
ac56dd48 | 1630 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1631 | #endif |
1632 | } | |
1633 | ||
ac56dd48 | 1634 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1635 | { |
1636 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1637 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
c896fe29 | 1638 | #else |
ac56dd48 PB |
1639 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1640 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1641 | #endif |
1642 | } | |
1643 | ||
56b8f567 | 1644 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
a768e4b2 | 1645 | #define tcg_gen_discard_ptr tcg_gen_discard_i32 |
f8422f52 | 1646 | |
c896fe29 FB |
1647 | #else /* TCG_TARGET_REG_BITS == 32 */ |
1648 | ||
ac56dd48 | 1649 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1650 | { |
ac56dd48 | 1651 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 FB |
1652 | } |
1653 | ||
ac56dd48 | 1654 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1655 | { |
ac56dd48 | 1656 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 FB |
1657 | } |
1658 | ||
ac56dd48 | 1659 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1660 | { |
ac56dd48 | 1661 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 FB |
1662 | } |
1663 | ||
ac56dd48 | 1664 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1665 | { |
ac56dd48 | 1666 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 FB |
1667 | } |
1668 | ||
ac56dd48 | 1669 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1670 | { |
ac56dd48 | 1671 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 FB |
1672 | } |
1673 | ||
ac56dd48 | 1674 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1675 | { |
ac56dd48 | 1676 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
c896fe29 FB |
1677 | } |
1678 | ||
ac56dd48 | 1679 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1680 | { |
ac56dd48 | 1681 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
c896fe29 FB |
1682 | } |
1683 | ||
ac56dd48 | 1684 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1685 | { |
ac56dd48 | 1686 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 FB |
1687 | } |
1688 | ||
ac56dd48 | 1689 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1690 | { |
ac56dd48 | 1691 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 FB |
1692 | } |
1693 | ||
ac56dd48 | 1694 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1695 | { |
ac56dd48 | 1696 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 FB |
1697 | } |
1698 | ||
ac56dd48 | 1699 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1700 | { |
ac56dd48 | 1701 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
c896fe29 FB |
1702 | } |
1703 | ||
56b8f567 | 1704 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
a768e4b2 | 1705 | #define tcg_gen_discard_ptr tcg_gen_discard_i64 |
f8422f52 | 1706 | |
c896fe29 | 1707 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
f8422f52 BS |
1708 | |
1709 | #if TARGET_LONG_BITS == 64 | |
1710 | #define TCG_TYPE_TL TCG_TYPE_I64 | |
1711 | #define tcg_gen_movi_tl tcg_gen_movi_i64 | |
1712 | #define tcg_gen_mov_tl tcg_gen_mov_i64 | |
1713 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 | |
1714 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 | |
1715 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 | |
1716 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 | |
1717 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 | |
1718 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 | |
1719 | #define tcg_gen_ld_tl tcg_gen_ld_i64 | |
1720 | #define tcg_gen_st8_tl tcg_gen_st8_i64 | |
1721 | #define tcg_gen_st16_tl tcg_gen_st16_i64 | |
1722 | #define tcg_gen_st32_tl tcg_gen_st32_i64 | |
1723 | #define tcg_gen_st_tl tcg_gen_st_i64 | |
1724 | #define tcg_gen_add_tl tcg_gen_add_i64 | |
1725 | #define tcg_gen_addi_tl tcg_gen_addi_i64 | |
1726 | #define tcg_gen_sub_tl tcg_gen_sub_i64 | |
390efc54 | 1727 | #define tcg_gen_neg_tl tcg_gen_neg_i64 |
f8422f52 BS |
1728 | #define tcg_gen_subi_tl tcg_gen_subi_i64 |
1729 | #define tcg_gen_and_tl tcg_gen_and_i64 | |
1730 | #define tcg_gen_andi_tl tcg_gen_andi_i64 | |
1731 | #define tcg_gen_or_tl tcg_gen_or_i64 | |
1732 | #define tcg_gen_ori_tl tcg_gen_ori_i64 | |
1733 | #define tcg_gen_xor_tl tcg_gen_xor_i64 | |
1734 | #define tcg_gen_xori_tl tcg_gen_xori_i64 | |
0b6ce4cf | 1735 | #define tcg_gen_not_tl tcg_gen_not_i64 |
f8422f52 BS |
1736 | #define tcg_gen_shl_tl tcg_gen_shl_i64 |
1737 | #define tcg_gen_shli_tl tcg_gen_shli_i64 | |
1738 | #define tcg_gen_shr_tl tcg_gen_shr_i64 | |
1739 | #define tcg_gen_shri_tl tcg_gen_shri_i64 | |
1740 | #define tcg_gen_sar_tl tcg_gen_sar_i64 | |
1741 | #define tcg_gen_sari_tl tcg_gen_sari_i64 | |
0cf767d6 | 1742 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
cb63669a | 1743 | #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64 |
f730fd27 TS |
1744 | #define tcg_gen_mul_tl tcg_gen_mul_i64 |
1745 | #define tcg_gen_muli_tl tcg_gen_muli_i64 | |
a768e4b2 | 1746 | #define tcg_gen_discard_tl tcg_gen_discard_i64 |
e429073d BS |
1747 | #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32 |
1748 | #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64 | |
1749 | #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64 | |
1750 | #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64 | |
1751 | #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64 | |
1752 | #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64 | |
0b6ce4cf FB |
1753 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64 |
1754 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64 | |
1755 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64 | |
1756 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64 | |
1757 | #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64 | |
1758 | #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64 | |
945ca823 | 1759 | #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64 |
f24cb33e AJ |
1760 | #define tcg_gen_andc_tl tcg_gen_andc_i64 |
1761 | #define tcg_gen_eqv_tl tcg_gen_eqv_i64 | |
1762 | #define tcg_gen_nand_tl tcg_gen_nand_i64 | |
1763 | #define tcg_gen_nor_tl tcg_gen_nor_i64 | |
1764 | #define tcg_gen_orc_tl tcg_gen_orc_i64 | |
a98824ac | 1765 | #define tcg_const_tl tcg_const_i64 |
bdffd4a9 | 1766 | #define tcg_const_local_tl tcg_const_local_i64 |
f8422f52 BS |
1767 | #else |
1768 | #define TCG_TYPE_TL TCG_TYPE_I32 | |
1769 | #define tcg_gen_movi_tl tcg_gen_movi_i32 | |
1770 | #define tcg_gen_mov_tl tcg_gen_mov_i32 | |
1771 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 | |
1772 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 | |
1773 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 | |
1774 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 | |
1775 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 | |
1776 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 | |
1777 | #define tcg_gen_ld_tl tcg_gen_ld_i32 | |
1778 | #define tcg_gen_st8_tl tcg_gen_st8_i32 | |
1779 | #define tcg_gen_st16_tl tcg_gen_st16_i32 | |
1780 | #define tcg_gen_st32_tl tcg_gen_st_i32 | |
1781 | #define tcg_gen_st_tl tcg_gen_st_i32 | |
1782 | #define tcg_gen_add_tl tcg_gen_add_i32 | |
1783 | #define tcg_gen_addi_tl tcg_gen_addi_i32 | |
1784 | #define tcg_gen_sub_tl tcg_gen_sub_i32 | |
390efc54 | 1785 | #define tcg_gen_neg_tl tcg_gen_neg_i32 |
f8422f52 BS |
1786 | #define tcg_gen_subi_tl tcg_gen_subi_i32 |
1787 | #define tcg_gen_and_tl tcg_gen_and_i32 | |
1788 | #define tcg_gen_andi_tl tcg_gen_andi_i32 | |
1789 | #define tcg_gen_or_tl tcg_gen_or_i32 | |
1790 | #define tcg_gen_ori_tl tcg_gen_ori_i32 | |
1791 | #define tcg_gen_xor_tl tcg_gen_xor_i32 | |
1792 | #define tcg_gen_xori_tl tcg_gen_xori_i32 | |
0b6ce4cf | 1793 | #define tcg_gen_not_tl tcg_gen_not_i32 |
f8422f52 BS |
1794 | #define tcg_gen_shl_tl tcg_gen_shl_i32 |
1795 | #define tcg_gen_shli_tl tcg_gen_shli_i32 | |
1796 | #define tcg_gen_shr_tl tcg_gen_shr_i32 | |
1797 | #define tcg_gen_shri_tl tcg_gen_shri_i32 | |
1798 | #define tcg_gen_sar_tl tcg_gen_sar_i32 | |
1799 | #define tcg_gen_sari_tl tcg_gen_sari_i32 | |
0cf767d6 | 1800 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
cb63669a | 1801 | #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32 |
f730fd27 TS |
1802 | #define tcg_gen_mul_tl tcg_gen_mul_i32 |
1803 | #define tcg_gen_muli_tl tcg_gen_muli_i32 | |
a768e4b2 | 1804 | #define tcg_gen_discard_tl tcg_gen_discard_i32 |
e429073d BS |
1805 | #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 |
1806 | #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32 | |
1807 | #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 | |
1808 | #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 | |
1809 | #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64 | |
1810 | #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64 | |
0b6ce4cf FB |
1811 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32 |
1812 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32 | |
1813 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32 | |
1814 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32 | |
1815 | #define tcg_gen_ext32u_tl tcg_gen_mov_i32 | |
1816 | #define tcg_gen_ext32s_tl tcg_gen_mov_i32 | |
945ca823 | 1817 | #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64 |
f24cb33e AJ |
1818 | #define tcg_gen_andc_tl tcg_gen_andc_i32 |
1819 | #define tcg_gen_eqv_tl tcg_gen_eqv_i32 | |
1820 | #define tcg_gen_nand_tl tcg_gen_nand_i32 | |
1821 | #define tcg_gen_nor_tl tcg_gen_nor_i32 | |
1822 | #define tcg_gen_orc_tl tcg_gen_orc_i32 | |
a98824ac | 1823 | #define tcg_const_tl tcg_const_i32 |
bdffd4a9 | 1824 | #define tcg_const_local_tl tcg_const_local_i32 |
f8422f52 | 1825 | #endif |
6ddbc6e4 PB |
1826 | |
1827 | #if TCG_TARGET_REG_BITS == 32 | |
48d38ca5 | 1828 | #define tcg_gen_add_ptr tcg_gen_add_i32 |
6ddbc6e4 | 1829 | #define tcg_gen_addi_ptr tcg_gen_addi_i32 |
48d38ca5 | 1830 | #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32 |
6ddbc6e4 | 1831 | #else /* TCG_TARGET_REG_BITS == 32 */ |
48d38ca5 | 1832 | #define tcg_gen_add_ptr tcg_gen_add_i64 |
6ddbc6e4 | 1833 | #define tcg_gen_addi_ptr tcg_gen_addi_i64 |
48d38ca5 | 1834 | #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64 |
6ddbc6e4 PB |
1835 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
1836 |