]>
Commit | Line | Data |
---|---|---|
87ecb68b PB |
1 | /* |
2 | * Misc ARM declarations | |
3 | * | |
4 | * Copyright (c) 2006 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
7 | * This code is licenced under the LGPL. | |
8 | * | |
9 | */ | |
10 | ||
11 | #ifndef ARM_MISC_H | |
12 | #define ARM_MISC_H 1 | |
13 | ||
14 | /* The CPU is also modeled as an interrupt controller. */ | |
15 | #define ARM_PIC_CPU_IRQ 0 | |
16 | #define ARM_PIC_CPU_FIQ 1 | |
17 | qemu_irq *arm_pic_init_cpu(CPUState *env); | |
18 | ||
19 | /* armv7m.c */ | |
20 | qemu_irq *armv7m_init(int flash_size, int sram_size, | |
21 | const char *kernel_filename, const char *cpu_model); | |
22 | ||
23 | /* arm_boot.c */ | |
24 | ||
25 | void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, | |
26 | const char *kernel_cmdline, const char *initrd_filename, | |
27 | int board_id, target_phys_addr_t loader_start); | |
28 | ||
29 | /* armv7m_nvic.c */ | |
e57ec016 | 30 | int system_clock_scale; |
87ecb68b PB |
31 | qemu_irq *armv7m_nvic_init(CPUState *env); |
32 | ||
eea589cc PB |
33 | /* stellaris_enent.c */ |
34 | void stellaris_enet_init(NICInfo *nd, uint32_t base, qemu_irq irq); | |
35 | ||
87ecb68b PB |
36 | #endif /* !ARM_MISC_H */ |
37 |