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tricore: fix RRPW_INSERT instruction
[qemu.git] / target / tricore / fpu_helper.c
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1/*
2 * TriCore emulation for qemu: fpu helper.
3 *
4 * Copyright (c) 2016 Bastian Koppelmann University of Paderborn
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
02754acd 9 * version 2.1 of the License, or (at your option) any later version.
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10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "qemu/osdep.h"
21#include "cpu.h"
22#include "exec/helper-proto.h"
24f91e81 23#include "fpu/softfloat.h"
996a729f 24
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25#define QUIET_NAN 0x7fc00000
26#define ADD_NAN 0x7fc00001
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27#define DIV_NAN 0x7fc00008
28#define MUL_NAN 0x7fc00002
29#define FPU_FS PSW_USB_C
30#define FPU_FI PSW_USB_V
31#define FPU_FV PSW_USB_SV
32#define FPU_FZ PSW_USB_AV
33#define FPU_FU PSW_USB_SAV
34
35/* we don't care about input_denormal */
36static inline uint8_t f_get_excp_flags(CPUTriCoreState *env)
37{
38 return get_float_exception_flags(&env->fp_status)
39 & (float_flag_invalid
40 | float_flag_overflow
41 | float_flag_underflow
42 | float_flag_output_denormal
43 | float_flag_divbyzero
44 | float_flag_inexact);
45}
46
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47static inline float32 f_maddsub_nan_result(float32 arg1, float32 arg2,
48 float32 arg3, float32 result,
49 uint32_t muladd_negate_c)
50{
51 uint32_t aSign, bSign, cSign;
52 uint32_t aExp, bExp, cExp;
53
54 if (float32_is_any_nan(arg1) || float32_is_any_nan(arg2) ||
55 float32_is_any_nan(arg3)) {
56 return QUIET_NAN;
57 } else if (float32_is_infinity(arg1) && float32_is_zero(arg2)) {
58 return MUL_NAN;
59 } else if (float32_is_zero(arg1) && float32_is_infinity(arg2)) {
60 return MUL_NAN;
61 } else {
62 aSign = arg1 >> 31;
63 bSign = arg2 >> 31;
64 cSign = arg3 >> 31;
65
66 aExp = (arg1 >> 23) & 0xff;
67 bExp = (arg2 >> 23) & 0xff;
68 cExp = (arg3 >> 23) & 0xff;
69
70 if (muladd_negate_c) {
71 cSign ^= 1;
72 }
73 if (((aExp == 0xff) || (bExp == 0xff)) && (cExp == 0xff)) {
74 if (aSign ^ bSign ^ cSign) {
75 return ADD_NAN;
76 }
77 }
78 }
79
80 return result;
81}
82
baf410dc 83static void f_update_psw_flags(CPUTriCoreState *env, uint8_t flags)
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84{
85 uint8_t some_excp = 0;
86 set_float_exception_flags(0, &env->fp_status);
87
88 if (flags & float_flag_invalid) {
89 env->FPU_FI = 1 << 31;
90 some_excp = 1;
91 }
92
93 if (flags & float_flag_overflow) {
94 env->FPU_FV = 1 << 31;
95 some_excp = 1;
96 }
97
98 if (flags & float_flag_underflow || flags & float_flag_output_denormal) {
99 env->FPU_FU = 1 << 31;
100 some_excp = 1;
101 }
102
103 if (flags & float_flag_divbyzero) {
104 env->FPU_FZ = 1 << 31;
105 some_excp = 1;
106 }
107
108 if (flags & float_flag_inexact || flags & float_flag_output_denormal) {
109 env->PSW |= 1 << 26;
110 some_excp = 1;
111 }
112
113 env->FPU_FS = some_excp;
114}
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115
116#define FADD_SUB(op) \
117uint32_t helper_f##op(CPUTriCoreState *env, uint32_t r1, uint32_t r2) \
118{ \
119 float32 arg1 = make_float32(r1); \
120 float32 arg2 = make_float32(r2); \
121 uint32_t flags; \
122 float32 f_result; \
123 \
124 f_result = float32_##op(arg2, arg1, &env->fp_status); \
125 flags = f_get_excp_flags(env); \
126 if (flags) { \
127 /* If the output is a NaN, but the inputs aren't, \
128 we return a unique value. */ \
129 if ((flags & float_flag_invalid) \
130 && !float32_is_any_nan(arg1) \
131 && !float32_is_any_nan(arg2)) { \
132 f_result = ADD_NAN; \
133 } \
134 f_update_psw_flags(env, flags); \
135 } else { \
136 env->FPU_FS = 0; \
137 } \
138 return (uint32_t)f_result; \
139}
140FADD_SUB(add)
141FADD_SUB(sub)
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142
143uint32_t helper_fmul(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
144{
145 uint32_t flags;
146 float32 arg1 = make_float32(r1);
147 float32 arg2 = make_float32(r2);
148 float32 f_result;
149
150 f_result = float32_mul(arg1, arg2, &env->fp_status);
151
152 flags = f_get_excp_flags(env);
153 if (flags) {
154 /* If the output is a NaN, but the inputs aren't,
155 we return a unique value. */
156 if ((flags & float_flag_invalid)
157 && !float32_is_any_nan(arg1)
158 && !float32_is_any_nan(arg2)) {
159 f_result = MUL_NAN;
160 }
161 f_update_psw_flags(env, flags);
162 } else {
163 env->FPU_FS = 0;
164 }
165 return (uint32_t)f_result;
166
167}
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168
169uint32_t helper_fdiv(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
170{
171 uint32_t flags;
172 float32 arg1 = make_float32(r1);
173 float32 arg2 = make_float32(r2);
174 float32 f_result;
175
176 f_result = float32_div(arg1, arg2 , &env->fp_status);
177
178 flags = f_get_excp_flags(env);
179 if (flags) {
180 /* If the output is a NaN, but the inputs aren't,
181 we return a unique value. */
182 if ((flags & float_flag_invalid)
183 && !float32_is_any_nan(arg1)
184 && !float32_is_any_nan(arg2)) {
185 f_result = DIV_NAN;
186 }
187 f_update_psw_flags(env, flags);
188 } else {
189 env->FPU_FS = 0;
190 }
191
192 return (uint32_t)f_result;
193}
743cd09d 194
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195uint32_t helper_fmadd(CPUTriCoreState *env, uint32_t r1,
196 uint32_t r2, uint32_t r3)
197{
198 uint32_t flags;
199 float32 arg1 = make_float32(r1);
200 float32 arg2 = make_float32(r2);
201 float32 arg3 = make_float32(r3);
202 float32 f_result;
203
204 f_result = float32_muladd(arg1, arg2, arg3, 0, &env->fp_status);
205
206 flags = f_get_excp_flags(env);
207 if (flags) {
208 if (flags & float_flag_invalid) {
209 arg1 = float32_squash_input_denormal(arg1, &env->fp_status);
210 arg2 = float32_squash_input_denormal(arg2, &env->fp_status);
211 arg3 = float32_squash_input_denormal(arg3, &env->fp_status);
212 f_result = f_maddsub_nan_result(arg1, arg2, arg3, f_result, 0);
213 }
214 f_update_psw_flags(env, flags);
215 } else {
216 env->FPU_FS = 0;
217 }
218 return (uint32_t)f_result;
219}
220
221uint32_t helper_fmsub(CPUTriCoreState *env, uint32_t r1,
222 uint32_t r2, uint32_t r3)
223{
224 uint32_t flags;
225 float32 arg1 = make_float32(r1);
226 float32 arg2 = make_float32(r2);
227 float32 arg3 = make_float32(r3);
228 float32 f_result;
229
230 f_result = float32_muladd(arg1, arg2, arg3, float_muladd_negate_product,
231 &env->fp_status);
232
233 flags = f_get_excp_flags(env);
234 if (flags) {
235 if (flags & float_flag_invalid) {
236 arg1 = float32_squash_input_denormal(arg1, &env->fp_status);
237 arg2 = float32_squash_input_denormal(arg2, &env->fp_status);
238 arg3 = float32_squash_input_denormal(arg3, &env->fp_status);
239
240 f_result = f_maddsub_nan_result(arg1, arg2, arg3, f_result, 1);
241 }
242 f_update_psw_flags(env, flags);
243 } else {
244 env->FPU_FS = 0;
245 }
246 return (uint32_t)f_result;
247}
248
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249uint32_t helper_fcmp(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
250{
251 uint32_t result, flags;
252 float32 arg1 = make_float32(r1);
253 float32 arg2 = make_float32(r2);
254
255 set_flush_inputs_to_zero(0, &env->fp_status);
256
257 result = 1 << (float32_compare_quiet(arg1, arg2, &env->fp_status) + 1);
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258 result |= float32_is_denormal(arg1) << 4;
259 result |= float32_is_denormal(arg2) << 5;
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260
261 flags = f_get_excp_flags(env);
262 if (flags) {
263 f_update_psw_flags(env, flags);
264 } else {
265 env->FPU_FS = 0;
266 }
267
268 set_flush_inputs_to_zero(1, &env->fp_status);
269 return result;
270}
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271
272uint32_t helper_ftoi(CPUTriCoreState *env, uint32_t arg)
273{
274 float32 f_arg = make_float32(arg);
275 int32_t result, flags;
276
277 result = float32_to_int32(f_arg, &env->fp_status);
278
279 flags = f_get_excp_flags(env);
280 if (flags) {
281 if (float32_is_any_nan(f_arg)) {
282 result = 0;
283 }
284 f_update_psw_flags(env, flags);
285 } else {
286 env->FPU_FS = 0;
287 }
288 return (uint32_t)result;
289}
290
291uint32_t helper_itof(CPUTriCoreState *env, uint32_t arg)
292{
293 float32 f_result;
294 uint32_t flags;
295 f_result = int32_to_float32(arg, &env->fp_status);
296
297 flags = f_get_excp_flags(env);
298 if (flags) {
299 f_update_psw_flags(env, flags);
300 } else {
301 env->FPU_FS = 0;
302 }
303 return (uint32_t)f_result;
304}
8f75983d 305
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306uint32_t helper_utof(CPUTriCoreState *env, uint32_t arg)
307{
308 float32 f_result;
309 uint32_t flags;
310
311 f_result = uint32_to_float32(arg, &env->fp_status);
312
313 flags = f_get_excp_flags(env);
314 if (flags) {
315 f_update_psw_flags(env, flags);
316 } else {
317 env->FPU_FS = 0;
318 }
319 return (uint32_t)f_result;
320}
321
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322uint32_t helper_ftoiz(CPUTriCoreState *env, uint32_t arg)
323{
324 float32 f_arg = make_float32(arg);
325 uint32_t result;
326 int32_t flags;
327
328 result = float32_to_int32_round_to_zero(f_arg, &env->fp_status);
329
330 flags = f_get_excp_flags(env);
331 if (flags & float_flag_invalid) {
332 flags &= ~float_flag_inexact;
333 if (float32_is_any_nan(f_arg)) {
334 result = 0;
335 }
336 }
337
338 if (flags) {
339 f_update_psw_flags(env, flags);
340 } else {
341 env->FPU_FS = 0;
342 }
343
344 return result;
345}
346
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347uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg)
348{
349 float32 f_arg = make_float32(arg);
350 uint32_t result;
351 int32_t flags;
352
353 result = float32_to_uint32_round_to_zero(f_arg, &env->fp_status);
354
355 flags = f_get_excp_flags(env);
356 if (flags & float_flag_invalid) {
357 flags &= ~float_flag_inexact;
358 if (float32_is_any_nan(f_arg)) {
359 result = 0;
360 }
361 } else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) {
362 flags = float_flag_invalid;
363 result = 0;
364 }
365
366 if (flags) {
367 f_update_psw_flags(env, flags);
368 } else {
369 env->FPU_FS = 0;
370 }
371 return result;
372}
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373
374void helper_updfl(CPUTriCoreState *env, uint32_t arg)
375{
376 env->FPU_FS = extract32(arg, 7, 1) & extract32(arg, 15, 1);
377 env->FPU_FI = (extract32(arg, 6, 1) & extract32(arg, 14, 1)) << 31;
378 env->FPU_FV = (extract32(arg, 5, 1) & extract32(arg, 13, 1)) << 31;
379 env->FPU_FZ = (extract32(arg, 4, 1) & extract32(arg, 12, 1)) << 31;
380 env->FPU_FU = (extract32(arg, 3, 1) & extract32(arg, 11, 1)) << 31;
381 /* clear FX and RM */
382 env->PSW &= ~(extract32(arg, 10, 1) << 26);
383 env->PSW |= (extract32(arg, 2, 1) & extract32(arg, 10, 1)) << 26;
384
385 fpu_set_state(env);
386}
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