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Commit | Line | Data |
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9453c5bc GH |
1 | #define NE2000_PMEM_SIZE (32*1024) |
2 | #define NE2000_PMEM_START (16*1024) | |
3 | #define NE2000_PMEM_END (NE2000_PMEM_SIZE+NE2000_PMEM_START) | |
4 | #define NE2000_MEM_SIZE NE2000_PMEM_END | |
5 | ||
6 | typedef struct NE2000State { | |
7 | uint8_t cmd; | |
8 | uint32_t start; | |
9 | uint32_t stop; | |
10 | uint8_t boundary; | |
11 | uint8_t tsr; | |
12 | uint8_t tpsr; | |
13 | uint16_t tcnt; | |
14 | uint16_t rcnt; | |
15 | uint32_t rsar; | |
16 | uint8_t rsr; | |
17 | uint8_t rxcr; | |
18 | uint8_t isr; | |
19 | uint8_t dcfg; | |
20 | uint8_t imr; | |
21 | uint8_t phys[6]; /* mac address */ | |
22 | uint8_t curpag; | |
23 | uint8_t mult[8]; /* multicast mask array */ | |
24 | qemu_irq irq; | |
1c2045b5 | 25 | NICState *nic; |
93db6685 | 26 | NICConf c; |
9453c5bc GH |
27 | uint8_t mem[NE2000_MEM_SIZE]; |
28 | } NE2000State; | |
29 | ||
30 | void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val); | |
31 | uint32_t ne2000_ioport_read(void *opaque, uint32_t addr); | |
32 | void ne2000_asic_ioport_write(void *opaque, uint32_t addr, uint32_t val); | |
33 | uint32_t ne2000_asic_ioport_read(void *opaque, uint32_t addr); | |
34 | void ne2000_reset_ioport_write(void *opaque, uint32_t addr, uint32_t val); | |
35 | uint32_t ne2000_reset_ioport_read(void *opaque, uint32_t addr); | |
7c131dd5 | 36 | extern const VMStateDescription vmstate_ne2000; |
9453c5bc GH |
37 | void ne2000_reset(NE2000State *s); |
38 | int ne2000_can_receive(VLANClientState *vc); | |
39 | ssize_t ne2000_receive(VLANClientState *vc, const uint8_t *buf, size_t size_); |