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1 | /* |
2 | NetWinder Floating Point Emulator | |
3 | (c) Rebel.COM, 1998,1999 | |
4 | ||
5 | Direct questions, comments to Scott Bambrough <[email protected]> | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #ifndef __FPOPCODE_H__ | |
23 | #define __FPOPCODE_H__ | |
24 | ||
25 | /* | |
26 | ARM Floating Point Instruction Classes | |
5fafdf24 | 27 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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28 | |c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT |
29 | |c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|0|1| o f f s e t | CPDT | |
5fafdf24 | 30 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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31 | |c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO |
32 | |c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT | |
33 | |c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons | |
5fafdf24 | 34 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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35 | |
36 | CPDT data transfer instructions | |
37 | LDF, STF, LFM, SFM | |
5fafdf24 | 38 | |
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39 | CPDO dyadic arithmetic instructions |
40 | ADF, MUF, SUF, RSF, DVF, RDF, | |
41 | POW, RPW, RMF, FML, FDV, FRD, POL | |
42 | ||
43 | CPDO monadic arithmetic instructions | |
44 | MVF, MNF, ABS, RND, SQT, LOG, LGN, EXP, | |
45 | SIN, COS, TAN, ASN, ACS, ATN, URD, NRM | |
5fafdf24 | 46 | |
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47 | CPRT joint arithmetic/data transfer instructions |
48 | FIX (arithmetic followed by load/store) | |
49 | FLT (load/store followed by arithmetic) | |
50 | CMF, CNF CMFE, CNFE (comparisons) | |
51 | WFS, RFS (write/read floating point status register) | |
52 | WFC, RFC (write/read floating point control register) | |
53 | ||
54 | cond condition codes | |
55 | P pre/post index bit: 0 = postindex, 1 = preindex | |
56 | U up/down bit: 0 = stack grows down, 1 = stack grows up | |
57 | W write back bit: 1 = update base register (Rn) | |
58 | L load/store bit: 0 = store, 1 = load | |
59 | Rn base register | |
5fafdf24 | 60 | Rd destination/source register |
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61 | Fd floating point destination register |
62 | Fn floating point source register | |
63 | Fm floating point source register or floating point constant | |
64 | ||
65 | uv transfer length (TABLE 1) | |
66 | wx register count (TABLE 2) | |
67 | abcd arithmetic opcode (TABLES 3 & 4) | |
68 | ef destination size (rounding precision) (TABLE 5) | |
69 | gh rounding mode (TABLE 6) | |
70 | j dyadic/monadic bit: 0 = dyadic, 1 = monadic | |
71 | i constant bit: 1 = constant (TABLE 6) | |
72 | */ | |
73 | ||
74 | /* | |
75 | TABLE 1 | |
76 | +-------------------------+---+---+---------+---------+ | |
77 | | Precision | u | v | FPSR.EP | length | | |
78 | +-------------------------+---+---+---------+---------+ | |
79 |