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77fc6f5e LV |
1 | /* |
2 | * Generic intermediate code generation. | |
3 | * | |
4 | * Copyright (C) 2016-2017 Lluís Vilanova <[email protected]> | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
7 | * See the COPYING file in the top-level directory. | |
8 | */ | |
9 | ||
10 | #ifndef EXEC__TRANSLATOR_H | |
11 | #define EXEC__TRANSLATOR_H | |
12 | ||
bb2e0039 LV |
13 | /* |
14 | * Include this header from a target-specific file, and add a | |
15 | * | |
16 | * DisasContextBase base; | |
17 | * | |
18 | * member in your target-specific DisasContext. | |
19 | */ | |
20 | ||
21 | ||
409c1a0b | 22 | #include "qemu/bswap.h" |
bb2e0039 | 23 | #include "exec/exec-all.h" |
409c1a0b EC |
24 | #include "exec/cpu_ldst.h" |
25 | #include "exec/plugin-gen.h" | |
bb2e0039 LV |
26 | #include "tcg/tcg.h" |
27 | ||
28 | ||
77fc6f5e LV |
29 | /** |
30 | * DisasJumpType: | |
31 | * @DISAS_NEXT: Next instruction in program order. | |
32 | * @DISAS_TOO_MANY: Too many instructions translated. | |
33 | * @DISAS_NORETURN: Following code is dead. | |
34 | * @DISAS_TARGET_*: Start of target-specific conditions. | |
35 | * | |
36 | * What instruction to disassemble next. | |
37 | */ | |
38 | typedef enum DisasJumpType { | |
39 | DISAS_NEXT, | |
40 | DISAS_TOO_MANY, | |
41 | DISAS_NORETURN, | |
42 | DISAS_TARGET_0, | |
43 | DISAS_TARGET_1, | |
44 | DISAS_TARGET_2, | |
45 | DISAS_TARGET_3, | |
46 | DISAS_TARGET_4, | |
47 | DISAS_TARGET_5, | |
48 | DISAS_TARGET_6, | |
49 | DISAS_TARGET_7, | |
50 | DISAS_TARGET_8, | |
51 | DISAS_TARGET_9, | |
52 | DISAS_TARGET_10, | |
53 | DISAS_TARGET_11, | |
54 | } DisasJumpType; | |
55 | ||
bb2e0039 LV |
56 | /** |
57 | * DisasContextBase: | |
58 | * @tb: Translation block for this disassembly. | |
59 | * @pc_first: Address of first guest instruction in this TB. | |
60 | * @pc_next: Address of next guest instruction in this TB (current during | |
61 | * disassembly). | |
62 | * @is_jmp: What instruction to disassemble next. | |
63 | * @num_insns: Number of translated instructions (including current). | |
b542683d | 64 | * @max_insns: Maximum number of instructions to be translated in this TB. |
bb2e0039 LV |
65 | * @singlestep_enabled: "Hardware" single stepping enabled. |
66 | * | |
67 | * Architecture-agnostic disassembly context. | |
68 | */ | |
69 | typedef struct DisasContextBase { | |
70 | TranslationBlock *tb; | |
71 | target_ulong pc_first; | |
72 | target_ulong pc_next; | |
73 | DisasJumpType is_jmp; | |
b542683d EC |
74 | int num_insns; |
75 | int max_insns; | |
bb2e0039 LV |
76 | bool singlestep_enabled; |
77 | } DisasContextBase; | |
78 | ||
79 | /** | |
80 | * TranslatorOps: | |
81 | * @init_disas_context: | |
82 | * Initialize the target-specific portions of DisasContext struct. | |
83 | * The generic DisasContextBase has already been initialized. | |
bb2e0039 LV |
84 | * |
85 | * @tb_start: | |
86 | * Emit any code required before the start of the main loop, | |
87 | * after the generic gen_tb_start(). | |
88 | * | |
89 | * @insn_start: | |
90 | * Emit the tcg_gen_insn_start opcode. | |
91 | * | |
92 | * @breakpoint_check: | |
93 | * When called, the breakpoint has already been checked to match the PC, | |
94 | * but the target may decide the breakpoint missed the address | |
95 | * (e.g., due to conditions encoded in their flags). Return true to | |
96 | * indicate that the breakpoint did hit, in which case no more breakpoints | |
97 | * are checked. If the breakpoint did hit, emit any code required to | |
98 | * signal the exception, and set db->is_jmp as necessary to terminate | |
99 | * the main loop. | |
100 | * | |
101 | * @translate_insn: | |
102 | * Disassemble one instruction and set db->pc_next for the start | |
103 | * of the following instruction. Set db->is_jmp as necessary to | |
104 | * terminate the main loop. | |
105 | * | |
106 | * @tb_stop: | |
107 | * Emit any opcodes required to exit the TB, based on db->is_jmp. | |
108 | * | |
109 | * @disas_log: | |
110 | * Print instruction disassembly to log. | |
111 | */ | |
112 | typedef struct TranslatorOps { | |
b542683d | 113 | void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); |
bb2e0039 LV |
114 | void (*tb_start)(DisasContextBase *db, CPUState *cpu); |
115 | void (*insn_start)(DisasContextBase *db, CPUState *cpu); | |
116 | bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu, | |
117 | const CPUBreakpoint *bp); | |
118 | void (*translate_insn)(DisasContextBase *db, CPUState *cpu); | |
119 | void (*tb_stop)(DisasContextBase *db, CPUState *cpu); | |
120 | void (*disas_log)(const DisasContextBase *db, CPUState *cpu); | |
121 | } TranslatorOps; | |
122 | ||
123 | /** | |
124 | * translator_loop: | |
125 | * @ops: Target-specific operations. | |
126 | * @db: Disassembly context. | |
127 | * @cpu: Target vCPU. | |
128 | * @tb: Translation block. | |
8b86d6d2 | 129 | * @max_insns: Maximum number of insns to translate. |
bb2e0039 LV |
130 | * |
131 | * Generic translator loop. | |
132 | * | |
133 | * Translation will stop in the following cases (in order): | |
134 | * - When is_jmp set by #TranslatorOps::breakpoint_check. | |
135 | * - set to DISAS_TOO_MANY exits after translating one more insn | |
136 | * - set to any other value than DISAS_NEXT exits immediately. | |
137 | * - When is_jmp set by #TranslatorOps::translate_insn. | |
138 | * - set to any value other than DISAS_NEXT exits immediately. | |
139 | * - When the TCG operation buffer is full. | |
140 | * - When single-stepping is enabled (system-wide or on the current vCPU). | |
141 | * - When too many instructions have been translated. | |
142 | */ | |
143 | void translator_loop(const TranslatorOps *ops, DisasContextBase *db, | |
8b86d6d2 | 144 | CPUState *cpu, TranslationBlock *tb, int max_insns); |
bb2e0039 LV |
145 | |
146 | void translator_loop_temp_check(DisasContextBase *db); | |
147 | ||
409c1a0b EC |
148 | /* |
149 | * Translator Load Functions | |
150 | * | |
a6d456df RH |
151 | * These are intended to replace the direct usage of the cpu_ld*_code |
152 | * functions and are mandatory for front-ends that have been migrated | |
153 | * to the common translator_loop. These functions are only intended | |
154 | * to be called from the translation stage and should not be called | |
155 | * from helper functions. Those functions should be converted to encode | |
156 | * the relevant information at translation time. | |
409c1a0b EC |
157 | */ |
158 | ||
a6d456df | 159 | #define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \ |
409c1a0b EC |
160 | static inline type \ |
161 | fullname ## _swap(CPUArchState *env, abi_ptr pc, bool do_swap) \ | |
162 | { \ | |
a6d456df | 163 | type ret = load_fn(env, pc); \ |
409c1a0b EC |
164 | if (do_swap) { \ |
165 | ret = swap_fn(ret); \ | |
166 | } \ | |
167 | plugin_insn_append(&ret, sizeof(ret)); \ | |
168 | return ret; \ | |
169 | } \ | |
170 | \ | |
171 | static inline type fullname(CPUArchState *env, abi_ptr pc) \ | |
172 | { \ | |
173 | return fullname ## _swap(env, pc, false); \ | |
174 | } | |
175 | ||
a6d456df RH |
176 | GEN_TRANSLATOR_LD(translator_ldub, uint8_t, cpu_ldub_code, /* no swap */) |
177 | GEN_TRANSLATOR_LD(translator_ldsw, int16_t, cpu_ldsw_code, bswap16) | |
178 | GEN_TRANSLATOR_LD(translator_lduw, uint16_t, cpu_lduw_code, bswap16) | |
179 | GEN_TRANSLATOR_LD(translator_ldl, uint32_t, cpu_ldl_code, bswap32) | |
180 | GEN_TRANSLATOR_LD(translator_ldq, uint64_t, cpu_ldq_code, bswap64) | |
409c1a0b EC |
181 | #undef GEN_TRANSLATOR_LD |
182 | ||
183 | #endif /* EXEC__TRANSLATOR_H */ |