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target/ppc: Add ppc_store_lpcr() helper
[qemu.git] / target / ppc / internal.h
CommitLineData
3e00884f
GS		 1/*
2 * PowerPC interal definitions for qemu.
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
8 *
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
13 *
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef PPC_INTERNAL_H
19#define PPC_INTERNAL_H
20
21#define FUNC_MASK(name, ret_type, size, max_val) \
22static inline ret_type name(uint##size##_t start, \
23 uint##size##_t end) \
24{ \
25 ret_type ret, max_bit = size - 1; \
26 \
27 if (likely(start == 0)) { \
28 ret = max_val << (max_bit - end); \
29 } else if (likely(end == max_bit)) { \
30 ret = max_val >> start; \
31 } else { \
32 ret = (((uint##size##_t)(-1ULL)) >> (start)) ^ \
33 (((uint##size##_t)(-1ULL) >> (end)) >> 1); \
34 if (unlikely(start > end)) { \
35 return ~ret; \
36 } \
37 } \
38 \
39 return ret; \
40}
41
42#if defined(TARGET_PPC64)
43FUNC_MASK(MASK, target_ulong, 64, UINT64_MAX);
44#else
45FUNC_MASK(MASK, target_ulong, 32, UINT32_MAX);
46#endif
47FUNC_MASK(mask_u32, uint32_t, 32, UINT32_MAX);
48FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX);
49
985e3023
BR		 50/*****************************************************************************/
51/*** Instruction decoding ***/
52#define EXTRACT_HELPER(name, shift, nb) \
53static inline uint32_t name(uint32_t opcode) \
54{ \
55 return (opcode >> (shift)) & ((1 << (nb)) - 1); \
56}
57
58#define EXTRACT_SHELPER(name, shift, nb) \
59static inline int32_t name(uint32_t opcode) \
60{ \
61 return (int16_t)((opcode >> (shift)) & ((1 << (nb)) - 1)); \
62}
63
64#define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2) \
65static inline uint32_t name(uint32_t opcode) \
66{ \
67 return (((opcode >> (shift1)) & ((1 << (nb1)) - 1)) << nb2) | \
68 ((opcode >> (shift2)) & ((1 << (nb2)) - 1)); \
69}
70
403a884a 71#define EXTRACT_HELPER_SPLIT_3(name, \
985e3023
BR		 72 d0_bits, shift_op_d0, shift_d0, \
73 d1_bits, shift_op_d1, shift_d1, \
74 d2_bits, shift_op_d2, shift_d2) \
75static inline int16_t name(uint32_t opcode) \
76{ \
77 return \
78 (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \
79 (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \
80 (((opcode >> (shift_op_d2)) & ((1 << (d2_bits)) - 1)) << (shift_d2)); \
81}
82
83
84/* Opcode part 1 */
85EXTRACT_HELPER(opc1, 26, 6);
86/* Opcode part 2 */
87EXTRACT_HELPER(opc2, 1, 5);
88/* Opcode part 3 */
89EXTRACT_HELPER(opc3, 6, 5);
90/* Opcode part 4 */
91EXTRACT_HELPER(opc4, 16, 5);
92/* Update Cr0 flags */
93EXTRACT_HELPER(Rc, 0, 1);
94/* Update Cr6 flags (Altivec) */
95EXTRACT_HELPER(Rc21, 10, 1);
96/* Destination */
97EXTRACT_HELPER(rD, 21, 5);
98/* Source */
99EXTRACT_HELPER(rS, 21, 5);
100/* First operand */
101EXTRACT_HELPER(rA, 16, 5);
102/* Second operand */
103EXTRACT_HELPER(rB, 11, 5);
104/* Third operand */
105EXTRACT_HELPER(rC, 6, 5);
106/*** Get CRn ***/
107EXTRACT_HELPER(crfD, 23, 3);
108EXTRACT_HELPER(BF, 23, 3);
109EXTRACT_HELPER(crfS, 18, 3);
110EXTRACT_HELPER(crbD, 21, 5);
111EXTRACT_HELPER(crbA, 16, 5);
112EXTRACT_HELPER(crbB, 11, 5);
113/* SPR / TBL */
114EXTRACT_HELPER(_SPR, 11, 10);
115static inline uint32_t SPR(uint32_t opcode)
116{
117 uint32_t sprn = _SPR(opcode);
118
119 return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5);
120}
121/*** Get constants ***/
122/* 16 bits signed immediate value */
123EXTRACT_SHELPER(SIMM, 0, 16);
124/* 16 bits unsigned immediate value */
125EXTRACT_HELPER(UIMM, 0, 16);
126/* 5 bits signed immediate value */
127EXTRACT_HELPER(SIMM5, 16, 5);
128/* 5 bits signed immediate value */
129EXTRACT_HELPER(UIMM5, 16, 5);
130/* 4 bits unsigned immediate value */
131EXTRACT_HELPER(UIMM4, 16, 4);
132/* Bit count */
133EXTRACT_HELPER(NB, 11, 5);
134/* Shift count */
135EXTRACT_HELPER(SH, 11, 5);
a68a6146
B		 136/* lwat/stwat/ldat/lwat */
137EXTRACT_HELPER(FC, 11, 5);
985e3023
BR		 138/* Vector shift count */
139EXTRACT_HELPER(VSH, 6, 4);
140/* Mask start */
141EXTRACT_HELPER(MB, 6, 5);
142/* Mask end */
143EXTRACT_HELPER(ME, 1, 5);
144/* Trap operand */
145EXTRACT_HELPER(TO, 21, 5);
146
147EXTRACT_HELPER(CRM, 12, 8);
148
149#ifndef CONFIG_USER_ONLY
150EXTRACT_HELPER(SR, 16, 4);
151#endif
152
153/* mtfsf/mtfsfi */
154EXTRACT_HELPER(FPBF, 23, 3);
155EXTRACT_HELPER(FPIMM, 12, 4);
156EXTRACT_HELPER(FPL, 25, 1);
157EXTRACT_HELPER(FPFLM, 17, 8);
158EXTRACT_HELPER(FPW, 16, 1);
159
160/* addpcis */
403a884a 161EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0)
985e3023
BR		 162#if defined(TARGET_PPC64)
163/* darn */
164EXTRACT_HELPER(L, 16, 2);
165#endif
166
167/*** Jump target decoding ***/
168/* Immediate address */
169static inline target_ulong LI(uint32_t opcode)
170{
171 return (opcode >> 0) & 0x03FFFFFC;
172}
173
174static inline uint32_t BD(uint32_t opcode)
175{
176 return (opcode >> 0) & 0xFFFC;
177}
178
179EXTRACT_HELPER(BO, 21, 5);
180EXTRACT_HELPER(BI, 16, 5);
181/* Absolute/relative address */
182EXTRACT_HELPER(AA, 1, 1);
183/* Link */
184EXTRACT_HELPER(LK, 0, 1);
185
186/* DFP Z22-form */
187EXTRACT_HELPER(DCM, 10, 6)
188
189/* DFP Z23-form */
190EXTRACT_HELPER(RMC, 9, 2)
be07ad58 191EXTRACT_HELPER(Rrm, 16, 1)
985e3023 192
d59ba583 193EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5);
985e3023
BR		 194EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5);
195EXTRACT_HELPER_SPLIT(xS, 0, 1, 21, 5);
196EXTRACT_HELPER_SPLIT(xA, 2, 1, 16, 5);
197EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5);
198EXTRACT_HELPER_SPLIT(xC, 3, 1, 6, 5);
199EXTRACT_HELPER(DM, 8, 2);
200EXTRACT_HELPER(UIM, 16, 2);
201EXTRACT_HELPER(SHW, 8, 2);
202EXTRACT_HELPER(SP, 19, 2);
203EXTRACT_HELPER(IMM8, 11, 8);
78241762 204EXTRACT_HELPER(DCMX, 16, 7);
403a884a 205EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
985e3023 206
f9f2ed5a
ND		 207typedef union _ppc_vsr_t {
208 uint8_t u8[16];
209 uint16_t u16[8];
210 uint32_t u32[4];
211 uint64_t u64[2];
212 float32 f32[4];
213 float64 f64[2];
07bdd247 214 float128 f128;
f9f2ed5a
ND		 215 Int128 s128;
216} ppc_vsr_t;
217
218#if defined(HOST_WORDS_BIGENDIAN)
219#define VsrB(i) u8[i]
f566c047 220#define VsrH(i) u16[i]
f9f2ed5a
ND		 221#define VsrW(i) u32[i]
222#define VsrD(i) u64[i]
223#else
224#define VsrB(i) u8[15 - (i)]
f566c047 225#define VsrH(i) u16[7 - (i)]
f9f2ed5a
ND		 226#define VsrW(i) u32[3 - (i)]
227#define VsrD(i) u64[1 - (i)]
228#endif
229
230static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
231{
232 if (n < 32) {
233 vsr->VsrD(0) = env->fpr[n];
234 vsr->VsrD(1) = env->vsr[n];
235 } else {
236 vsr->u64[0] = env->avr[n - 32].u64[0];
237 vsr->u64[1] = env->avr[n - 32].u64[1];
238 }
239}
240
241static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
242{
243 if (n < 32) {
244 env->fpr[n] = vsr->VsrD(0);
245 env->vsr[n] = vsr->VsrD(1);
246 } else {
247 env->avr[n - 32].u64[0] = vsr->u64[0];
248 env->avr[n - 32].u64[1] = vsr->u64[1];
249 }
250}
251
f566c047 252void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
9aeae8e1 253void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
07bdd247 254void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
3e00884f 255#endif /* PPC_INTERNAL_H */
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