]> Git Repo - qemu.git/blame - numa.c
numa: introduce machine callback for VCPU to node mapping
[qemu.git] / numa.c
CommitLineData
96d0e26c
WG
1/*
2 * NUMA parameter parsing routines
3 *
4 * Copyright (c) 2014 Fujitsu Ltd.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
e35704ba 25#include "sysemu/numa.h"
96d0e26c
WG
26#include "exec/cpu-common.h"
27#include "qemu/bitmap.h"
28#include "qom/cpu.h"
2b631ec2
WG
29#include "qemu/error-report.h"
30#include "include/exec/cpu-common.h" /* for RAM_ADDR_FMT */
0042109a
WG
31#include "qapi-visit.h"
32#include "qapi/opts-visitor.h"
33#include "qapi/dealloc-visitor.h"
34#include "qapi/qmp/qerror.h"
dfabb8b9 35#include "hw/boards.h"
7febe36f 36#include "sysemu/hostmem.h"
76b5d850 37#include "qmp-commands.h"
5b009e40 38#include "hw/mem/pc-dimm.h"
7dcd1d70
EH
39#include "qemu/option.h"
40#include "qemu/config-file.h"
0042109a
WG
41
42QemuOptsList qemu_numa_opts = {
43 .name = "numa",
44 .implied_opt_name = "type",
45 .head = QTAILQ_HEAD_INITIALIZER(qemu_numa_opts.head),
46 .desc = { { 0 } } /* validated with OptsVisitor */
47};
48
7febe36f 49static int have_memdevs = -1;
25712ffe
EH
50static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one.
51 * For all nodes, nodeid < max_numa_nodeid
52 */
de1a7c84 53int nb_numa_nodes;
de1a7c84 54NodeInfo numa_info[MAX_NODES];
7febe36f 55
0042109a 56static void numa_node_parse(NumaNodeOptions *node, QemuOpts *opts, Error **errp)
96d0e26c 57{
0042109a
WG
58 uint16_t nodenr;
59 uint16List *cpus = NULL;
96d0e26c 60
0042109a
WG
61 if (node->has_nodeid) {
62 nodenr = node->nodeid;
96d0e26c 63 } else {
0042109a 64 nodenr = nb_numa_nodes;
96d0e26c
WG
65 }
66
0042109a
WG
67 if (nodenr >= MAX_NODES) {
68 error_setg(errp, "Max number of NUMA nodes reached: %"
01bbbcf4 69 PRIu16 "", nodenr);
0042109a 70 return;
96d0e26c
WG
71 }
72
1945b9d8
EH
73 if (numa_info[nodenr].present) {
74 error_setg(errp, "Duplicate NUMA nodeid: %" PRIu16, nodenr);
75 return;
76 }
77
0042109a 78 for (cpus = node->cpus; cpus; cpus = cpus->next) {
8979c945
EH
79 if (cpus->value >= max_cpus) {
80 error_setg(errp,
81 "CPU index (%" PRIu16 ")"
82 " should be smaller than maxcpus (%d)",
83 cpus->value, max_cpus);
0042109a
WG
84 return;
85 }
86 bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1);
96d0e26c
WG
87 }
88
7febe36f 89 if (node->has_mem && node->has_memdev) {
01bbbcf4 90 error_setg(errp, "qemu: cannot specify both mem= and memdev=");
7febe36f
PB
91 return;
92 }
93
94 if (have_memdevs == -1) {
95 have_memdevs = node->has_memdev;
96 }
97 if (node->has_memdev != have_memdevs) {
98 error_setg(errp, "qemu: memdev option must be specified for either "
01bbbcf4 99 "all or no nodes");
7febe36f
PB
100 return;
101 }
102
0042109a
WG
103 if (node->has_mem) {
104 uint64_t mem_size = node->mem;
105 const char *mem_str = qemu_opt_get(opts, "mem");
106 /* Fix up legacy suffix-less format */
107 if (g_ascii_isdigit(mem_str[strlen(mem_str) - 1])) {
108 mem_size <<= 20;
109 }
110 numa_info[nodenr].node_mem = mem_size;
111 }
7febe36f
PB
112 if (node->has_memdev) {
113 Object *o;
114 o = object_resolve_path_type(node->memdev, TYPE_MEMORY_BACKEND, NULL);
115 if (!o) {
116 error_setg(errp, "memdev=%s is ambiguous", node->memdev);
117 return;
118 }
119
120 object_ref(o);
121 numa_info[nodenr].node_mem = object_property_get_int(o, "size", NULL);
122 numa_info[nodenr].node_memdev = MEMORY_BACKEND(o);
123 }
1af878e0
EH
124 numa_info[nodenr].present = true;
125 max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
96d0e26c
WG
126}
127
1c1e6732 128static int parse_numa(QemuOpts *opts, void *opaque)
96d0e26c 129{
0042109a
WG
130 NumaOptions *object = NULL;
131 Error *err = NULL;
96d0e26c 132
0042109a
WG
133 {
134 OptsVisitor *ov = opts_visitor_new(opts);
135 visit_type_NumaOptions(opts_get_visitor(ov), &object, NULL, &err);
136 opts_visitor_cleanup(ov);
96d0e26c 137 }
96d0e26c 138
0042109a
WG
139 if (err) {
140 goto error;
141 }
96d0e26c 142
0042109a
WG
143 switch (object->kind) {
144 case NUMA_OPTIONS_KIND_NODE:
145 numa_node_parse(object->node, opts, &err);
146 if (err) {
147 goto error;
96d0e26c 148 }
0042109a
WG
149 nb_numa_nodes++;
150 break;
151 default:
152 abort();
153 }
96d0e26c 154
0042109a 155 return 0;
96d0e26c 156
0042109a 157error:
29b762f5 158 error_report_err(err);
0042109a
WG
159
160 if (object) {
161 QapiDeallocVisitor *dv = qapi_dealloc_visitor_new();
162 visit_type_NumaOptions(qapi_dealloc_get_visitor(dv),
163 &object, NULL, NULL);
164 qapi_dealloc_visitor_cleanup(dv);
96d0e26c 165 }
0042109a
WG
166
167 return -1;
96d0e26c
WG
168}
169
3ef71975
EH
170static char *enumerate_cpus(unsigned long *cpus, int max_cpus)
171{
172 int cpu;
173 bool first = true;
174 GString *s = g_string_new(NULL);
175
176 for (cpu = find_first_bit(cpus, max_cpus);
177 cpu < max_cpus;
178 cpu = find_next_bit(cpus, max_cpus, cpu + 1)) {
179 g_string_append_printf(s, "%s%d", first ? "" : " ", cpu);
180 first = false;
181 }
182 return g_string_free(s, FALSE);
183}
184
185static void validate_numa_cpus(void)
186{
187 int i;
188 DECLARE_BITMAP(seen_cpus, MAX_CPUMASK_BITS);
189
190 bitmap_zero(seen_cpus, MAX_CPUMASK_BITS);
191 for (i = 0; i < nb_numa_nodes; i++) {
192 if (bitmap_intersects(seen_cpus, numa_info[i].node_cpu,
193 MAX_CPUMASK_BITS)) {
194 bitmap_and(seen_cpus, seen_cpus,
195 numa_info[i].node_cpu, MAX_CPUMASK_BITS);
196 error_report("CPU(s) present in multiple NUMA nodes: %s",
197 enumerate_cpus(seen_cpus, max_cpus));;
198 exit(EXIT_FAILURE);
199 }
200 bitmap_or(seen_cpus, seen_cpus,
201 numa_info[i].node_cpu, MAX_CPUMASK_BITS);
202 }
203}
204
57924bcd 205void parse_numa_opts(MachineClass *mc)
96d0e26c 206{
12d6e464
EH
207 int i;
208
1c1e6732 209 if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa,
7dcd1d70
EH
210 NULL, 1) != 0) {
211 exit(1);
212 }
213
12d6e464
EH
214 assert(max_numa_nodeid <= MAX_NODES);
215
216 /* No support for sparse NUMA node IDs yet: */
217 for (i = max_numa_nodeid - 1; i >= 0; i--) {
218 /* Report large node IDs first, to make mistakes easier to spot */
219 if (!numa_info[i].present) {
220 error_report("numa: Node ID missing: %d", i);
221 exit(1);
222 }
223 }
224
225 /* This must be always true if all nodes are present: */
226 assert(nb_numa_nodes == max_numa_nodeid);
227
96d0e26c 228 if (nb_numa_nodes > 0) {
2b631ec2 229 uint64_t numa_total;
96d0e26c
WG
230
231 if (nb_numa_nodes > MAX_NODES) {
232 nb_numa_nodes = MAX_NODES;
233 }
234
9851d0fe 235 /* If no memory size is given for any node, assume the default case
96d0e26c
WG
236 * and distribute the available memory equally across all nodes
237 */
238 for (i = 0; i < nb_numa_nodes; i++) {
8c85901e 239 if (numa_info[i].node_mem != 0) {
96d0e26c
WG
240 break;
241 }
242 }
243 if (i == nb_numa_nodes) {
244 uint64_t usedmem = 0;
245
d75e2f68 246 /* On Linux, each node's border has to be 8MB aligned,
96d0e26c
WG
247 * the final node gets the rest.
248 */
249 for (i = 0; i < nb_numa_nodes - 1; i++) {
8c85901e
WG
250 numa_info[i].node_mem = (ram_size / nb_numa_nodes) &
251 ~((1 << 23UL) - 1);
252 usedmem += numa_info[i].node_mem;
96d0e26c 253 }
8c85901e 254 numa_info[i].node_mem = ram_size - usedmem;
96d0e26c
WG
255 }
256
2b631ec2
WG
257 numa_total = 0;
258 for (i = 0; i < nb_numa_nodes; i++) {
8c85901e 259 numa_total += numa_info[i].node_mem;
2b631ec2
WG
260 }
261 if (numa_total != ram_size) {
c68233ae
HT
262 error_report("total memory for NUMA nodes (0x%" PRIx64 ")"
263 " should equal RAM size (0x" RAM_ADDR_FMT ")",
2b631ec2
WG
264 numa_total, ram_size);
265 exit(1);
266 }
267
96d0e26c 268 for (i = 0; i < nb_numa_nodes; i++) {
8c85901e 269 if (!bitmap_empty(numa_info[i].node_cpu, MAX_CPUMASK_BITS)) {
96d0e26c
WG
270 break;
271 }
272 }
57924bcd
IM
273 /* Historically VCPUs were assigned in round-robin order to NUMA
274 * nodes. However it causes issues with guest not handling it nice
275 * in case where cores/threads from a multicore CPU appear on
276 * different nodes. So allow boards to override default distribution
277 * rule grouping VCPUs by socket so that VCPUs from the same socket
278 * would be on the same node.
96d0e26c
WG
279 */
280 if (i == nb_numa_nodes) {
281 for (i = 0; i < max_cpus; i++) {
57924bcd
IM
282 unsigned node_id = i % nb_numa_nodes;
283 if (mc->cpu_index_to_socket_id) {
284 node_id = mc->cpu_index_to_socket_id(i) % nb_numa_nodes;
285 }
286
287 set_bit(i, numa_info[node_id].node_cpu);
96d0e26c
WG
288 }
289 }
3ef71975
EH
290
291 validate_numa_cpus();
96d0e26c
WG
292 }
293}
294
dde11116 295void numa_post_machine_init(void)
96d0e26c
WG
296{
297 CPUState *cpu;
298 int i;
299
300 CPU_FOREACH(cpu) {
301 for (i = 0; i < nb_numa_nodes; i++) {
8c85901e 302 if (test_bit(cpu->cpu_index, numa_info[i].node_cpu)) {
96d0e26c
WG
303 cpu->numa_node = i;
304 }
305 }
306 }
307}
dfabb8b9 308
7febe36f
PB
309static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
310 const char *name,
311 uint64_t ram_size)
312{
0b183fc8
PB
313 if (mem_path) {
314#ifdef __linux__
7f56e740 315 Error *err = NULL;
dbcb8981 316 memory_region_init_ram_from_file(mr, owner, name, ram_size, false,
7f56e740
PB
317 mem_path, &err);
318
319 /* Legacy behavior: if allocation failed, fall back to
320 * regular RAM allocation.
321 */
c3ba3095 322 if (err) {
29b762f5 323 error_report_err(err);
49946538 324 memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
7f56e740 325 }
0b183fc8
PB
326#else
327 fprintf(stderr, "-mem-path not supported on this host\n");
328 exit(1);
329#endif
330 } else {
49946538 331 memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
0b183fc8 332 }
7febe36f
PB
333 vmstate_register_ram_global(mr);
334}
335
dfabb8b9
PB
336void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
337 const char *name,
338 uint64_t ram_size)
339{
7febe36f
PB
340 uint64_t addr = 0;
341 int i;
342
343 if (nb_numa_nodes == 0 || !have_memdevs) {
344 allocate_system_memory_nonnuma(mr, owner, name, ram_size);
345 return;
346 }
347
348 memory_region_init(mr, owner, name, ram_size);
349 for (i = 0; i < MAX_NODES; i++) {
350 Error *local_err = NULL;
351 uint64_t size = numa_info[i].node_mem;
352 HostMemoryBackend *backend = numa_info[i].node_memdev;
353 if (!backend) {
354 continue;
355 }
356 MemoryRegion *seg = host_memory_backend_get_memory(backend, &local_err);
357 if (local_err) {
29b762f5 358 error_report_err(local_err);
7febe36f
PB
359 exit(1);
360 }
361
0462faee
HT
362 if (memory_region_is_mapped(seg)) {
363 char *path = object_get_canonical_path_component(OBJECT(backend));
364 error_report("memory backend %s is used multiple times. Each "
365 "-numa option must use a different memdev value.",
366 path);
367 exit(1);
368 }
369
7febe36f
PB
370 memory_region_add_subregion(mr, addr, seg);
371 vmstate_register_ram_global(seg);
372 addr += size;
373 }
dfabb8b9 374}
76b5d850 375
5b009e40
HZ
376static void numa_stat_memory_devices(uint64_t node_mem[])
377{
378 MemoryDeviceInfoList *info_list = NULL;
379 MemoryDeviceInfoList **prev = &info_list;
380 MemoryDeviceInfoList *info;
381
382 qmp_pc_dimm_device_list(qdev_get_machine(), &prev);
383 for (info = info_list; info; info = info->next) {
384 MemoryDeviceInfo *value = info->value;
385
386 if (value) {
387 switch (value->kind) {
388 case MEMORY_DEVICE_INFO_KIND_DIMM:
389 node_mem[value->dimm->node] += value->dimm->size;
390 break;
391 default:
392 break;
393 }
394 }
395 }
396 qapi_free_MemoryDeviceInfoList(info_list);
397}
398
399void query_numa_node_mem(uint64_t node_mem[])
400{
401 int i;
402
403 if (nb_numa_nodes <= 0) {
404 return;
405 }
406
407 numa_stat_memory_devices(node_mem);
408 for (i = 0; i < nb_numa_nodes; i++) {
409 node_mem[i] += numa_info[i].node_mem;
410 }
411}
412
76b5d850
HT
413static int query_memdev(Object *obj, void *opaque)
414{
415 MemdevList **list = opaque;
b0e90181 416 MemdevList *m = NULL;
76b5d850
HT
417 Error *err = NULL;
418
419 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
b0e90181 420 m = g_malloc0(sizeof(*m));
76b5d850
HT
421
422 m->value = g_malloc0(sizeof(*m->value));
423
424 m->value->size = object_property_get_int(obj, "size",
425 &err);
426 if (err) {
427 goto error;
428 }
429
430 m->value->merge = object_property_get_bool(obj, "merge",
431 &err);
432 if (err) {
433 goto error;
434 }
435
436 m->value->dump = object_property_get_bool(obj, "dump",
437 &err);
438 if (err) {
439 goto error;
440 }
441
442 m->value->prealloc = object_property_get_bool(obj,
443 "prealloc", &err);
444 if (err) {
445 goto error;
446 }
447
448 m->value->policy = object_property_get_enum(obj,
449 "policy",
450 HostMemPolicy_lookup,
451 &err);
452 if (err) {
453 goto error;
454 }
455
456 object_property_get_uint16List(obj, "host-nodes",
457 &m->value->host_nodes, &err);
458 if (err) {
459 goto error;
460 }
461
462 m->next = *list;
463 *list = m;
464 }
465
466 return 0;
467error:
b0e90181
CF
468 g_free(m->value);
469 g_free(m);
470
76b5d850
HT
471 return -1;
472}
473
474MemdevList *qmp_query_memdev(Error **errp)
475{
476 Object *obj;
ecaf54a0 477 MemdevList *list = NULL;
76b5d850
HT
478
479 obj = object_resolve_path("/objects", NULL);
480 if (obj == NULL) {
481 return NULL;
482 }
483
484 if (object_child_foreach(obj, query_memdev, &list) != 0) {
485 goto error;
486 }
487
488 return list;
489
490error:
ecaf54a0 491 qapi_free_MemdevList(list);
76b5d850
HT
492 return NULL;
493}
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