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e54a5aff JL |
1 | /* |
2 | * OpenRISC int helper routines | |
3 | * | |
4 | * Copyright (c) 2011-2012 Jia Liu <[email protected]> | |
5 | * Feng Gao <[email protected]> | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
ed2decc6 | 21 | #include "qemu/osdep.h" |
e54a5aff | 22 | #include "cpu.h" |
2ef6175a | 23 | #include "exec/helper-proto.h" |
e54a5aff | 24 | #include "exception.h" |
1de7afc9 | 25 | #include "qemu/host-utils.h" |
e54a5aff JL |
26 | |
27 | target_ulong HELPER(ff1)(target_ulong x) | |
28 | { | |
29 | /*#ifdef TARGET_OPENRISC64 | |
30 | return x ? ctz64(x) + 1 : 0; | |
31 | #else*/ | |
32 | return x ? ctz32(x) + 1 : 0; | |
33 | /*#endif*/ | |
34 | } | |
35 | ||
36 | target_ulong HELPER(fl1)(target_ulong x) | |
37 | { | |
38 | /* not used yet, open it when we need or64. */ | |
39 | /*#ifdef TARGET_OPENRISC64 | |
40 | return 64 - clz64(x); | |
41 | #else*/ | |
42 | return 32 - clz32(x); | |
43 | /*#endif*/ | |
44 | } | |
45 | ||
46 | uint32_t HELPER(mul32)(CPUOpenRISCState *env, | |
47 | uint32_t ra, uint32_t rb) | |
48 | { | |
49 | uint64_t result; | |
50 | uint32_t high, cy; | |
51 | ||
dd51dc52 | 52 | OpenRISCCPU *cpu = openrisc_env_get_cpu(env); |
e54a5aff JL |
53 | |
54 | result = (uint64_t)ra * rb; | |
55 | /* regisiers in or32 is 32bit, so 32 is NOT a magic number. | |
56 | or64 is not handled in this function, and not implement yet, | |
57 | TARGET_LONG_BITS for or64 is 64, it will break this function, | |
58 | so, we didn't use TARGET_LONG_BITS here. */ | |
59 | high = result >> 32; | |
60 | cy = result >> (32 - 1); | |
61 | ||
62 | if ((cy & 0x1) == 0x0) { | |
63 | if (high == 0x0) { | |
64 | return result; | |
65 | } | |
66 | } | |
67 | ||
68 | if ((cy & 0x1) == 0x1) { | |
69 | if (high == 0xffffffff) { | |
70 | return result; | |
71 | } | |
72 | } | |
73 | ||
74 | cpu->env.sr |= (SR_OV | SR_CY); | |
75 | if (cpu->env.sr & SR_OVE) { | |
76 | raise_exception(cpu, EXCP_RANGE); | |
77 | } | |
78 | ||
79 | return result; | |
80 | } |