[qemu.git] / target-i386 / cc_helper.c

/*
 *  x86 condition code helpers
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"

const uint8_t parity_table[256] = {
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
    0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
};

#define SHIFT 0
#include "cc_helper_template.h"
#undef SHIFT

#define SHIFT 1
#include "cc_helper_template.h"
#undef SHIFT

#define SHIFT 2
#include "cc_helper_template.h"
#undef SHIFT

#ifdef TARGET_X86_64

#define SHIFT 3
#include "cc_helper_template.h"
#undef SHIFT

#endif

static target_ulong compute_all_adcx(target_ulong dst, target_ulong src1,
                                     target_ulong src2)
{
    return (src1 & ~CC_C) | (dst * CC_C);
}

static target_ulong compute_all_adox(target_ulong dst, target_ulong src1,
                                     target_ulong src2)
{
    return (src1 & ~CC_O) | (src2 * CC_O);
}

static target_ulong compute_all_adcox(target_ulong dst, target_ulong src1,
                                      target_ulong src2)
{
    return (src1 & ~(CC_C | CC_O)) | (dst * CC_C) | (src2 * CC_O);
}

target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
                                   target_ulong src2, int op)
{
    switch (op) {
    default: /* should never happen */
        return 0;

    case CC_OP_EFLAGS:
        return src1;
    case CC_OP_CLR:
        return CC_Z | CC_P;

    case CC_OP_MULB:
        return compute_all_mulb(dst, src1);
    case CC_OP_MULW:
        return compute_all_mulw(dst, src1);
    case CC_OP_MULL:
        return compute_all_mull(dst, src1);

    case CC_OP_ADDB:
        return compute_all_addb(dst, src1);
    case CC_OP_ADDW:
        return compute_all_addw(dst, src1);
    case CC_OP_ADDL:
        return compute_all_addl(dst, src1);

    case CC_OP_ADCB:
        return compute_all_adcb(dst, src1, src2);
    case CC_OP_ADCW:
        return compute_all_adcw(dst, src1, src2);
    case CC_OP_ADCL:
        return compute_all_adcl(dst, src1, src2);

    case CC_OP_SUBB:
        return compute_all_subb(dst, src1);
    case CC_OP_SUBW:
        return compute_all_subw(dst, src1);
    case CC_OP_SUBL:
        return compute_all_subl(dst, src1);

    case CC_OP_SBBB:
        return compute_all_sbbb(dst, src1, src2);
    case CC_OP_SBBW:
        return compute_all_sbbw(dst, src1, src2);
    case CC_OP_SBBL:
        return compute_all_sbbl(dst, src1, src2);

    case CC_OP_LOGICB:
        return compute_all_logicb(dst, src1);
    case CC_OP_LOGICW:
        return compute_all_logicw(dst, src1);
    case CC_OP_LOGICL:
        return compute_all_logicl(dst, src1);

    case CC_OP_INCB:
        return compute_all_incb(dst, src1);
    case CC_OP_INCW:
        return compute_all_incw(dst, src1);
    case CC_OP_INCL:
        return compute_all_incl(dst, src1);

    case CC_OP_DECB:
        return compute_all_decb(dst, src1);
    case CC_OP_DECW:
        return compute_all_decw(dst, src1);
    case CC_OP_DECL:
        return compute_all_decl(dst, src1);

    case CC_OP_SHLB:
        return compute_all_shlb(dst, src1);
    case CC_OP_SHLW:
        return compute_all_shlw(dst, src1);
    case CC_OP_SHLL:
        return compute_all_shll(dst, src1);

    case CC_OP_SARB:
        return compute_all_sarb(dst, src1);
    case CC_OP_SARW:
        return compute_all_sarw(dst, src1);
    case CC_OP_SARL:
        return compute_all_sarl(dst, src1);

    case CC_OP_BMILGB:
        return compute_all_bmilgb(dst, src1);
    case CC_OP_BMILGW:
        return compute_all_bmilgw(dst, src1);
    case CC_OP_BMILGL:
        return compute_all_bmilgl(dst, src1);

    case CC_OP_ADCX:
        return compute_all_adcx(dst, src1, src2);
    case CC_OP_ADOX:
        return compute_all_adox(dst, src1, src2);
    case CC_OP_ADCOX:
        return compute_all_adcox(dst, src1, src2);

#ifdef TARGET_X86_64
    case CC_OP_MULQ:
        return compute_all_mulq(dst, src1);
    case CC_OP_ADDQ:
        return compute_all_addq(dst, src1);
    case CC_OP_ADCQ:
        return compute_all_adcq(dst, src1, src2);
    case CC_OP_SUBQ:
        return compute_all_subq(dst, src1);
    case CC_OP_SBBQ:
        return compute_all_sbbq(dst, src1, src2);
    case CC_OP_LOGICQ:
        return compute_all_logicq(dst, src1);
    case CC_OP_INCQ:
        return compute_all_incq(dst, src1);
    case CC_OP_DECQ:
        return compute_all_decq(dst, src1);
    case CC_OP_SHLQ:
        return compute_all_shlq(dst, src1);
    case CC_OP_SARQ:
        return compute_all_sarq(dst, src1);
    case CC_OP_BMILGQ:
        return compute_all_bmilgq(dst, src1);
#endif
    }
}

uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
{
    return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
}

target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
                                 target_ulong src2, int op)
{
    switch (op) {
    default: /* should never happen */
    case CC_OP_LOGICB:
    case CC_OP_LOGICW:
    case CC_OP_LOGICL:
    case CC_OP_LOGICQ:
    case CC_OP_CLR:
        return 0;

    case CC_OP_EFLAGS:
    case CC_OP_SARB:
    case CC_OP_SARW:
    case CC_OP_SARL:
    case CC_OP_SARQ:
    case CC_OP_ADOX:
        return src1 & 1;

    case CC_OP_INCB:
    case CC_OP_INCW:
    case CC_OP_INCL:
    case CC_OP_INCQ:
    case CC_OP_DECB:
    case CC_OP_DECW:
    case CC_OP_DECL:
    case CC_OP_DECQ:
        return src1;

    case CC_OP_MULB:
    case CC_OP_MULW:
    case CC_OP_MULL:
    case CC_OP_MULQ:
        return src1 != 0;

    case CC_OP_ADCX:
    case CC_OP_ADCOX:
        return dst;

    case CC_OP_ADDB:
        return compute_c_addb(dst, src1);
    case CC_OP_ADDW:
        return compute_c_addw(dst, src1);
    case CC_OP_ADDL:
        return compute_c_addl(dst, src1);

    case CC_OP_ADCB:
        return compute_c_adcb(dst, src1, src2);
    case CC_OP_ADCW:
        return compute_c_adcw(dst, src1, src2);
    case CC_OP_ADCL:
        return compute_c_adcl(dst, src1, src2);

    case CC_OP_SUBB:
        return compute_c_subb(dst, src1);
    case CC_OP_SUBW:
        return compute_c_subw(dst, src1);
    case CC_OP_SUBL:
        return compute_c_subl(dst, src1);

    case CC_OP_SBBB:
        return compute_c_sbbb(dst, src1, src2);
    case CC_OP_SBBW:
        return compute_c_sbbw(dst, src1, src2);
    case CC_OP_SBBL:
        return compute_c_sbbl(dst, src1, src2);

    case CC_OP_SHLB:
        return compute_c_shlb(dst, src1);
    case CC_OP_SHLW:
        return compute_c_shlw(dst, src1);
    case CC_OP_SHLL:
        return compute_c_shll(dst, src1);

    case CC_OP_BMILGB:
        return compute_c_bmilgb(dst, src1);
    case CC_OP_BMILGW:
        return compute_c_bmilgw(dst, src1);
    case CC_OP_BMILGL:
        return compute_c_bmilgl(dst, src1);

#ifdef TARGET_X86_64
    case CC_OP_ADDQ:
        return compute_c_addq(dst, src1);
    case CC_OP_ADCQ:
        return compute_c_adcq(dst, src1, src2);
    case CC_OP_SUBQ:
        return compute_c_subq(dst, src1);
    case CC_OP_SBBQ:
        return compute_c_sbbq(dst, src1, src2);
    case CC_OP_SHLQ:
        return compute_c_shlq(dst, src1);
    case CC_OP_BMILGQ:
        return compute_c_bmilgq(dst, src1);
#endif
    }
}

void helper_write_eflags(CPUX86State *env, target_ulong t0,
                         uint32_t update_mask)
{
    cpu_load_eflags(env, t0, update_mask);
}

target_ulong helper_read_eflags(CPUX86State *env)
{
    uint32_t eflags;

    eflags = cpu_cc_compute_all(env, CC_OP);
    eflags |= (env->df & DF_MASK);
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
    return eflags;
}

void helper_clts(CPUX86State *env)
{
    env->cr[0] &= ~CR0_TS_MASK;
    env->hflags &= ~HF_TS_MASK;
}

void helper_reset_rf(CPUX86State *env)
{
    env->eflags &= ~RF_MASK;
}

void helper_cli(CPUX86State *env)
{
    env->eflags &= ~IF_MASK;
}

void helper_sti(CPUX86State *env)
{
    env->eflags |= IF_MASK;
}

void helper_clac(CPUX86State *env)
{
    env->eflags &= ~AC_MASK;
}

void helper_stac(CPUX86State *env)
{
    env->eflags |= AC_MASK;
}

#if 0
/* vm86plus instructions */
void helper_cli_vm(CPUX86State *env)
{
    env->eflags &= ~VIF_MASK;
}

void helper_sti_vm(CPUX86State *env)
{
    env->eflags |= VIF_MASK;
    if (env->eflags & VIP_MASK) {
        raise_exception_ra(env, EXCP0D_GPF, GETPC());
    }
}
#endif
Commit	Line	Data
5918fffb BS	1	/*
	2	* x86 condition code helpers
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
b6a0aa05	20	#include "qemu/osdep.h"
5918fffb	21	#include "cpu.h"
2ef6175a	22	#include "exec/helper-proto.h"
5918fffb BS	23
	24	const uint8_t parity_table[256] = {
	25	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	26	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	27	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	28	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	29	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	30	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	31	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	32	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	33	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	34	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	35	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	36	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	37	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	38	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	39	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	40	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	41	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	42	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	43	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	44	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	45	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	46	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	47	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	48	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	49	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	50	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	51	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	52	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	53	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	54	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	55	CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
	56	0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
	57	};
	58
	59	#define SHIFT 0
	60	#include "cc_helper_template.h"
	61	#undef SHIFT
	62
	63	#define SHIFT 1
	64	#include "cc_helper_template.h"
	65	#undef SHIFT
	66
	67	#define SHIFT 2
	68	#include "cc_helper_template.h"
	69	#undef SHIFT
	70
	71	#ifdef TARGET_X86_64
	72
	73	#define SHIFT 3
	74	#include "cc_helper_template.h"
	75	#undef SHIFT
	76
	77	#endif
	78
cd7f97ca RH	79	static target_ulong compute_all_adcx(target_ulong dst, target_ulong src1,
	80	target_ulong src2)
	81	{
	82	return (src1 & ~CC_C) \| (dst * CC_C);
	83	}
	84
	85	static target_ulong compute_all_adox(target_ulong dst, target_ulong src1,
	86	target_ulong src2)
	87	{
	88	return (src1 & ~CC_O) \| (src2 * CC_O);
	89	}
	90
	91	static target_ulong compute_all_adcox(target_ulong dst, target_ulong src1,
	92	target_ulong src2)
	93	{
	94	return (src1 & ~(CC_C \| CC_O)) \| (dst * CC_C) \| (src2 * CC_O);
	95	}
	96
988c3eb0 RH	97	target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
988c3eb0 RH	98	target_ulong src2, int op)
5918fffb BS	99	{
	100	switch (op) {
	101	default: /* should never happen */
	102	return 0;
	103
	104	case CC_OP_EFLAGS:
8601c0b6	105	return src1;
436ff2d2	106	case CC_OP_CLR:
d2fe51bd	107	return CC_Z \| CC_P;
5918fffb BS	108
5918fffb BS	109	case CC_OP_MULB:
8601c0b6	110	return compute_all_mulb(dst, src1);
5918fffb	111	case CC_OP_MULW:
8601c0b6	112	return compute_all_mulw(dst, src1);
5918fffb	113	case CC_OP_MULL:
8601c0b6	114	return compute_all_mull(dst, src1);
5918fffb BS	115
5918fffb BS	116	case CC_OP_ADDB:
8601c0b6	117	return compute_all_addb(dst, src1);
5918fffb	118	case CC_OP_ADDW:
8601c0b6	119	return compute_all_addw(dst, src1);
5918fffb	120	case CC_OP_ADDL:
8601c0b6	121	return compute_all_addl(dst, src1);
5918fffb BS	122
5918fffb BS	123	case CC_OP_ADCB:
988c3eb0	124	return compute_all_adcb(dst, src1, src2);
5918fffb	125	case CC_OP_ADCW:
988c3eb0	126	return compute_all_adcw(dst, src1, src2);
5918fffb	127	case CC_OP_ADCL:
988c3eb0	128	return compute_all_adcl(dst, src1, src2);
5918fffb BS	129
5918fffb BS	130	case CC_OP_SUBB:
8601c0b6	131	return compute_all_subb(dst, src1);
5918fffb	132	case CC_OP_SUBW:
8601c0b6	133	return compute_all_subw(dst, src1);
5918fffb	134	case CC_OP_SUBL:
8601c0b6	135	return compute_all_subl(dst, src1);
5918fffb BS	136
5918fffb BS	137	case CC_OP_SBBB:
988c3eb0	138	return compute_all_sbbb(dst, src1, src2);
5918fffb	139	case CC_OP_SBBW:
988c3eb0	140	return compute_all_sbbw(dst, src1, src2);
5918fffb	141	case CC_OP_SBBL:
988c3eb0	142	return compute_all_sbbl(dst, src1, src2);
5918fffb BS	143
5918fffb BS	144	case CC_OP_LOGICB:
8601c0b6	145	return compute_all_logicb(dst, src1);
5918fffb	146	case CC_OP_LOGICW:
8601c0b6	147	return compute_all_logicw(dst, src1);
5918fffb	148	case CC_OP_LOGICL:
8601c0b6	149	return compute_all_logicl(dst, src1);
5918fffb BS	150
5918fffb BS	151	case CC_OP_INCB:
8601c0b6	152	return compute_all_incb(dst, src1);
5918fffb	153	case CC_OP_INCW:
8601c0b6	154	return compute_all_incw(dst, src1);
5918fffb	155	case CC_OP_INCL:
8601c0b6	156	return compute_all_incl(dst, src1);
5918fffb BS	157
5918fffb BS	158	case CC_OP_DECB:
8601c0b6	159	return compute_all_decb(dst, src1);
5918fffb	160	case CC_OP_DECW:
8601c0b6	161	return compute_all_decw(dst, src1);
5918fffb	162	case CC_OP_DECL:
8601c0b6	163	return compute_all_decl(dst, src1);
5918fffb BS	164
5918fffb BS	165	case CC_OP_SHLB:
8601c0b6	166	return compute_all_shlb(dst, src1);
5918fffb	167	case CC_OP_SHLW:
8601c0b6	168	return compute_all_shlw(dst, src1);
5918fffb	169	case CC_OP_SHLL:
8601c0b6	170	return compute_all_shll(dst, src1);
5918fffb BS	171
5918fffb BS	172	case CC_OP_SARB:
8601c0b6	173	return compute_all_sarb(dst, src1);
5918fffb	174	case CC_OP_SARW:
8601c0b6	175	return compute_all_sarw(dst, src1);
5918fffb	176	case CC_OP_SARL:
8601c0b6	177	return compute_all_sarl(dst, src1);
5918fffb	178
bc4b43dc RH	179	case CC_OP_BMILGB:
	180	return compute_all_bmilgb(dst, src1);
	181	case CC_OP_BMILGW:
	182	return compute_all_bmilgw(dst, src1);
	183	case CC_OP_BMILGL:
	184	return compute_all_bmilgl(dst, src1);
	185
cd7f97ca RH	186	case CC_OP_ADCX:
	187	return compute_all_adcx(dst, src1, src2);
	188	case CC_OP_ADOX:
	189	return compute_all_adox(dst, src1, src2);
	190	case CC_OP_ADCOX:
	191	return compute_all_adcox(dst, src1, src2);
	192
5918fffb BS	193	#ifdef TARGET_X86_64
5918fffb BS	194	case CC_OP_MULQ:
8601c0b6	195	return compute_all_mulq(dst, src1);
5918fffb	196	case CC_OP_ADDQ:
8601c0b6	197	return compute_all_addq(dst, src1);
5918fffb	198	case CC_OP_ADCQ:
988c3eb0	199	return compute_all_adcq(dst, src1, src2);
5918fffb	200	case CC_OP_SUBQ:
8601c0b6	201	return compute_all_subq(dst, src1);
5918fffb	202	case CC_OP_SBBQ:
988c3eb0	203	return compute_all_sbbq(dst, src1, src2);
5918fffb	204	case CC_OP_LOGICQ:
8601c0b6	205	return compute_all_logicq(dst, src1);
5918fffb	206	case CC_OP_INCQ:
8601c0b6	207	return compute_all_incq(dst, src1);
5918fffb	208	case CC_OP_DECQ:
8601c0b6	209	return compute_all_decq(dst, src1);
5918fffb	210	case CC_OP_SHLQ:
8601c0b6	211	return compute_all_shlq(dst, src1);
5918fffb	212	case CC_OP_SARQ:
8601c0b6	213	return compute_all_sarq(dst, src1);
bc4b43dc RH	214	case CC_OP_BMILGQ:
bc4b43dc RH	215	return compute_all_bmilgq(dst, src1);
5918fffb BS	216	#endif
	217	}
	218	}
	219
f0967a1a	220	uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
5918fffb	221	{
988c3eb0	222	return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
5918fffb BS	223	}
5918fffb BS	224
988c3eb0 RH	225	target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
988c3eb0 RH	226	target_ulong src2, int op)
5918fffb BS	227	{
	228	switch (op) {
	229	default: /* should never happen */
8601c0b6 RH	230	case CC_OP_LOGICB:
	231	case CC_OP_LOGICW:
	232	case CC_OP_LOGICL:
	233	case CC_OP_LOGICQ:
436ff2d2	234	case CC_OP_CLR:
5918fffb BS	235	return 0;
	236
	237	case CC_OP_EFLAGS:
8601c0b6 RH	238	case CC_OP_SARB:
	239	case CC_OP_SARW:
	240	case CC_OP_SARL:
	241	case CC_OP_SARQ:
cd7f97ca	242	case CC_OP_ADOX:
8601c0b6 RH	243	return src1 & 1;
	244
	245	case CC_OP_INCB:
	246	case CC_OP_INCW:
	247	case CC_OP_INCL:
	248	case CC_OP_INCQ:
	249	case CC_OP_DECB:
	250	case CC_OP_DECW:
	251	case CC_OP_DECL:
	252	case CC_OP_DECQ:
	253	return src1;
5918fffb BS	254
5918fffb BS	255	case CC_OP_MULB:
5918fffb	256	case CC_OP_MULW:
5918fffb	257	case CC_OP_MULL:
8601c0b6 RH	258	case CC_OP_MULQ:
8601c0b6 RH	259	return src1 != 0;
5918fffb	260
cd7f97ca RH	261	case CC_OP_ADCX:
	262	case CC_OP_ADCOX:
	263	return dst;
	264
5918fffb	265	case CC_OP_ADDB:
8601c0b6	266	return compute_c_addb(dst, src1);
5918fffb	267	case CC_OP_ADDW:
8601c0b6	268	return compute_c_addw(dst, src1);
5918fffb	269	case CC_OP_ADDL:
8601c0b6	270	return compute_c_addl(dst, src1);
5918fffb BS	271
5918fffb BS	272	case CC_OP_ADCB:
988c3eb0	273	return compute_c_adcb(dst, src1, src2);
5918fffb	274	case CC_OP_ADCW:
988c3eb0	275	return compute_c_adcw(dst, src1, src2);
5918fffb	276	case CC_OP_ADCL:
988c3eb0	277	return compute_c_adcl(dst, src1, src2);
5918fffb BS	278
5918fffb BS	279	case CC_OP_SUBB:
8601c0b6	280	return compute_c_subb(dst, src1);
5918fffb	281	case CC_OP_SUBW:
8601c0b6	282	return compute_c_subw(dst, src1);
5918fffb	283	case CC_OP_SUBL:
8601c0b6	284	return compute_c_subl(dst, src1);
5918fffb BS	285
5918fffb BS	286	case CC_OP_SBBB:
988c3eb0	287	return compute_c_sbbb(dst, src1, src2);
5918fffb	288	case CC_OP_SBBW:
988c3eb0	289	return compute_c_sbbw(dst, src1, src2);
5918fffb	290	case CC_OP_SBBL:
988c3eb0	291	return compute_c_sbbl(dst, src1, src2);
5918fffb BS	292
5918fffb BS	293	case CC_OP_SHLB:
8601c0b6	294	return compute_c_shlb(dst, src1);
5918fffb	295	case CC_OP_SHLW:
8601c0b6	296	return compute_c_shlw(dst, src1);
5918fffb	297	case CC_OP_SHLL:
8601c0b6	298	return compute_c_shll(dst, src1);
5918fffb	299
bc4b43dc RH	300	case CC_OP_BMILGB:
	301	return compute_c_bmilgb(dst, src1);
	302	case CC_OP_BMILGW:
	303	return compute_c_bmilgw(dst, src1);
	304	case CC_OP_BMILGL:
	305	return compute_c_bmilgl(dst, src1);
	306
5918fffb	307	#ifdef TARGET_X86_64
5918fffb	308	case CC_OP_ADDQ:
8601c0b6	309	return compute_c_addq(dst, src1);
5918fffb	310	case CC_OP_ADCQ:
988c3eb0	311	return compute_c_adcq(dst, src1, src2);
5918fffb	312	case CC_OP_SUBQ:
8601c0b6	313	return compute_c_subq(dst, src1);
5918fffb	314	case CC_OP_SBBQ:
988c3eb0	315	return compute_c_sbbq(dst, src1, src2);
5918fffb	316	case CC_OP_SHLQ:
8601c0b6	317	return compute_c_shlq(dst, src1);
bc4b43dc RH	318	case CC_OP_BMILGQ:
bc4b43dc RH	319	return compute_c_bmilgq(dst, src1);
5918fffb BS	320	#endif
	321	}
	322	}
	323
f0967a1a BS	324	void helper_write_eflags(CPUX86State *env, target_ulong t0,
f0967a1a BS	325	uint32_t update_mask)
5918fffb BS	326	{
	327	cpu_load_eflags(env, t0, update_mask);
	328	}
	329
f0967a1a	330	target_ulong helper_read_eflags(CPUX86State *env)
5918fffb BS	331	{
	332	uint32_t eflags;
	333
db9f2597	334	eflags = cpu_cc_compute_all(env, CC_OP);
80cf2c81	335	eflags \|= (env->df & DF_MASK);
5918fffb BS	336	eflags \|= env->eflags & ~(VM_MASK \| RF_MASK);
	337	return eflags;
	338	}
	339
f0967a1a	340	void helper_clts(CPUX86State *env)
5918fffb BS	341	{
	342	env->cr[0] &= ~CR0_TS_MASK;
	343	env->hflags &= ~HF_TS_MASK;
	344	}
	345
f0967a1a	346	void helper_reset_rf(CPUX86State *env)
5918fffb BS	347	{
	348	env->eflags &= ~RF_MASK;
	349	}
	350
f0967a1a	351	void helper_cli(CPUX86State *env)
5918fffb BS	352	{
	353	env->eflags &= ~IF_MASK;
	354	}
	355
f0967a1a	356	void helper_sti(CPUX86State *env)
5918fffb BS	357	{
	358	env->eflags \|= IF_MASK;
	359	}
	360
a9321a4d PA	361	void helper_clac(CPUX86State *env)
	362	{
	363	env->eflags &= ~AC_MASK;
	364	}
	365
	366	void helper_stac(CPUX86State *env)
	367	{
	368	env->eflags \|= AC_MASK;
	369	}
	370
5918fffb BS	371	#if 0
5918fffb BS	372	/* vm86plus instructions */
f0967a1a	373	void helper_cli_vm(CPUX86State *env)
5918fffb BS	374	{
	375	env->eflags &= ~VIF_MASK;
	376	}
	377
f0967a1a	378	void helper_sti_vm(CPUX86State *env)
5918fffb BS	379	{
	380	env->eflags \|= VIF_MASK;
	381	if (env->eflags & VIP_MASK) {
4054cdec	382	raise_exception_ra(env, EXCP0D_GPF, GETPC());
5918fffb BS	383	}
	384	}
	385	#endif