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29e4bcb2 AF |
1 | /* |
2 | * QEMU S/390 CPU | |
3 | * | |
1ac1a749 AF |
4 | * Copyright (c) 2009 Ulrich Hecht |
5 | * Copyright (c) 2011 Alexander Graf | |
29e4bcb2 | 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
70bada03 | 7 | * Copyright (c) 2012 IBM Corp. |
29e4bcb2 AF |
8 | * |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2.1 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see | |
21 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
70bada03 JF |
22 | * Contributions after 2012-12-11 are licensed under the terms of the |
23 | * GNU GPL, version 2 or (at your option) any later version. | |
29e4bcb2 AF |
24 | */ |
25 | ||
564b863d | 26 | #include "cpu.h" |
29e4bcb2 | 27 | #include "qemu-common.h" |
1de7afc9 | 28 | #include "qemu/timer.h" |
70bada03 | 29 | #include "hw/hw.h" |
c7396bbb | 30 | #ifndef CONFIG_USER_ONLY |
904e5fd5 VM |
31 | #include "sysemu/arch_init.h" |
32 | #endif | |
33 | ||
70bada03 JF |
34 | #define CR0_RESET 0xE0UL |
35 | #define CR14_RESET 0xC2000000UL; | |
36 | ||
904e5fd5 VM |
37 | /* generate CPU information for cpu -? */ |
38 | void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
39 | { | |
40 | #ifdef CONFIG_KVM | |
41 | (*cpu_fprintf)(f, "s390 %16s\n", "host"); | |
42 | #endif | |
43 | } | |
29e4bcb2 | 44 | |
904e5fd5 VM |
45 | #ifndef CONFIG_USER_ONLY |
46 | CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) | |
47 | { | |
48 | CpuDefinitionInfoList *entry; | |
49 | CpuDefinitionInfo *info; | |
50 | ||
51 | info = g_malloc0(sizeof(*info)); | |
52 | info->name = g_strdup("host"); | |
53 | ||
54 | entry = g_malloc0(sizeof(*entry)); | |
55 | entry->value = info; | |
56 | ||
57 | return entry; | |
58 | } | |
59 | #endif | |
29e4bcb2 | 60 | |
f45748f1 AF |
61 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
62 | { | |
63 | S390CPU *cpu = S390_CPU(cs); | |
64 | ||
65 | cpu->env.psw.addr = value; | |
66 | } | |
67 | ||
8c2e1b00 AF |
68 | static bool s390_cpu_has_work(CPUState *cs) |
69 | { | |
70 | S390CPU *cpu = S390_CPU(cs); | |
71 | CPUS390XState *env = &cpu->env; | |
72 | ||
73 | return (cs->interrupt_request & CPU_INTERRUPT_HARD) && | |
74 | (env->psw.mask & PSW_MASK_EXT); | |
75 | } | |
76 | ||
29c6157c CB |
77 | #if !defined(CONFIG_USER_ONLY) |
78 | /* S390CPUClass::load_normal() */ | |
79 | static void s390_cpu_load_normal(CPUState *s) | |
80 | { | |
81 | S390CPU *cpu = S390_CPU(s); | |
fdfba1a2 | 82 | cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; |
29c6157c CB |
83 | cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64; |
84 | s390_add_running_cpu(cpu); | |
85 | } | |
86 | #endif | |
87 | ||
f5ae2a4f | 88 | /* S390CPUClass::cpu_reset() */ |
29e4bcb2 AF |
89 | static void s390_cpu_reset(CPUState *s) |
90 | { | |
91 | S390CPU *cpu = S390_CPU(s); | |
92 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
93 | CPUS390XState *env = &cpu->env; | |
94 | ||
819bd309 | 95 | env->pfault_token = -1UL; |
f5ae2a4f CB |
96 | s390_del_running_cpu(cpu); |
97 | scc->parent_reset(s); | |
98 | #if !defined(CONFIG_USER_ONLY) | |
99 | s->halted = 1; | |
100 | #endif | |
00c8cb0a | 101 | tlb_flush(s, 1); |
f5ae2a4f CB |
102 | } |
103 | ||
104 | /* S390CPUClass::initial_reset() */ | |
105 | static void s390_cpu_initial_reset(CPUState *s) | |
106 | { | |
107 | S390CPU *cpu = S390_CPU(s); | |
108 | CPUS390XState *env = &cpu->env; | |
109 | ||
110 | s390_cpu_reset(s); | |
111 | /* initial reset does not touch regs,fregs and aregs */ | |
f0c3c505 | 112 | memset(&env->fpc, 0, offsetof(CPUS390XState, cpu_num) - |
f5ae2a4f CB |
113 | offsetof(CPUS390XState, fpc)); |
114 | ||
115 | /* architectured initial values for CR 0 and 14 */ | |
116 | env->cregs[0] = CR0_RESET; | |
117 | env->cregs[14] = CR14_RESET; | |
819bd309 DD |
118 | |
119 | env->pfault_token = -1UL; | |
49f5c9e9 TH |
120 | |
121 | #if defined(CONFIG_KVM) | |
122 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ | |
123 | if (kvm_enabled()) { | |
124 | if (kvm_vcpu_ioctl(s, KVM_S390_INITIAL_RESET, NULL)) { | |
125 | perror("Initial CPU reset failed"); | |
126 | } | |
127 | } | |
128 | #endif | |
f5ae2a4f CB |
129 | } |
130 | ||
131 | /* CPUClass:reset() */ | |
132 | static void s390_cpu_full_reset(CPUState *s) | |
133 | { | |
134 | S390CPU *cpu = S390_CPU(s); | |
135 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
136 | CPUS390XState *env = &cpu->env; | |
137 | ||
49e15878 | 138 | s390_del_running_cpu(cpu); |
70bada03 | 139 | |
29e4bcb2 AF |
140 | scc->parent_reset(s); |
141 | ||
f0c3c505 | 142 | memset(env, 0, offsetof(CPUS390XState, cpu_num)); |
70bada03 JF |
143 | |
144 | /* architectured initial values for CR 0 and 14 */ | |
145 | env->cregs[0] = CR0_RESET; | |
146 | env->cregs[14] = CR14_RESET; | |
819bd309 DD |
147 | |
148 | env->pfault_token = -1UL; | |
149 | ||
70bada03 | 150 | /* set halted to 1 to make sure we can add the cpu in |
259186a7 | 151 | * s390_ipl_cpu code, where CPUState::halted is set back to 0 |
70bada03 JF |
152 | * after incrementing the cpu counter */ |
153 | #if !defined(CONFIG_USER_ONLY) | |
259186a7 | 154 | s->halted = 1; |
50a2c6e5 PB |
155 | |
156 | if (kvm_enabled()) { | |
157 | kvm_s390_reset_vcpu(cpu); | |
158 | } | |
70bada03 | 159 | #endif |
00c8cb0a | 160 | tlb_flush(s, 1); |
29e4bcb2 AF |
161 | } |
162 | ||
70bada03 JF |
163 | #if !defined(CONFIG_USER_ONLY) |
164 | static void s390_cpu_machine_reset_cb(void *opaque) | |
165 | { | |
166 | S390CPU *cpu = opaque; | |
167 | ||
168 | cpu_reset(CPU(cpu)); | |
169 | } | |
170 | #endif | |
171 | ||
1f136632 AF |
172 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
173 | { | |
14a10fc3 | 174 | CPUState *cs = CPU(dev); |
1f136632 AF |
175 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
176 | ||
14a10fc3 AF |
177 | qemu_init_vcpu(cs); |
178 | cpu_reset(cs); | |
1f136632 AF |
179 | |
180 | scc->parent_realize(dev, errp); | |
181 | } | |
182 | ||
8f22e0df AF |
183 | static void s390_cpu_initfn(Object *obj) |
184 | { | |
c05efcb1 | 185 | CPUState *cs = CPU(obj); |
8f22e0df AF |
186 | S390CPU *cpu = S390_CPU(obj); |
187 | CPUS390XState *env = &cpu->env; | |
2b7ac767 | 188 | static bool inited; |
8f22e0df AF |
189 | static int cpu_num = 0; |
190 | #if !defined(CONFIG_USER_ONLY) | |
191 | struct tm tm; | |
192 | #endif | |
193 | ||
c05efcb1 | 194 | cs->env_ptr = env; |
8f22e0df AF |
195 | cpu_exec_init(env); |
196 | #if !defined(CONFIG_USER_ONLY) | |
70bada03 | 197 | qemu_register_reset(s390_cpu_machine_reset_cb, cpu); |
8f22e0df AF |
198 | qemu_get_timedate(&tm, 0); |
199 | env->tod_offset = TOD_UNIX_EPOCH + | |
200 | (time2tod(mktimegm(&tm)) * 1000000000ULL); | |
201 | env->tod_basetime = 0; | |
bc72ad67 AB |
202 | env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); |
203 | env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); | |
259186a7 | 204 | /* set CPUState::halted state to 1 to avoid decrementing the running |
70bada03 JF |
205 | * cpu counter in s390_cpu_reset to a negative number at |
206 | * initial ipl */ | |
259186a7 | 207 | cs->halted = 1; |
8f22e0df AF |
208 | #endif |
209 | env->cpu_num = cpu_num++; | |
210 | env->ext_index = -1; | |
2b7ac767 AF |
211 | |
212 | if (tcg_enabled() && !inited) { | |
213 | inited = true; | |
214 | s390x_translate_init(); | |
215 | } | |
8f22e0df AF |
216 | } |
217 | ||
d5627ce8 AF |
218 | static void s390_cpu_finalize(Object *obj) |
219 | { | |
220 | #if !defined(CONFIG_USER_ONLY) | |
221 | S390CPU *cpu = S390_CPU(obj); | |
222 | ||
223 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | |
224 | #endif | |
225 | } | |
226 | ||
c7396bbb AF |
227 | static const VMStateDescription vmstate_s390_cpu = { |
228 | .name = "cpu", | |
229 | .unmigratable = 1, | |
230 | }; | |
231 | ||
29e4bcb2 AF |
232 | static void s390_cpu_class_init(ObjectClass *oc, void *data) |
233 | { | |
234 | S390CPUClass *scc = S390_CPU_CLASS(oc); | |
235 | CPUClass *cc = CPU_CLASS(scc); | |
c7396bbb | 236 | DeviceClass *dc = DEVICE_CLASS(oc); |
29e4bcb2 | 237 | |
1f136632 AF |
238 | scc->parent_realize = dc->realize; |
239 | dc->realize = s390_cpu_realizefn; | |
240 | ||
29e4bcb2 | 241 | scc->parent_reset = cc->reset; |
29c6157c CB |
242 | #if !defined(CONFIG_USER_ONLY) |
243 | scc->load_normal = s390_cpu_load_normal; | |
244 | #endif | |
f5ae2a4f CB |
245 | scc->cpu_reset = s390_cpu_reset; |
246 | scc->initial_cpu_reset = s390_cpu_initial_reset; | |
247 | cc->reset = s390_cpu_full_reset; | |
8c2e1b00 | 248 | cc->has_work = s390_cpu_has_work; |
97a8ea5a | 249 | cc->do_interrupt = s390_cpu_do_interrupt; |
878096ee | 250 | cc->dump_state = s390_cpu_dump_state; |
f45748f1 | 251 | cc->set_pc = s390_cpu_set_pc; |
5b50e790 AF |
252 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
253 | cc->gdb_write_register = s390_cpu_gdb_write_register; | |
7510454e AF |
254 | #ifdef CONFIG_USER_ONLY |
255 | cc->handle_mmu_fault = s390_cpu_handle_mmu_fault; | |
256 | #else | |
00b941e5 | 257 | cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; |
9b4f38e1 ET |
258 | cc->write_elf64_note = s390_cpu_write_elf64_note; |
259 | cc->write_elf64_qemunote = s390_cpu_write_elf64_qemunote; | |
00b941e5 | 260 | #endif |
c7396bbb | 261 | dc->vmsd = &vmstate_s390_cpu; |
a0e372f0 | 262 | cc->gdb_num_core_regs = S390_NUM_REGS; |
29e4bcb2 AF |
263 | } |
264 | ||
265 | static const TypeInfo s390_cpu_type_info = { | |
266 | .name = TYPE_S390_CPU, | |
267 | .parent = TYPE_CPU, | |
268 | .instance_size = sizeof(S390CPU), | |
8f22e0df | 269 | .instance_init = s390_cpu_initfn, |
d5627ce8 | 270 | .instance_finalize = s390_cpu_finalize, |
29e4bcb2 AF |
271 | .abstract = false, |
272 | .class_size = sizeof(S390CPUClass), | |
273 | .class_init = s390_cpu_class_init, | |
274 | }; | |
275 | ||
276 | static void s390_cpu_register_types(void) | |
277 | { | |
278 | type_register_static(&s390_cpu_type_info); | |
279 | } | |
280 | ||
281 | type_init(s390_cpu_register_types) |