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Commit | Line | Data |
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a78b0504 BS |
1 | /* |
2 | * S/390 condition code helper routines | |
3 | * | |
4 | * Copyright (c) 2009 Ulrich Hecht | |
5 | * Copyright (c) 2009 Alexander Graf | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
9615495a | 21 | #include "qemu/osdep.h" |
a78b0504 | 22 | #include "cpu.h" |
4e58b838 | 23 | #include "internal.h" |
63c91552 | 24 | #include "exec/exec-all.h" |
2ef6175a | 25 | #include "exec/helper-proto.h" |
00d2dc19 | 26 | #include "qemu/host-utils.h" |
a78b0504 BS |
27 | |
28 | /* #define DEBUG_HELPER */ | |
29 | #ifdef DEBUG_HELPER | |
30 | #define HELPER_LOG(x...) qemu_log(x) | |
31 | #else | |
32 | #define HELPER_LOG(x...) | |
33 | #endif | |
34 | ||
443aaeb8 | 35 | static uint32_t cc_calc_ltgt_32(int32_t src, int32_t dst) |
a78b0504 BS |
36 | { |
37 | if (src == dst) { | |
38 | return 0; | |
39 | } else if (src < dst) { | |
40 | return 1; | |
41 | } else { | |
42 | return 2; | |
43 | } | |
44 | } | |
45 | ||
443aaeb8 | 46 | static uint32_t cc_calc_ltgt0_32(int32_t dst) |
a78b0504 | 47 | { |
443aaeb8 | 48 | return cc_calc_ltgt_32(dst, 0); |
a78b0504 BS |
49 | } |
50 | ||
443aaeb8 | 51 | static uint32_t cc_calc_ltgt_64(int64_t src, int64_t dst) |
a78b0504 BS |
52 | { |
53 | if (src == dst) { | |
54 | return 0; | |
55 | } else if (src < dst) { | |
56 | return 1; | |
57 | } else { | |
58 | return 2; | |
59 | } | |
60 | } | |
61 | ||
443aaeb8 | 62 | static uint32_t cc_calc_ltgt0_64(int64_t dst) |
a78b0504 | 63 | { |
443aaeb8 | 64 | return cc_calc_ltgt_64(dst, 0); |
a78b0504 BS |
65 | } |
66 | ||
443aaeb8 | 67 | static uint32_t cc_calc_ltugtu_32(uint32_t src, uint32_t dst) |
a78b0504 BS |
68 | { |
69 | if (src == dst) { | |
70 | return 0; | |
71 | } else if (src < dst) { | |
72 | return 1; | |
73 | } else { | |
74 | return 2; | |
75 | } | |
76 | } | |
77 | ||
443aaeb8 | 78 | static uint32_t cc_calc_ltugtu_64(uint64_t src, uint64_t dst) |
a78b0504 BS |
79 | { |
80 | if (src == dst) { | |
81 | return 0; | |
82 | } else if (src < dst) { | |
83 | return 1; | |
84 | } else { | |
85 | return 2; | |
86 | } | |
87 | } | |
88 | ||
443aaeb8 | 89 | static uint32_t cc_calc_tm_32(uint32_t val, uint32_t mask) |
a78b0504 | 90 | { |
00d2dc19 | 91 | uint32_t r = val & mask; |
a78b0504 | 92 | |
00d2dc19 | 93 | if (r == 0) { |
a78b0504 BS |
94 | return 0; |
95 | } else if (r == mask) { | |
96 | return 3; | |
97 | } else { | |
98 | return 1; | |
99 | } | |
100 | } | |
101 | ||
443aaeb8 | 102 | static uint32_t cc_calc_tm_64(uint64_t val, uint64_t mask) |
a78b0504 | 103 | { |
00d2dc19 | 104 | uint64_t r = val & mask; |
a78b0504 | 105 | |
00d2dc19 | 106 | if (r == 0) { |
a78b0504 BS |
107 | return 0; |
108 | } else if (r == mask) { | |
109 | return 3; | |
110 | } else { | |
00d2dc19 RH |
111 | int top = clz64(mask); |
112 | if ((int64_t)(val << top) < 0) { | |
a78b0504 BS |
113 | return 2; |
114 | } else { | |
115 | return 1; | |
116 | } | |
117 | } | |
118 | } | |
119 | ||
443aaeb8 | 120 | static uint32_t cc_calc_nz(uint64_t dst) |
a78b0504 BS |
121 | { |
122 | return !!dst; | |
123 | } | |
124 | ||
443aaeb8 | 125 | static uint32_t cc_calc_add_64(int64_t a1, int64_t a2, int64_t ar) |
a78b0504 BS |
126 | { |
127 | if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) { | |
128 | return 3; /* overflow */ | |
129 | } else { | |
130 | if (ar < 0) { | |
131 | return 1; | |
132 | } else if (ar > 0) { | |
133 | return 2; | |
134 | } else { | |
135 | return 0; | |
136 | } | |
137 | } | |
138 | } | |
139 | ||
443aaeb8 | 140 | static uint32_t cc_calc_addu_64(uint64_t a1, uint64_t a2, uint64_t ar) |
a78b0504 | 141 | { |
4e4bb438 RH |
142 | return (ar != 0) + 2 * (ar < a1); |
143 | } | |
144 | ||
443aaeb8 | 145 | static uint32_t cc_calc_addc_64(uint64_t a1, uint64_t a2, uint64_t ar) |
4e4bb438 RH |
146 | { |
147 | /* Recover a2 + carry_in. */ | |
148 | uint64_t a2c = ar - a1; | |
149 | /* Check for a2+carry_in overflow, then a1+a2c overflow. */ | |
150 | int carry_out = (a2c < a2) || (ar < a1); | |
151 | ||
152 | return (ar != 0) + 2 * carry_out; | |
a78b0504 BS |
153 | } |
154 | ||
443aaeb8 | 155 | static uint32_t cc_calc_sub_64(int64_t a1, int64_t a2, int64_t ar) |
a78b0504 BS |
156 | { |
157 | if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) { | |
158 | return 3; /* overflow */ | |
159 | } else { | |
160 | if (ar < 0) { | |
161 | return 1; | |
162 | } else if (ar > 0) { | |
163 | return 2; | |
164 | } else { | |
165 | return 0; | |
166 | } | |
167 | } | |
168 | } | |
169 | ||
443aaeb8 | 170 | static uint32_t cc_calc_subu_64(uint64_t a1, uint64_t a2, uint64_t ar) |
a78b0504 BS |
171 | { |
172 | if (ar == 0) { | |
173 | return 2; | |
174 | } else { | |
175 | if (a2 > a1) { | |
176 | return 1; | |
177 | } else { | |
178 | return 3; | |
179 | } | |
180 | } | |
181 | } | |
182 | ||
443aaeb8 | 183 | static uint32_t cc_calc_subb_64(uint64_t a1, uint64_t a2, uint64_t ar) |
4e4bb438 | 184 | { |
4e4bb438 RH |
185 | int borrow_out; |
186 | ||
9ef14736 TG |
187 | if (ar != a1 - a2) { /* difference means borrow-in */ |
188 | borrow_out = (a2 >= a1); | |
4e4bb438 | 189 | } else { |
4e4bb438 RH |
190 | borrow_out = (a2 > a1); |
191 | } | |
192 | ||
193 | return (ar != 0) + 2 * !borrow_out; | |
194 | } | |
195 | ||
443aaeb8 | 196 | static uint32_t cc_calc_abs_64(int64_t dst) |
a78b0504 BS |
197 | { |
198 | if ((uint64_t)dst == 0x8000000000000000ULL) { | |
199 | return 3; | |
200 | } else if (dst) { | |
2aaa1940 | 201 | return 2; |
a78b0504 BS |
202 | } else { |
203 | return 0; | |
204 | } | |
205 | } | |
206 | ||
443aaeb8 | 207 | static uint32_t cc_calc_nabs_64(int64_t dst) |
a78b0504 BS |
208 | { |
209 | return !!dst; | |
210 | } | |
211 | ||
443aaeb8 | 212 | static uint32_t cc_calc_comp_64(int64_t dst) |
a78b0504 BS |
213 | { |
214 | if ((uint64_t)dst == 0x8000000000000000ULL) { | |
215 | return 3; | |
216 | } else if (dst < 0) { | |
217 | return 1; | |
218 | } else if (dst > 0) { | |
219 | return 2; | |
220 | } else { | |
221 | return 0; | |
222 | } | |
223 | } | |
224 | ||
225 | ||
443aaeb8 | 226 | static uint32_t cc_calc_add_32(int32_t a1, int32_t a2, int32_t ar) |
a78b0504 BS |
227 | { |
228 | if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) { | |
229 | return 3; /* overflow */ | |
230 | } else { | |
231 | if (ar < 0) { | |
232 | return 1; | |
233 | } else if (ar > 0) { | |
234 | return 2; | |
235 | } else { | |
236 | return 0; | |
237 | } | |
238 | } | |
239 | } | |
240 | ||
443aaeb8 | 241 | static uint32_t cc_calc_addu_32(uint32_t a1, uint32_t a2, uint32_t ar) |
a78b0504 | 242 | { |
4e4bb438 RH |
243 | return (ar != 0) + 2 * (ar < a1); |
244 | } | |
245 | ||
443aaeb8 | 246 | static uint32_t cc_calc_addc_32(uint32_t a1, uint32_t a2, uint32_t ar) |
4e4bb438 RH |
247 | { |
248 | /* Recover a2 + carry_in. */ | |
249 | uint32_t a2c = ar - a1; | |
250 | /* Check for a2+carry_in overflow, then a1+a2c overflow. */ | |
251 | int carry_out = (a2c < a2) || (ar < a1); | |
252 | ||
253 | return (ar != 0) + 2 * carry_out; | |
a78b0504 BS |
254 | } |
255 | ||
443aaeb8 | 256 | static uint32_t cc_calc_sub_32(int32_t a1, int32_t a2, int32_t ar) |
a78b0504 BS |
257 | { |
258 | if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) { | |
259 | return 3; /* overflow */ | |
260 | } else { | |
261 | if (ar < 0) { | |
262 | return 1; | |
263 | } else if (ar > 0) { | |
264 | return 2; | |
265 | } else { | |
266 | return 0; | |
267 | } | |
268 | } | |
269 | } | |
270 | ||
443aaeb8 | 271 | static uint32_t cc_calc_subu_32(uint32_t a1, uint32_t a2, uint32_t ar) |
a78b0504 BS |
272 | { |
273 | if (ar == 0) { | |
274 | return 2; | |
275 | } else { | |
276 | if (a2 > a1) { | |
277 | return 1; | |
278 | } else { | |
279 | return 3; | |
280 | } | |
281 | } | |
282 | } | |
283 | ||
443aaeb8 | 284 | static uint32_t cc_calc_subb_32(uint32_t a1, uint32_t a2, uint32_t ar) |
4e4bb438 | 285 | { |
4e4bb438 RH |
286 | int borrow_out; |
287 | ||
9ef14736 TG |
288 | if (ar != a1 - a2) { /* difference means borrow-in */ |
289 | borrow_out = (a2 >= a1); | |
4e4bb438 | 290 | } else { |
4e4bb438 RH |
291 | borrow_out = (a2 > a1); |
292 | } | |
293 | ||
294 | return (ar != 0) + 2 * !borrow_out; | |
295 | } | |
296 | ||
443aaeb8 | 297 | static uint32_t cc_calc_abs_32(int32_t dst) |
a78b0504 BS |
298 | { |
299 | if ((uint32_t)dst == 0x80000000UL) { | |
300 | return 3; | |
301 | } else if (dst) { | |
2aaa1940 | 302 | return 2; |
a78b0504 BS |
303 | } else { |
304 | return 0; | |
305 | } | |
306 | } | |
307 | ||
443aaeb8 | 308 | static uint32_t cc_calc_nabs_32(int32_t dst) |
a78b0504 BS |
309 | { |
310 | return !!dst; | |
311 | } | |
312 | ||
443aaeb8 | 313 | static uint32_t cc_calc_comp_32(int32_t dst) |
a78b0504 BS |
314 | { |
315 | if ((uint32_t)dst == 0x80000000UL) { | |
316 | return 3; | |
317 | } else if (dst < 0) { | |
318 | return 1; | |
319 | } else if (dst > 0) { | |
320 | return 2; | |
321 | } else { | |
322 | return 0; | |
323 | } | |
324 | } | |
325 | ||
326 | /* calculate condition code for insert character under mask insn */ | |
58a9e35b | 327 | static uint32_t cc_calc_icm(uint64_t mask, uint64_t val) |
a78b0504 | 328 | { |
58a9e35b RH |
329 | if ((val & mask) == 0) { |
330 | return 0; | |
331 | } else { | |
332 | int top = clz64(mask); | |
333 | if ((int64_t)(val << top) < 0) { | |
a78b0504 BS |
334 | return 1; |
335 | } else { | |
336 | return 2; | |
337 | } | |
338 | } | |
a78b0504 BS |
339 | } |
340 | ||
cbe24bfa | 341 | static uint32_t cc_calc_sla_32(uint32_t src, int shift) |
a78b0504 | 342 | { |
cbe24bfa RH |
343 | uint32_t mask = ((1U << shift) - 1U) << (32 - shift); |
344 | uint32_t sign = 1U << 31; | |
345 | uint32_t match; | |
346 | int32_t r; | |
a78b0504 | 347 | |
cbe24bfa RH |
348 | /* Check if the sign bit stays the same. */ |
349 | if (src & sign) { | |
a78b0504 BS |
350 | match = mask; |
351 | } else { | |
352 | match = 0; | |
353 | } | |
a78b0504 | 354 | if ((src & mask) != match) { |
cbe24bfa | 355 | /* Overflow. */ |
a78b0504 BS |
356 | return 3; |
357 | } | |
358 | ||
cbe24bfa RH |
359 | r = ((src << shift) & ~sign) | (src & sign); |
360 | if (r == 0) { | |
a78b0504 | 361 | return 0; |
cbe24bfa | 362 | } else if (r < 0) { |
a78b0504 BS |
363 | return 1; |
364 | } | |
a78b0504 BS |
365 | return 2; |
366 | } | |
367 | ||
cbe24bfa RH |
368 | static uint32_t cc_calc_sla_64(uint64_t src, int shift) |
369 | { | |
370 | uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift); | |
371 | uint64_t sign = 1ULL << 63; | |
372 | uint64_t match; | |
373 | int64_t r; | |
374 | ||
375 | /* Check if the sign bit stays the same. */ | |
376 | if (src & sign) { | |
377 | match = mask; | |
378 | } else { | |
379 | match = 0; | |
380 | } | |
381 | if ((src & mask) != match) { | |
382 | /* Overflow. */ | |
383 | return 3; | |
384 | } | |
385 | ||
386 | r = ((src << shift) & ~sign) | (src & sign); | |
387 | if (r == 0) { | |
388 | return 0; | |
389 | } else if (r < 0) { | |
390 | return 1; | |
391 | } | |
392 | return 2; | |
393 | } | |
a78b0504 | 394 | |
102bf2c6 RH |
395 | static uint32_t cc_calc_flogr(uint64_t dst) |
396 | { | |
397 | return dst ? 2 : 0; | |
398 | } | |
399 | ||
443aaeb8 | 400 | static uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op, |
a78b0504 BS |
401 | uint64_t src, uint64_t dst, uint64_t vr) |
402 | { | |
a47dddd7 | 403 | S390CPU *cpu = s390_env_get_cpu(env); |
a78b0504 BS |
404 | uint32_t r = 0; |
405 | ||
406 | switch (cc_op) { | |
407 | case CC_OP_CONST0: | |
408 | case CC_OP_CONST1: | |
409 | case CC_OP_CONST2: | |
410 | case CC_OP_CONST3: | |
411 | /* cc_op value _is_ cc */ | |
412 | r = cc_op; | |
413 | break; | |
414 | case CC_OP_LTGT0_32: | |
443aaeb8 | 415 | r = cc_calc_ltgt0_32(dst); |
a78b0504 BS |
416 | break; |
417 | case CC_OP_LTGT0_64: | |
443aaeb8 | 418 | r = cc_calc_ltgt0_64(dst); |
a78b0504 BS |
419 | break; |
420 | case CC_OP_LTGT_32: | |
443aaeb8 | 421 | r = cc_calc_ltgt_32(src, dst); |
a78b0504 BS |
422 | break; |
423 | case CC_OP_LTGT_64: | |
443aaeb8 | 424 | r = cc_calc_ltgt_64(src, dst); |
a78b0504 BS |
425 | break; |
426 | case CC_OP_LTUGTU_32: | |
443aaeb8 | 427 | r = cc_calc_ltugtu_32(src, dst); |
a78b0504 BS |
428 | break; |
429 | case CC_OP_LTUGTU_64: | |
443aaeb8 | 430 | r = cc_calc_ltugtu_64(src, dst); |
a78b0504 BS |
431 | break; |
432 | case CC_OP_TM_32: | |
443aaeb8 | 433 | r = cc_calc_tm_32(src, dst); |
a78b0504 BS |
434 | break; |
435 | case CC_OP_TM_64: | |
443aaeb8 | 436 | r = cc_calc_tm_64(src, dst); |
a78b0504 BS |
437 | break; |
438 | case CC_OP_NZ: | |
443aaeb8 | 439 | r = cc_calc_nz(dst); |
a78b0504 BS |
440 | break; |
441 | case CC_OP_ADD_64: | |
443aaeb8 | 442 | r = cc_calc_add_64(src, dst, vr); |
a78b0504 BS |
443 | break; |
444 | case CC_OP_ADDU_64: | |
443aaeb8 | 445 | r = cc_calc_addu_64(src, dst, vr); |
a78b0504 | 446 | break; |
4e4bb438 | 447 | case CC_OP_ADDC_64: |
443aaeb8 | 448 | r = cc_calc_addc_64(src, dst, vr); |
4e4bb438 | 449 | break; |
a78b0504 | 450 | case CC_OP_SUB_64: |
443aaeb8 | 451 | r = cc_calc_sub_64(src, dst, vr); |
a78b0504 BS |
452 | break; |
453 | case CC_OP_SUBU_64: | |
443aaeb8 | 454 | r = cc_calc_subu_64(src, dst, vr); |
a78b0504 | 455 | break; |
4e4bb438 | 456 | case CC_OP_SUBB_64: |
443aaeb8 | 457 | r = cc_calc_subb_64(src, dst, vr); |
4e4bb438 | 458 | break; |
a78b0504 | 459 | case CC_OP_ABS_64: |
443aaeb8 | 460 | r = cc_calc_abs_64(dst); |
a78b0504 BS |
461 | break; |
462 | case CC_OP_NABS_64: | |
443aaeb8 | 463 | r = cc_calc_nabs_64(dst); |
a78b0504 BS |
464 | break; |
465 | case CC_OP_COMP_64: | |
443aaeb8 | 466 | r = cc_calc_comp_64(dst); |
a78b0504 BS |
467 | break; |
468 | ||
469 | case CC_OP_ADD_32: | |
443aaeb8 | 470 | r = cc_calc_add_32(src, dst, vr); |
a78b0504 BS |
471 | break; |
472 | case CC_OP_ADDU_32: | |
443aaeb8 | 473 | r = cc_calc_addu_32(src, dst, vr); |
a78b0504 | 474 | break; |
4e4bb438 | 475 | case CC_OP_ADDC_32: |
443aaeb8 | 476 | r = cc_calc_addc_32(src, dst, vr); |
4e4bb438 | 477 | break; |
a78b0504 | 478 | case CC_OP_SUB_32: |
443aaeb8 | 479 | r = cc_calc_sub_32(src, dst, vr); |
a78b0504 BS |
480 | break; |
481 | case CC_OP_SUBU_32: | |
443aaeb8 | 482 | r = cc_calc_subu_32(src, dst, vr); |
a78b0504 | 483 | break; |
4e4bb438 | 484 | case CC_OP_SUBB_32: |
443aaeb8 | 485 | r = cc_calc_subb_32(src, dst, vr); |
4e4bb438 | 486 | break; |
a78b0504 | 487 | case CC_OP_ABS_32: |
443aaeb8 | 488 | r = cc_calc_abs_32(dst); |
a78b0504 BS |
489 | break; |
490 | case CC_OP_NABS_32: | |
443aaeb8 | 491 | r = cc_calc_nabs_32(dst); |
a78b0504 BS |
492 | break; |
493 | case CC_OP_COMP_32: | |
443aaeb8 | 494 | r = cc_calc_comp_32(dst); |
a78b0504 BS |
495 | break; |
496 | ||
497 | case CC_OP_ICM: | |
58a9e35b | 498 | r = cc_calc_icm(src, dst); |
a78b0504 | 499 | break; |
cbe24bfa RH |
500 | case CC_OP_SLA_32: |
501 | r = cc_calc_sla_32(src, dst); | |
502 | break; | |
503 | case CC_OP_SLA_64: | |
504 | r = cc_calc_sla_64(src, dst); | |
a78b0504 | 505 | break; |
102bf2c6 RH |
506 | case CC_OP_FLOGR: |
507 | r = cc_calc_flogr(dst); | |
508 | break; | |
a78b0504 | 509 | |
a78b0504 BS |
510 | case CC_OP_NZ_F32: |
511 | r = set_cc_nz_f32(dst); | |
512 | break; | |
513 | case CC_OP_NZ_F64: | |
514 | r = set_cc_nz_f64(dst); | |
515 | break; | |
587626f8 RH |
516 | case CC_OP_NZ_F128: |
517 | r = set_cc_nz_f128(make_float128(src, dst)); | |
518 | break; | |
a78b0504 BS |
519 | |
520 | default: | |
a47dddd7 | 521 | cpu_abort(CPU(cpu), "Unknown CC operation: %s\n", cc_name(cc_op)); |
a78b0504 BS |
522 | } |
523 | ||
524 | HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__, | |
525 | cc_name(cc_op), src, dst, vr, r); | |
526 | return r; | |
527 | } | |
528 | ||
529 | uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst, | |
530 | uint64_t vr) | |
531 | { | |
532 | return do_calc_cc(env, cc_op, src, dst, vr); | |
533 | } | |
534 | ||
932385a3 BS |
535 | uint32_t HELPER(calc_cc)(CPUS390XState *env, uint32_t cc_op, uint64_t src, |
536 | uint64_t dst, uint64_t vr) | |
a78b0504 BS |
537 | { |
538 | return do_calc_cc(env, cc_op, src, dst, vr); | |
539 | } | |
540 | ||
a78b0504 | 541 | #ifndef CONFIG_USER_ONLY |
932385a3 | 542 | void HELPER(load_psw)(CPUS390XState *env, uint64_t mask, uint64_t addr) |
a78b0504 BS |
543 | { |
544 | load_psw(env, mask, addr); | |
5638d180 | 545 | cpu_loop_exit(CPU(s390_env_get_cpu(env))); |
a78b0504 BS |
546 | } |
547 | ||
932385a3 | 548 | void HELPER(sacf)(CPUS390XState *env, uint64_t a1) |
a78b0504 BS |
549 | { |
550 | HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1); | |
551 | ||
552 | switch (a1 & 0xf00) { | |
553 | case 0x000: | |
554 | env->psw.mask &= ~PSW_MASK_ASC; | |
555 | env->psw.mask |= PSW_ASC_PRIMARY; | |
556 | break; | |
557 | case 0x100: | |
558 | env->psw.mask &= ~PSW_MASK_ASC; | |
559 | env->psw.mask |= PSW_ASC_SECONDARY; | |
560 | break; | |
561 | case 0x300: | |
562 | env->psw.mask &= ~PSW_MASK_ASC; | |
563 | env->psw.mask |= PSW_ASC_HOME; | |
564 | break; | |
565 | default: | |
aafcf80e | 566 | HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); |
a78b0504 BS |
567 | program_interrupt(env, PGM_SPECIFICATION, 2); |
568 | break; | |
569 | } | |
570 | } | |
571 | #endif |