Commit | Line | Data |
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05330448 AL |
1 | /* |
2 | * QEMU KVM support | |
3 | * | |
4 | * Copyright IBM, Corp. 2008 | |
5 | * | |
6 | * Authors: | |
7 | * Anthony Liguori <aliguori@us.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | * | |
12 | */ | |
13 | ||
14 | #ifndef QEMU_KVM_H | |
15 | #define QEMU_KVM_H | |
16 | ||
1de7afc9 | 17 | #include "qemu/queue.h" |
504134d2 | 18 | #include "qom/cpu.h" |
4c663752 | 19 | #include "exec/memattrs.h" |
197e3524 | 20 | #include "hw/irq.h" |
05330448 | 21 | |
ca821806 MT |
22 | #ifdef CONFIG_KVM |
23 | #include <linux/kvm.h> | |
bc74b7db | 24 | #include <linux/kvm_para.h> |
9ca58923 EH |
25 | #else |
26 | /* These constants must never be used at runtime if kvm_enabled() is false. | |
27 | * They exist so we don't need #ifdefs around KVM-specific code that already | |
28 | * checks kvm_enabled() properly. | |
29 | */ | |
30 | #define KVM_CPUID_SIGNATURE 0 | |
31 | #define KVM_CPUID_FEATURES 0 | |
32 | #define KVM_FEATURE_CLOCKSOURCE 0 | |
33 | #define KVM_FEATURE_NOP_IO_DELAY 0 | |
34 | #define KVM_FEATURE_MMU_OP 0 | |
35 | #define KVM_FEATURE_CLOCKSOURCE2 0 | |
36 | #define KVM_FEATURE_ASYNC_PF 0 | |
37 | #define KVM_FEATURE_STEAL_TIME 0 | |
38 | #define KVM_FEATURE_PV_EOI 0 | |
d61a23ba | 39 | #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 0 |
ca821806 | 40 | #endif |
05330448 | 41 | |
d5286af5 | 42 | extern bool kvm_allowed; |
3d4b2649 | 43 | extern bool kvm_kernel_irqchip; |
32c18a2d | 44 | extern bool kvm_split_irqchip; |
7ae26bd4 | 45 | extern bool kvm_async_interrupts_allowed; |
215e79c0 | 46 | extern bool kvm_halt_in_kernel_allowed; |
69e03ae6 | 47 | extern bool kvm_eventfds_allowed; |
cc7e0ddf | 48 | extern bool kvm_irqfds_allowed; |
f41389ae | 49 | extern bool kvm_resamplefds_allowed; |
614e41bc | 50 | extern bool kvm_msi_via_irqfd_allowed; |
f3e1bed8 | 51 | extern bool kvm_gsi_routing_allowed; |
76fe21de | 52 | extern bool kvm_gsi_direct_mapping; |
df9c8b75 | 53 | extern bool kvm_readonly_mem_allowed; |
50bf31b9 | 54 | extern bool kvm_direct_msi_allowed; |
35108223 | 55 | extern bool kvm_ioeventfd_any_length_allowed; |
98c8573e PB |
56 | |
57 | #if defined CONFIG_KVM || !defined NEED_CPU_H | |
3d4b2649 | 58 | #define kvm_enabled() (kvm_allowed) |
96fda35a PM |
59 | /** |
60 | * kvm_irqchip_in_kernel: | |
61 | * | |
62 | * Returns: true if the user asked us to create an in-kernel | |
63 | * irqchip via the "kernel_irqchip=on" machine option. | |
64 | * What this actually means is architecture and machine model | |
65 | * specific: on PC, for instance, it means that the LAPIC, | |
66 | * IOAPIC and PIT are all in kernel. This function should never | |
67 | * be used from generic target-independent code: use one of the | |
68 | * following functions or some other specific check instead. | |
69 | */ | |
3d4b2649 | 70 | #define kvm_irqchip_in_kernel() (kvm_kernel_irqchip) |
7ae26bd4 | 71 | |
32c18a2d MG |
72 | /** |
73 | * kvm_irqchip_is_split: | |
74 | * | |
75 | * Returns: true if the user asked us to split the irqchip | |
76 | * implementation between user and kernel space. The details are | |
77 | * architecture and machine specific. On PC, it means that the PIC, | |
78 | * IOAPIC, and PIT are in user space while the LAPIC is in the kernel. | |
79 | */ | |
80 | #define kvm_irqchip_is_split() (kvm_split_irqchip) | |
81 | ||
7ae26bd4 PM |
82 | /** |
83 | * kvm_async_interrupts_enabled: | |
84 | * | |
85 | * Returns: true if we can deliver interrupts to KVM | |
86 | * asynchronously (ie by ioctl from any thread at any time) | |
87 | * rather than having to do interrupt delivery synchronously | |
88 | * (where the vcpu must be stopped at a suitable point first). | |
89 | */ | |
90 | #define kvm_async_interrupts_enabled() (kvm_async_interrupts_allowed) | |
91 | ||
215e79c0 AG |
92 | /** |
93 | * kvm_halt_in_kernel | |
94 | * | |
95 | * Returns: true if halted cpus should still get a KVM_RUN ioctl to run | |
96 | * inside of kernel space. This only works if MP state is implemented. | |
97 | */ | |
98 | #define kvm_halt_in_kernel() (kvm_halt_in_kernel_allowed) | |
99 | ||
69e03ae6 NN |
100 | /** |
101 | * kvm_eventfds_enabled: | |
102 | * | |
103 | * Returns: true if we can use eventfds to receive notifications | |
104 | * from a KVM CPU (ie the kernel supports eventds and we are running | |
105 | * with a configuration where it is meaningful to use them). | |
106 | */ | |
107 | #define kvm_eventfds_enabled() (kvm_eventfds_allowed) | |
108 | ||
cc7e0ddf PM |
109 | /** |
110 | * kvm_irqfds_enabled: | |
111 | * | |
112 | * Returns: true if we can use irqfds to inject interrupts into | |
113 | * a KVM CPU (ie the kernel supports irqfds and we are running | |
114 | * with a configuration where it is meaningful to use them). | |
115 | */ | |
116 | #define kvm_irqfds_enabled() (kvm_irqfds_allowed) | |
117 | ||
f41389ae EA |
118 | /** |
119 | * kvm_resamplefds_enabled: | |
120 | * | |
121 | * Returns: true if we can use resamplefds to inject interrupts into | |
122 | * a KVM CPU (ie the kernel supports resamplefds and we are running | |
123 | * with a configuration where it is meaningful to use them). | |
124 | */ | |
125 | #define kvm_resamplefds_enabled() (kvm_resamplefds_allowed) | |
126 | ||
614e41bc PM |
127 | /** |
128 | * kvm_msi_via_irqfd_enabled: | |
129 | * | |
130 | * Returns: true if we can route a PCI MSI (Message Signaled Interrupt) | |
131 | * to a KVM CPU via an irqfd. This requires that the kernel supports | |
132 | * this and that we're running in a configuration that permits it. | |
133 | */ | |
134 | #define kvm_msi_via_irqfd_enabled() (kvm_msi_via_irqfd_allowed) | |
135 | ||
f3e1bed8 PM |
136 | /** |
137 | * kvm_gsi_routing_enabled: | |
138 | * | |
139 | * Returns: true if GSI routing is enabled (ie the kernel supports | |
140 | * it and we're running in a configuration that permits it). | |
141 | */ | |
142 | #define kvm_gsi_routing_enabled() (kvm_gsi_routing_allowed) | |
143 | ||
76fe21de AK |
144 | /** |
145 | * kvm_gsi_direct_mapping: | |
146 | * | |
147 | * Returns: true if GSI direct mapping is enabled. | |
148 | */ | |
149 | #define kvm_gsi_direct_mapping() (kvm_gsi_direct_mapping) | |
150 | ||
df9c8b75 JJ |
151 | /** |
152 | * kvm_readonly_mem_enabled: | |
153 | * | |
154 | * Returns: true if KVM readonly memory is enabled (ie the kernel | |
155 | * supports it and we're running in a configuration that permits it). | |
156 | */ | |
157 | #define kvm_readonly_mem_enabled() (kvm_readonly_mem_allowed) | |
158 | ||
50bf31b9 PF |
159 | /** |
160 | * kvm_direct_msi_enabled: | |
161 | * | |
162 | * Returns: true if KVM allows direct MSI injection. | |
163 | */ | |
164 | #define kvm_direct_msi_enabled() (kvm_direct_msi_allowed) | |
165 | ||
35108223 JW |
166 | /** |
167 | * kvm_ioeventfd_any_length_enabled: | |
168 | * Returns: true if KVM allows any length io eventfd. | |
169 | */ | |
170 | #define kvm_ioeventfd_any_length_enabled() (kvm_ioeventfd_any_length_allowed) | |
171 | ||
05330448 | 172 | #else |
3d4b2649 JK |
173 | #define kvm_enabled() (0) |
174 | #define kvm_irqchip_in_kernel() (false) | |
15eafc2e | 175 | #define kvm_irqchip_is_split() (false) |
7ae26bd4 | 176 | #define kvm_async_interrupts_enabled() (false) |
215e79c0 | 177 | #define kvm_halt_in_kernel() (false) |
69e03ae6 | 178 | #define kvm_eventfds_enabled() (false) |
cc7e0ddf | 179 | #define kvm_irqfds_enabled() (false) |
879904e8 | 180 | #define kvm_resamplefds_enabled() (false) |
614e41bc | 181 | #define kvm_msi_via_irqfd_enabled() (false) |
f3e1bed8 | 182 | #define kvm_gsi_routing_allowed() (false) |
76fe21de | 183 | #define kvm_gsi_direct_mapping() (false) |
df9c8b75 | 184 | #define kvm_readonly_mem_enabled() (false) |
50bf31b9 | 185 | #define kvm_direct_msi_enabled() (false) |
35108223 | 186 | #define kvm_ioeventfd_any_length_enabled() (false) |
05330448 AL |
187 | #endif |
188 | ||
189 | struct kvm_run; | |
680c1c6f | 190 | struct kvm_lapic_state; |
9e03a040 | 191 | struct kvm_irq_routing_entry; |
05330448 | 192 | |
94a8d39a JK |
193 | typedef struct KVMCapabilityInfo { |
194 | const char *name; | |
195 | int value; | |
196 | } KVMCapabilityInfo; | |
197 | ||
198 | #define KVM_CAP_INFO(CAP) { "KVM_CAP_" stringify(CAP), KVM_CAP_##CAP } | |
199 | #define KVM_CAP_LAST_INFO { NULL, 0 } | |
200 | ||
92b4e489 JK |
201 | struct KVMState; |
202 | typedef struct KVMState KVMState; | |
203 | extern KVMState *kvm_state; | |
204 | ||
05330448 AL |
205 | /* external API */ |
206 | ||
b8865591 | 207 | bool kvm_has_free_slot(MachineState *ms); |
00a1555e PB |
208 | int kvm_has_sync_mmu(void); |
209 | int kvm_has_vcpu_events(void); | |
210 | int kvm_has_robust_singlestep(void); | |
ff44f1a3 | 211 | int kvm_has_debugregs(void); |
8a7c7393 | 212 | int kvm_has_pit_state2(void); |
d2f2b8a7 | 213 | int kvm_has_many_ioeventfds(void); |
84b058d7 | 214 | int kvm_has_gsi_routing(void); |
3ab73842 | 215 | int kvm_has_intx_set_mask(void); |
00a1555e | 216 | |
504134d2 | 217 | int kvm_init_vcpu(CPUState *cpu); |
1458c363 | 218 | int kvm_cpu_exec(CPUState *cpu); |
4c055ab5 | 219 | int kvm_destroy_vcpu(CPUState *cpu); |
05330448 | 220 | |
504134d2 | 221 | #ifdef NEED_CPU_H |
33c11879 | 222 | #include "cpu.h" |
05330448 | 223 | |
c4cfef5e | 224 | void kvm_setup_guest_memory(void *start, size_t size); |
62a2744c | 225 | void kvm_flush_coalesced_mmio_buffer(void); |
f65ed4c1 | 226 | |
62278814 | 227 | int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr, |
e22a25c9 | 228 | target_ulong len, int type); |
62278814 | 229 | int kvm_remove_breakpoint(CPUState *cpu, target_ulong addr, |
e22a25c9 | 230 | target_ulong len, int type); |
1d5791f4 | 231 | void kvm_remove_all_breakpoints(CPUState *cpu); |
38e478ec | 232 | int kvm_update_guest_debug(CPUState *cpu, unsigned long reinject_trap); |
20c20526 | 233 | #ifndef _WIN32 |
491d6e80 | 234 | int kvm_set_signal_mask(CPUState *cpu, const sigset_t *sigset); |
20c20526 | 235 | #endif |
e22a25c9 | 236 | |
290adf38 | 237 | int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); |
a1b87fe0 JK |
238 | int kvm_on_sigbus(int code, void *addr); |
239 | ||
88401cbc PB |
240 | /* interface with exec.c */ |
241 | ||
242 | void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align)); | |
243 | ||
05330448 AL |
244 | /* internal API */ |
245 | ||
984b5181 | 246 | int kvm_ioctl(KVMState *s, int type, ...); |
05330448 | 247 | |
984b5181 | 248 | int kvm_vm_ioctl(KVMState *s, int type, ...); |
05330448 | 249 | |
1bc22652 | 250 | int kvm_vcpu_ioctl(CPUState *cpu, int type, ...); |
05330448 | 251 | |
0a6a7cca CD |
252 | /** |
253 | * kvm_device_ioctl - call an ioctl on a kvm device | |
254 | * @fd: The KVM device file descriptor as returned from KVM_CREATE_DEVICE | |
255 | * @type: The device-ctrl ioctl number | |
256 | * | |
257 | * Returns: -errno on error, nonnegative on success | |
258 | */ | |
259 | int kvm_device_ioctl(int fd, int type, ...); | |
260 | ||
d0a073a1 DD |
261 | /** |
262 | * kvm_vm_check_attr - check for existence of a specific vm attribute | |
263 | * @s: The KVMState pointer | |
264 | * @group: the group | |
265 | * @attr: the attribute of that group to query for | |
266 | * | |
267 | * Returns: 1 if the attribute exists | |
268 | * 0 if the attribute either does not exist or if the vm device | |
269 | * interface is unavailable | |
270 | */ | |
271 | int kvm_vm_check_attr(KVMState *s, uint32_t group, uint64_t attr); | |
272 | ||
4b3cfe72 PF |
273 | /** |
274 | * kvm_device_check_attr - check for existence of a specific device attribute | |
275 | * @fd: The device file descriptor | |
276 | * @group: the group | |
277 | * @attr: the attribute of that group to query for | |
278 | * | |
279 | * Returns: 1 if the attribute exists | |
280 | * 0 if the attribute either does not exist or if the vm device | |
281 | * interface is unavailable | |
282 | */ | |
283 | int kvm_device_check_attr(int fd, uint32_t group, uint64_t attr); | |
284 | ||
285 | /** | |
286 | * kvm_device_access - set or get value of a specific vm attribute | |
287 | * @fd: The device file descriptor | |
288 | * @group: the group | |
289 | * @attr: the attribute of that group to set or get | |
290 | * @val: pointer to a storage area for the value | |
291 | * @write: true for set and false for get operation | |
292 | * | |
293 | * This function is not allowed to fail. Use kvm_device_check_attr() | |
294 | * in order to check for the availability of optional attributes. | |
295 | */ | |
296 | void kvm_device_access(int fd, int group, uint64_t attr, | |
297 | void *val, bool write); | |
298 | ||
0a6a7cca CD |
299 | /** |
300 | * kvm_create_device - create a KVM device for the device control API | |
301 | * @KVMState: The KVMState pointer | |
302 | * @type: The KVM device type (see Documentation/virtual/kvm/devices in the | |
303 | * kernel source) | |
304 | * @test: If true, only test if device can be created, but don't actually | |
305 | * create the device. | |
306 | * | |
307 | * Returns: -errno on error, nonnegative on success: @test ? 0 : device fd; | |
308 | */ | |
309 | int kvm_create_device(KVMState *s, uint64_t type, bool test); | |
310 | ||
29039acf PX |
311 | /** |
312 | * kvm_device_supported - probe whether KVM supports specific device | |
313 | * | |
314 | * @vmfd: The fd handler for VM | |
315 | * @type: type of device | |
316 | * | |
317 | * @return: true if supported, otherwise false. | |
318 | */ | |
319 | bool kvm_device_supported(int vmfd, uint64_t type); | |
0a6a7cca | 320 | |
05330448 AL |
321 | /* Arch specific hooks */ |
322 | ||
94a8d39a JK |
323 | extern const KVMCapabilityInfo kvm_arch_required_capabilities[]; |
324 | ||
20d695a9 | 325 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run); |
4c663752 | 326 | MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run); |
05330448 | 327 | |
20d695a9 | 328 | int kvm_arch_handle_exit(CPUState *cpu, struct kvm_run *run); |
05330448 | 329 | |
15eafc2e PB |
330 | int kvm_arch_handle_ioapic_eoi(CPUState *cpu, struct kvm_run *run); |
331 | ||
20d695a9 | 332 | int kvm_arch_process_async_events(CPUState *cpu); |
0af691d7 | 333 | |
20d695a9 | 334 | int kvm_arch_get_registers(CPUState *cpu); |
05330448 | 335 | |
ea375f9a JK |
336 | /* state subset only touched by the VCPU itself during runtime */ |
337 | #define KVM_PUT_RUNTIME_STATE 1 | |
338 | /* state subset modified during VCPU reset */ | |
339 | #define KVM_PUT_RESET_STATE 2 | |
340 | /* full state set, modified during initialization or on vmload */ | |
341 | #define KVM_PUT_FULL_STATE 3 | |
342 | ||
20d695a9 | 343 | int kvm_arch_put_registers(CPUState *cpu, int level); |
05330448 | 344 | |
b16565b3 | 345 | int kvm_arch_init(MachineState *ms, KVMState *s); |
05330448 | 346 | |
20d695a9 | 347 | int kvm_arch_init_vcpu(CPUState *cpu); |
05330448 | 348 | |
41264b38 GK |
349 | bool kvm_vcpu_id_is_valid(int vcpu_id); |
350 | ||
b164e48e EH |
351 | /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ |
352 | unsigned long kvm_arch_vcpu_id(CPUState *cpu); | |
353 | ||
20d695a9 | 354 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); |
a1b87fe0 | 355 | int kvm_arch_on_sigbus(int code, void *addr); |
c0532a76 | 356 | |
84b058d7 JK |
357 | void kvm_arch_init_irq_routing(KVMState *s); |
358 | ||
9e03a040 | 359 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 360 | uint64_t address, uint32_t data, PCIDevice *dev); |
9e03a040 | 361 | |
1850b6b7 EA |
362 | int kvm_arch_msi_data_to_gsi(uint32_t data); |
363 | ||
3889c3fa | 364 | int kvm_set_irq(KVMState *s, int irq, int level); |
04fa27f5 | 365 | int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg); |
84b058d7 | 366 | |
1df186df | 367 | void kvm_irqchip_add_irq_route(KVMState *s, int gsi, int irqchip, int pin); |
cb925cf9 | 368 | void kvm_irqchip_commit_routes(KVMState *s); |
84b058d7 | 369 | |
680c1c6f JK |
370 | void kvm_put_apic_state(DeviceState *d, struct kvm_lapic_state *kapic); |
371 | void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic); | |
372 | ||
e22a25c9 AL |
373 | struct kvm_guest_debug; |
374 | struct kvm_debug_exit_arch; | |
375 | ||
376 | struct kvm_sw_breakpoint { | |
377 | target_ulong pc; | |
378 | target_ulong saved_insn; | |
379 | int use_count; | |
72cf2d4f | 380 | QTAILQ_ENTRY(kvm_sw_breakpoint) entry; |
e22a25c9 AL |
381 | }; |
382 | ||
72cf2d4f | 383 | QTAILQ_HEAD(kvm_sw_breakpoint_head, kvm_sw_breakpoint); |
e22a25c9 | 384 | |
a60f24b5 | 385 | struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUState *cpu, |
e22a25c9 AL |
386 | target_ulong pc); |
387 | ||
a60f24b5 | 388 | int kvm_sw_breakpoints_active(CPUState *cpu); |
e22a25c9 | 389 | |
80b7cd73 | 390 | int kvm_arch_insert_sw_breakpoint(CPUState *cpu, |
e22a25c9 | 391 | struct kvm_sw_breakpoint *bp); |
80b7cd73 | 392 | int kvm_arch_remove_sw_breakpoint(CPUState *cpu, |
e22a25c9 AL |
393 | struct kvm_sw_breakpoint *bp); |
394 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, | |
395 | target_ulong len, int type); | |
396 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
397 | target_ulong len, int type); | |
398 | void kvm_arch_remove_all_hw_breakpoints(void); | |
399 | ||
20d695a9 | 400 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg); |
e22a25c9 | 401 | |
20d695a9 | 402 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu); |
4513d923 | 403 | |
ad7b8b33 AL |
404 | int kvm_check_extension(KVMState *s, unsigned int extension); |
405 | ||
7d0a07fa AG |
406 | int kvm_vm_check_extension(KVMState *s, unsigned int extension); |
407 | ||
40f1ee27 CH |
408 | #define kvm_vm_enable_cap(s, capability, cap_flags, ...) \ |
409 | ({ \ | |
410 | struct kvm_enable_cap cap = { \ | |
411 | .cap = capability, \ | |
412 | .flags = cap_flags, \ | |
413 | }; \ | |
414 | uint64_t args_tmp[] = { __VA_ARGS__ }; \ | |
415 | int i; \ | |
61c7bbd2 | 416 | for (i = 0; i < (int)ARRAY_SIZE(args_tmp) && \ |
40f1ee27 CH |
417 | i < ARRAY_SIZE(cap.args); i++) { \ |
418 | cap.args[i] = args_tmp[i]; \ | |
419 | } \ | |
420 | kvm_vm_ioctl(s, KVM_ENABLE_CAP, &cap); \ | |
421 | }) | |
422 | ||
423 | #define kvm_vcpu_enable_cap(cpu, capability, cap_flags, ...) \ | |
424 | ({ \ | |
425 | struct kvm_enable_cap cap = { \ | |
426 | .cap = capability, \ | |
427 | .flags = cap_flags, \ | |
428 | }; \ | |
429 | uint64_t args_tmp[] = { __VA_ARGS__ }; \ | |
430 | int i; \ | |
61c7bbd2 | 431 | for (i = 0; i < (int)ARRAY_SIZE(args_tmp) && \ |
40f1ee27 CH |
432 | i < ARRAY_SIZE(cap.args); i++) { \ |
433 | cap.args[i] = args_tmp[i]; \ | |
434 | } \ | |
435 | kvm_vcpu_ioctl(cpu, KVM_ENABLE_CAP, &cap); \ | |
436 | }) | |
437 | ||
ba9bc59e | 438 | uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function, |
c958a8bd | 439 | uint32_t index, int reg); |
e22a25c9 | 440 | |
aed6efb9 JH |
441 | void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len); |
442 | ||
13eed94e IM |
443 | #if !defined(CONFIG_USER_ONLY) |
444 | int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, | |
445 | hwaddr *phys_addr); | |
446 | #endif | |
447 | ||
448 | #endif /* NEED_CPU_H */ | |
449 | ||
97577fd4 | 450 | void kvm_cpu_synchronize_state(CPUState *cpu); |
13eed94e IM |
451 | void kvm_cpu_synchronize_post_reset(CPUState *cpu); |
452 | void kvm_cpu_synchronize_post_init(CPUState *cpu); | |
453 | ||
97577fd4 JH |
454 | /* generic hooks - to be moved/refactored once there are more users */ |
455 | ||
456 | static inline void cpu_synchronize_state(CPUState *cpu) | |
457 | { | |
458 | if (kvm_enabled()) { | |
459 | kvm_cpu_synchronize_state(cpu); | |
460 | } | |
461 | } | |
462 | ||
3f24a58f | 463 | static inline void cpu_synchronize_post_reset(CPUState *cpu) |
ea375f9a JK |
464 | { |
465 | if (kvm_enabled()) { | |
3f24a58f | 466 | kvm_cpu_synchronize_post_reset(cpu); |
ea375f9a JK |
467 | } |
468 | } | |
469 | ||
3f24a58f | 470 | static inline void cpu_synchronize_post_init(CPUState *cpu) |
ea375f9a JK |
471 | { |
472 | if (kvm_enabled()) { | |
3f24a58f | 473 | kvm_cpu_synchronize_post_init(cpu); |
ea375f9a JK |
474 | } |
475 | } | |
ca821806 | 476 | |
dc9f06ca PF |
477 | int kvm_irqchip_add_msi_route(KVMState *s, MSIMessage msg, PCIDevice *dev); |
478 | int kvm_irqchip_update_msi_route(KVMState *s, int virq, MSIMessage msg, | |
479 | PCIDevice *dev); | |
1e2aa8be | 480 | void kvm_irqchip_release_virq(KVMState *s, int virq); |
39853bbc | 481 | |
d426d9fb | 482 | int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter); |
977a8d9c | 483 | int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t vcpu, uint32_t sint); |
d426d9fb | 484 | |
1c9b71a7 EA |
485 | int kvm_irqchip_add_irqfd_notifier_gsi(KVMState *s, EventNotifier *n, |
486 | EventNotifier *rn, int virq); | |
487 | int kvm_irqchip_remove_irqfd_notifier_gsi(KVMState *s, EventNotifier *n, | |
488 | int virq); | |
197e3524 EA |
489 | int kvm_irqchip_add_irqfd_notifier(KVMState *s, EventNotifier *n, |
490 | EventNotifier *rn, qemu_irq irq); | |
491 | int kvm_irqchip_remove_irqfd_notifier(KVMState *s, EventNotifier *n, | |
492 | qemu_irq irq); | |
493 | void kvm_irqchip_set_qemuirq_gsi(KVMState *s, qemu_irq irq, int gsi); | |
d8ee0384 JB |
494 | void kvm_pc_gsi_handler(void *opaque, int n, int level); |
495 | void kvm_pc_setup_irq_routing(bool pci_enabled); | |
7b774593 | 496 | void kvm_init_irq_routing(KVMState *s); |
d6032e06 CD |
497 | |
498 | /** | |
499 | * kvm_arch_irqchip_create: | |
500 | * @KVMState: The KVMState pointer | |
15eafc2e | 501 | * @MachineState: The MachineState pointer |
d6032e06 CD |
502 | * |
503 | * Allow architectures to create an in-kernel irq chip themselves. | |
504 | * | |
505 | * Returns: < 0: error | |
506 | * 0: irq chip was not created | |
507 | * > 0: irq chip was created | |
508 | */ | |
15eafc2e | 509 | int kvm_arch_irqchip_create(MachineState *ms, KVMState *s); |
ada4135f CH |
510 | |
511 | /** | |
512 | * kvm_set_one_reg - set a register value in KVM via KVM_SET_ONE_REG ioctl | |
513 | * @id: The register ID | |
514 | * @source: The pointer to the value to be set. It must point to a variable | |
515 | * of the correct type/size for the register being accessed. | |
516 | * | |
517 | * Returns: 0 on success, or a negative errno on failure. | |
518 | */ | |
519 | int kvm_set_one_reg(CPUState *cs, uint64_t id, void *source); | |
520 | ||
521 | /** | |
522 | * kvm_get_one_reg - get a register value from KVM via KVM_GET_ONE_REG ioctl | |
523 | * @id: The register ID | |
524 | * @target: The pointer where the value is to be stored. It must point to a | |
525 | * variable of the correct type/size for the register being accessed. | |
526 | * | |
527 | * Returns: 0 on success, or a negative errno on failure. | |
528 | */ | |
529 | int kvm_get_one_reg(CPUState *cs, uint64_t id, void *target); | |
05330448 | 530 | #endif |