[qemu.git] / softmmu_header.h

/*
 *  Software MMU support
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#if DATA_SIZE == 8
#define SUFFIX q
#define USUFFIX q
#define DATA_TYPE uint64_t
#elif DATA_SIZE == 4
#define SUFFIX l
#define USUFFIX l
#define DATA_TYPE uint32_t
#elif DATA_SIZE == 2
#define SUFFIX w
#define USUFFIX uw
#define DATA_TYPE uint16_t
#define DATA_STYPE int16_t
#elif DATA_SIZE == 1
#define SUFFIX b
#define USUFFIX ub
#define DATA_TYPE uint8_t
#define DATA_STYPE int8_t
#else
#error unsupported data size
#endif

#if ACCESS_TYPE < (NB_MMU_MODES)

#define CPU_MMU_INDEX ACCESS_TYPE
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == (NB_MMU_MODES)

#define CPU_MMU_INDEX (cpu_mmu_index(env))
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == (NB_MMU_MODES + 1)

#define CPU_MMU_INDEX (cpu_mmu_index(env))
#define MMUSUFFIX _cmmu

#else
#error invalid ACCESS_TYPE
#endif

#if DATA_SIZE == 8
#define RES_TYPE uint64_t
#else
#define RES_TYPE int
#endif

#if ACCESS_TYPE == (NB_MMU_MODES + 1)
#define ADDR_READ addr_code
#else
#define ADDR_READ addr_read
#endif

DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
                                                         int mmu_idx);
void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int mmu_idx);

#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
    (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU)

static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res;

    asm volatile ("movl %1, %%edx\n"
                  "movl %1, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %1, %%eax\n"
                  "je 1f\n"
                  "movl %6, %%edx\n"
                  "call %7\n"
                  "movl %%eax, %0\n"
                  "jmp 2f\n"
                  "1:\n"
                  "addl 12(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movzbl (%%eax), %0\n"
#elif DATA_SIZE == 2
                  "movzwl (%%eax), %0\n"
#elif DATA_SIZE == 4
                  "movl (%%eax), %0\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : "=r" (res)
                  : "r" (ptr),
                  "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
                  "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
                  "i" (CPU_MMU_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
    return res;
}

#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res;

    asm volatile ("movl %1, %%edx\n"
                  "movl %1, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %1, %%eax\n"
                  "je 1f\n"
                  "movl %6, %%edx\n"
                  "call %7\n"
#if DATA_SIZE == 1
                  "movsbl %%al, %0\n"
#elif DATA_SIZE == 2
                  "movswl %%ax, %0\n"
#else
#error unsupported size
#endif
                  "jmp 2f\n"
                  "1:\n"
                  "addl 12(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movsbl (%%eax), %0\n"
#elif DATA_SIZE == 2
                  "movswl (%%eax), %0\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : "=r" (res)
                  : "r" (ptr),
                  "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
                  "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
                  "i" (CPU_MMU_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
    return res;
}
#endif

static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
    asm volatile ("movl %0, %%edx\n"
                  "movl %0, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %0, %%eax\n"
                  "je 1f\n"
#if DATA_SIZE == 1
                  "movzbl %b1, %%edx\n"
#elif DATA_SIZE == 2
                  "movzwl %w1, %%edx\n"
#elif DATA_SIZE == 4
                  "movl %1, %%edx\n"
#else
#error unsupported size
#endif
                  "movl %6, %%ecx\n"
                  "call %7\n"
                  "jmp 2f\n"
                  "1:\n"
                  "addl 8(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movb %b1, (%%eax)\n"
#elif DATA_SIZE == 2
                  "movw %w1, (%%eax)\n"
#elif DATA_SIZE == 4
                  "movl %1, (%%eax)\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  :
                  : "r" (ptr),
#if DATA_SIZE == 1
                  "q" (v),
#else
                  "r" (v),
#endif
                  "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
                  "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
                  "i" (CPU_MMU_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
}

#else

/* generic load/store macros */

static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int page_index;
    RES_TYPE res;
    target_ulong addr;
    unsigned long physaddr;
    int mmu_idx;

    addr = ptr;
    page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    mmu_idx = CPU_MMU_INDEX;
    if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
    } else {
        physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
        res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
    }
    return res;
}

#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res, page_index;
    target_ulong addr;
    unsigned long physaddr;
    int mmu_idx;

    addr = ptr;
    page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    mmu_idx = CPU_MMU_INDEX;
    if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
    } else {
        physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
        res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
    }
    return res;
}
#endif

#if ACCESS_TYPE != (NB_MMU_MODES + 1)

/* generic store macro */

static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
    int page_index;
    target_ulong addr;
    unsigned long physaddr;
    int mmu_idx;

    addr = ptr;
    page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    mmu_idx = CPU_MMU_INDEX;
    if (__builtin_expect(env->tlb_table[mmu_idx][page_index].addr_write !=
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
    } else {
        physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
        glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
    }
}

#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */

#endif /* !asm */

#if ACCESS_TYPE != (NB_MMU_MODES + 1)

#if DATA_SIZE == 8
static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
{
    union {
        float64 d;
        uint64_t i;
    } u;
    u.i = glue(ldq, MEMSUFFIX)(ptr);
    return u.d;
}

static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
{
    union {
        float64 d;
        uint64_t i;
    } u;
    u.d = v;
    glue(stq, MEMSUFFIX)(ptr, u.i);
}
#endif /* DATA_SIZE == 8 */

#if DATA_SIZE == 4
static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
{
    union {
        float32 f;
        uint32_t i;
    } u;
    u.i = glue(ldl, MEMSUFFIX)(ptr);
    return u.f;
}

static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
{
    union {
        float32 f;
        uint32_t i;
    } u;
    u.f = v;
    glue(stl, MEMSUFFIX)(ptr, u.i);
}
#endif /* DATA_SIZE == 4 */

#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */

#undef RES_TYPE
#undef DATA_TYPE
#undef DATA_STYPE
#undef SUFFIX
#undef USUFFIX
#undef DATA_SIZE
#undef CPU_MMU_INDEX
#undef MMUSUFFIX
#undef ADDR_READ
Commit	Line	Data
b92e5a22 FB	1	/*
b92e5a22 FB	2	* Software MMU support
5fafdf24	3	*
b92e5a22 FB	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#if DATA_SIZE == 8
	21	#define SUFFIX q
61382a50	22	#define USUFFIX q
b92e5a22 FB	23	#define DATA_TYPE uint64_t
	24	#elif DATA_SIZE == 4
	25	#define SUFFIX l
61382a50	26	#define USUFFIX l
b92e5a22 FB	27	#define DATA_TYPE uint32_t
	28	#elif DATA_SIZE == 2
	29	#define SUFFIX w
61382a50	30	#define USUFFIX uw
b92e5a22 FB	31	#define DATA_TYPE uint16_t
	32	#define DATA_STYPE int16_t
	33	#elif DATA_SIZE == 1
	34	#define SUFFIX b
61382a50	35	#define USUFFIX ub
b92e5a22 FB	36	#define DATA_TYPE uint8_t
	37	#define DATA_STYPE int8_t
	38	#else
	39	#error unsupported data size
	40	#endif
	41
6ebbf390	42	#if ACCESS_TYPE < (NB_MMU_MODES)
61382a50	43
6ebbf390	44	#define CPU_MMU_INDEX ACCESS_TYPE
61382a50 FB	45	#define MMUSUFFIX _mmu
61382a50 FB	46
6ebbf390	47	#elif ACCESS_TYPE == (NB_MMU_MODES)
61382a50	48
6ebbf390	49	#define CPU_MMU_INDEX (cpu_mmu_index(env))
61382a50 FB	50	#define MMUSUFFIX _mmu
61382a50 FB	51
6ebbf390	52	#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
61382a50	53
6ebbf390	54	#define CPU_MMU_INDEX (cpu_mmu_index(env))
61382a50 FB	55	#define MMUSUFFIX _cmmu
61382a50 FB	56
b92e5a22	57	#else
61382a50	58	#error invalid ACCESS_TYPE
b92e5a22 FB	59	#endif
	60
	61	#if DATA_SIZE == 8
	62	#define RES_TYPE uint64_t
	63	#else
	64	#define RES_TYPE int
	65	#endif
	66
6ebbf390	67	#if ACCESS_TYPE == (NB_MMU_MODES + 1)
84b7b8e7 FB	68	#define ADDR_READ addr_code
	69	#else
	70	#define ADDR_READ addr_read
	71	#endif
b92e5a22	72
d656469f	73	DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
6ebbf390	74	int mmu_idx);
d656469f	75	void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int mmu_idx);
b92e5a22	76
c27004ec	77	#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
6ebbf390	78	(ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU)
e16c53fa	79
c27004ec	80	static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
e16c53fa FB	81	{
	82	int res;
	83
	84	asm volatile ("movl %1, %%edx\n"
	85	"movl %1, %%eax\n"
	86	"shrl %3, %%edx\n"
	87	"andl %4, %%eax\n"
	88	"andl %2, %%edx\n"
	89	"leal %5(%%edx, %%ebp), %%edx\n"
	90	"cmpl (%%edx), %%eax\n"
	91	"movl %1, %%eax\n"
	92	"je 1f\n"
d656469f	93	"movl %6, %%edx\n"
e16c53fa	94	"call %7\n"
e16c53fa FB	95	"movl %%eax, %0\n"
	96	"jmp 2f\n"
	97	"1:\n"
84b7b8e7	98	"addl 12(%%edx), %%eax\n"
e16c53fa FB	99	#if DATA_SIZE == 1
	100	"movzbl (%%eax), %0\n"
	101	#elif DATA_SIZE == 2
	102	"movzwl (%%eax), %0\n"
	103	#elif DATA_SIZE == 4
	104	"movl (%%eax), %0\n"
	105	#else
	106	#error unsupported size
	107	#endif
	108	"2:\n"
	109	: "=r" (res)
5fafdf24 TS	110	: "r" (ptr),
	111	"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
	112	"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
e16c53fa	113	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
6ebbf390 JM	114	"m" ((uint32_t )offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
6ebbf390 JM	115	"i" (CPU_MMU_INDEX),
e16c53fa FB	116	"m" ((uint8_t )&glue(glue(__ld, SUFFIX), MMUSUFFIX))
	117	: "%eax", "%ecx", "%edx", "memory", "cc");
	118	return res;
	119	}
	120
	121	#if DATA_SIZE <= 2
c27004ec	122	static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
e16c53fa FB	123	{
	124	int res;
	125
	126	asm volatile ("movl %1, %%edx\n"
	127	"movl %1, %%eax\n"
	128	"shrl %3, %%edx\n"
	129	"andl %4, %%eax\n"
	130	"andl %2, %%edx\n"
	131	"leal %5(%%edx, %%ebp), %%edx\n"
	132	"cmpl (%%edx), %%eax\n"
	133	"movl %1, %%eax\n"
	134	"je 1f\n"
d656469f	135	"movl %6, %%edx\n"
e16c53fa	136	"call %7\n"
e16c53fa FB	137	#if DATA_SIZE == 1
	138	"movsbl %%al, %0\n"
	139	#elif DATA_SIZE == 2
	140	"movswl %%ax, %0\n"
	141	#else
	142	#error unsupported size
	143	#endif
	144	"jmp 2f\n"
	145	"1:\n"
84b7b8e7	146	"addl 12(%%edx), %%eax\n"
e16c53fa FB	147	#if DATA_SIZE == 1
	148	"movsbl (%%eax), %0\n"
	149	#elif DATA_SIZE == 2
	150	"movswl (%%eax), %0\n"
	151	#else
	152	#error unsupported size
	153	#endif
	154	"2:\n"
	155	: "=r" (res)
5fafdf24 TS	156	: "r" (ptr),
	157	"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
	158	"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
e16c53fa	159	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
6ebbf390 JM	160	"m" ((uint32_t )offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
6ebbf390 JM	161	"i" (CPU_MMU_INDEX),
e16c53fa FB	162	"m" ((uint8_t )&glue(glue(__ld, SUFFIX), MMUSUFFIX))
	163	: "%eax", "%ecx", "%edx", "memory", "cc");
	164	return res;
	165	}
	166	#endif
	167
c27004ec	168	static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
e16c53fa FB	169	{
	170	asm volatile ("movl %0, %%edx\n"
	171	"movl %0, %%eax\n"
	172	"shrl %3, %%edx\n"
	173	"andl %4, %%eax\n"
	174	"andl %2, %%edx\n"
	175	"leal %5(%%edx, %%ebp), %%edx\n"
	176	"cmpl (%%edx), %%eax\n"
	177	"movl %0, %%eax\n"
	178	"je 1f\n"
	179	#if DATA_SIZE == 1
	180	"movzbl %b1, %%edx\n"
	181	#elif DATA_SIZE == 2
	182	"movzwl %w1, %%edx\n"
	183	#elif DATA_SIZE == 4
	184	"movl %1, %%edx\n"
	185	#else
	186	#error unsupported size
	187	#endif
d656469f	188	"movl %6, %%ecx\n"
e16c53fa	189	"call %7\n"
e16c53fa FB	190	"jmp 2f\n"
e16c53fa FB	191	"1:\n"
84b7b8e7	192	"addl 8(%%edx), %%eax\n"
e16c53fa FB	193	#if DATA_SIZE == 1
	194	"movb %b1, (%%eax)\n"
	195	#elif DATA_SIZE == 2
	196	"movw %w1, (%%eax)\n"
	197	#elif DATA_SIZE == 4
	198	"movl %1, (%%eax)\n"
	199	#else
	200	#error unsupported size
	201	#endif
	202	"2:\n"
5fafdf24 TS	203	:
5fafdf24 TS	204	: "r" (ptr),
f220f4e3 FB	205	#if DATA_SIZE == 1
	206	"q" (v),
	207	#else
5fafdf24	208	"r" (v),
f220f4e3	209	#endif
5fafdf24 TS	210	"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
5fafdf24 TS	211	"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
e16c53fa	212	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
6ebbf390 JM	213	"m" ((uint32_t )offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
6ebbf390 JM	214	"i" (CPU_MMU_INDEX),
e16c53fa FB	215	"m" ((uint8_t )&glue(glue(__st, SUFFIX), MMUSUFFIX))
	216	: "%eax", "%ecx", "%edx", "memory", "cc");
	217	}
	218
	219	#else
	220
	221	/* generic load/store macros */
	222
c27004ec	223	static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22	224	{
4d7a0880	225	int page_index;
b92e5a22	226	RES_TYPE res;
c27004ec FB	227	target_ulong addr;
c27004ec FB	228	unsigned long physaddr;
6ebbf390	229	int mmu_idx;
61382a50	230
c27004ec	231	addr = ptr;
4d7a0880	232	page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390	233	mmu_idx = CPU_MMU_INDEX;
4d7a0880	234	if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
b92e5a22	235	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
6ebbf390	236	res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
b92e5a22	237	} else {
4d7a0880	238	physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
61382a50	239	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
b92e5a22 FB	240	}
	241	return res;
	242	}
	243
	244	#if DATA_SIZE <= 2
c27004ec	245	static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22	246	{
4d7a0880	247	int res, page_index;
c27004ec FB	248	target_ulong addr;
c27004ec FB	249	unsigned long physaddr;
6ebbf390	250	int mmu_idx;
61382a50	251
c27004ec	252	addr = ptr;
4d7a0880	253	page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390	254	mmu_idx = CPU_MMU_INDEX;
4d7a0880	255	if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
b92e5a22	256	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
6ebbf390	257	res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
b92e5a22	258	} else {
4d7a0880	259	physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
b92e5a22 FB	260	res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
	261	}
	262	return res;
	263	}
	264	#endif
	265
6ebbf390	266	#if ACCESS_TYPE != (NB_MMU_MODES + 1)
84b7b8e7	267
e16c53fa FB	268	/* generic store macro */
e16c53fa FB	269
c27004ec	270	static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
b92e5a22	271	{
4d7a0880	272	int page_index;
c27004ec FB	273	target_ulong addr;
c27004ec FB	274	unsigned long physaddr;
6ebbf390	275	int mmu_idx;
61382a50	276
c27004ec	277	addr = ptr;
4d7a0880	278	page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390	279	mmu_idx = CPU_MMU_INDEX;
4d7a0880	280	if (__builtin_expect(env->tlb_table[mmu_idx][page_index].addr_write !=
b92e5a22	281	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
6ebbf390	282	glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
b92e5a22	283	} else {
4d7a0880	284	physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
b92e5a22 FB	285	glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
	286	}
	287	}
	288
6ebbf390	289	#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
84b7b8e7 FB	290
	291	#endif /* !asm */
	292
6ebbf390	293	#if ACCESS_TYPE != (NB_MMU_MODES + 1)
e16c53fa	294
2d603d22	295	#if DATA_SIZE == 8
3f87bf69	296	static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
2d603d22 FB	297	{
2d603d22 FB	298	union {
3f87bf69	299	float64 d;
2d603d22 FB	300	uint64_t i;
	301	} u;
	302	u.i = glue(ldq, MEMSUFFIX)(ptr);
	303	return u.d;
	304	}
	305
3f87bf69	306	static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
2d603d22 FB	307	{
2d603d22 FB	308	union {
3f87bf69	309	float64 d;
2d603d22 FB	310	uint64_t i;
	311	} u;
	312	u.d = v;
	313	glue(stq, MEMSUFFIX)(ptr, u.i);
	314	}
	315	#endif /* DATA_SIZE == 8 */
	316
	317	#if DATA_SIZE == 4
3f87bf69	318	static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
2d603d22 FB	319	{
2d603d22 FB	320	union {
3f87bf69	321	float32 f;
2d603d22 FB	322	uint32_t i;
	323	} u;
	324	u.i = glue(ldl, MEMSUFFIX)(ptr);
	325	return u.f;
	326	}
	327
3f87bf69	328	static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
2d603d22 FB	329	{
2d603d22 FB	330	union {
3f87bf69	331	float32 f;
2d603d22 FB	332	uint32_t i;
	333	} u;
	334	u.f = v;
	335	glue(stl, MEMSUFFIX)(ptr, u.i);
	336	}
	337	#endif /* DATA_SIZE == 4 */
	338
6ebbf390	339	#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
84b7b8e7	340
b92e5a22 FB	341	#undef RES_TYPE
	342	#undef DATA_TYPE
	343	#undef DATA_STYPE
	344	#undef SUFFIX
61382a50	345	#undef USUFFIX
b92e5a22	346	#undef DATA_SIZE
6ebbf390	347	#undef CPU_MMU_INDEX
61382a50	348	#undef MMUSUFFIX
84b7b8e7	349	#undef ADDR_READ