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Commit | Line | Data |
---|---|---|
895c2d04 BS |
1 | DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) |
2 | DEF_HELPER_2(raise_exception, noreturn, env, i32) | |
9c708c7f | 3 | DEF_HELPER_1(raise_exception_debug, noreturn, env) |
7dd9e556 | 4 | |
3b3c1694 LA |
5 | DEF_HELPER_1(do_semihosting, void, env) |
6 | ||
c8c2227e | 7 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
8 | DEF_HELPER_4(sdl, void, env, tl, tl, int) |
9 | DEF_HELPER_4(sdr, void, env, tl, tl, int) | |
c8c2227e | 10 | #endif |
895c2d04 BS |
11 | DEF_HELPER_4(swl, void, env, tl, tl, int) |
12 | DEF_HELPER_4(swr, void, env, tl, tl, int) | |
c8c2227e | 13 | |
e7139c44 | 14 | #ifndef CONFIG_USER_ONLY |
895c2d04 BS |
15 | DEF_HELPER_3(ll, tl, env, tl, int) |
16 | DEF_HELPER_4(sc, tl, env, tl, tl, int) | |
e7139c44 | 17 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
18 | DEF_HELPER_3(lld, tl, env, tl, int) |
19 | DEF_HELPER_4(scd, tl, env, tl, tl, int) | |
e7139c44 AJ |
20 | #endif |
21 | #endif | |
22 | ||
95bf787e AJ |
23 | DEF_HELPER_FLAGS_1(clo, TCG_CALL_NO_RWG_SE, tl, tl) |
24 | DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, tl, tl) | |
7dd9e556 | 25 | #ifdef TARGET_MIPS64 |
95bf787e AJ |
26 | DEF_HELPER_FLAGS_1(dclo, TCG_CALL_NO_RWG_SE, tl, tl) |
27 | DEF_HELPER_FLAGS_1(dclz, TCG_CALL_NO_RWG_SE, tl, tl) | |
7dd9e556 | 28 | #endif |
f1aa6320 | 29 | |
895c2d04 BS |
30 | DEF_HELPER_3(muls, tl, env, tl, tl) |
31 | DEF_HELPER_3(mulsu, tl, env, tl, tl) | |
32 | DEF_HELPER_3(macc, tl, env, tl, tl) | |
33 | DEF_HELPER_3(maccu, tl, env, tl, tl) | |
34 | DEF_HELPER_3(msac, tl, env, tl, tl) | |
35 | DEF_HELPER_3(msacu, tl, env, tl, tl) | |
36 | DEF_HELPER_3(mulhi, tl, env, tl, tl) | |
37 | DEF_HELPER_3(mulhiu, tl, env, tl, tl) | |
38 | DEF_HELPER_3(mulshi, tl, env, tl, tl) | |
39 | DEF_HELPER_3(mulshiu, tl, env, tl, tl) | |
40 | DEF_HELPER_3(macchi, tl, env, tl, tl) | |
41 | DEF_HELPER_3(macchiu, tl, env, tl, tl) | |
42 | DEF_HELPER_3(msachi, tl, env, tl, tl) | |
43 | DEF_HELPER_3(msachiu, tl, env, tl, tl) | |
92af06d2 | 44 | |
15eacb9b YK |
45 | DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl) |
46 | #ifdef TARGET_MIPS64 | |
47 | DEF_HELPER_FLAGS_1(dbitswap, TCG_CALL_NO_RWG_SE, tl, tl) | |
48 | #endif | |
49 | ||
f1aa6320 | 50 | #ifndef CONFIG_USER_ONLY |
0eaef5aa | 51 | /* CP0 helpers */ |
895c2d04 BS |
52 | DEF_HELPER_1(mfc0_mvpcontrol, tl, env) |
53 | DEF_HELPER_1(mfc0_mvpconf0, tl, env) | |
54 | DEF_HELPER_1(mfc0_mvpconf1, tl, env) | |
55 | DEF_HELPER_1(mftc0_vpecontrol, tl, env) | |
56 | DEF_HELPER_1(mftc0_vpeconf0, tl, env) | |
57 | DEF_HELPER_1(mfc0_random, tl, env) | |
58 | DEF_HELPER_1(mfc0_tcstatus, tl, env) | |
59 | DEF_HELPER_1(mftc0_tcstatus, tl, env) | |
60 | DEF_HELPER_1(mfc0_tcbind, tl, env) | |
61 | DEF_HELPER_1(mftc0_tcbind, tl, env) | |
62 | DEF_HELPER_1(mfc0_tcrestart, tl, env) | |
63 | DEF_HELPER_1(mftc0_tcrestart, tl, env) | |
64 | DEF_HELPER_1(mfc0_tchalt, tl, env) | |
65 | DEF_HELPER_1(mftc0_tchalt, tl, env) | |
66 | DEF_HELPER_1(mfc0_tccontext, tl, env) | |
67 | DEF_HELPER_1(mftc0_tccontext, tl, env) | |
68 | DEF_HELPER_1(mfc0_tcschedule, tl, env) | |
69 | DEF_HELPER_1(mftc0_tcschedule, tl, env) | |
70 | DEF_HELPER_1(mfc0_tcschefback, tl, env) | |
71 | DEF_HELPER_1(mftc0_tcschefback, tl, env) | |
72 | DEF_HELPER_1(mfc0_count, tl, env) | |
73 | DEF_HELPER_1(mftc0_entryhi, tl, env) | |
74 | DEF_HELPER_1(mftc0_status, tl, env) | |
75 | DEF_HELPER_1(mftc0_cause, tl, env) | |
76 | DEF_HELPER_1(mftc0_epc, tl, env) | |
77 | DEF_HELPER_1(mftc0_ebase, tl, env) | |
78 | DEF_HELPER_2(mftc0_configx, tl, env, tl) | |
79 | DEF_HELPER_1(mfc0_lladdr, tl, env) | |
80 | DEF_HELPER_2(mfc0_watchlo, tl, env, i32) | |
81 | DEF_HELPER_2(mfc0_watchhi, tl, env, i32) | |
82 | DEF_HELPER_1(mfc0_debug, tl, env) | |
83 | DEF_HELPER_1(mftc0_debug, tl, env) | |
f1aa6320 | 84 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
85 | DEF_HELPER_1(dmfc0_tcrestart, tl, env) |
86 | DEF_HELPER_1(dmfc0_tchalt, tl, env) | |
87 | DEF_HELPER_1(dmfc0_tccontext, tl, env) | |
88 | DEF_HELPER_1(dmfc0_tcschedule, tl, env) | |
89 | DEF_HELPER_1(dmfc0_tcschefback, tl, env) | |
90 | DEF_HELPER_1(dmfc0_lladdr, tl, env) | |
91 | DEF_HELPER_2(dmfc0_watchlo, tl, env, i32) | |
f1aa6320 TS |
92 | #endif /* TARGET_MIPS64 */ |
93 | ||
895c2d04 BS |
94 | DEF_HELPER_2(mtc0_index, void, env, tl) |
95 | DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl) | |
96 | DEF_HELPER_2(mtc0_vpecontrol, void, env, tl) | |
97 | DEF_HELPER_2(mttc0_vpecontrol, void, env, tl) | |
98 | DEF_HELPER_2(mtc0_vpeconf0, void, env, tl) | |
99 | DEF_HELPER_2(mttc0_vpeconf0, void, env, tl) | |
100 | DEF_HELPER_2(mtc0_vpeconf1, void, env, tl) | |
101 | DEF_HELPER_2(mtc0_yqmask, void, env, tl) | |
102 | DEF_HELPER_2(mtc0_vpeopt, void, env, tl) | |
103 | DEF_HELPER_2(mtc0_entrylo0, void, env, tl) | |
104 | DEF_HELPER_2(mtc0_tcstatus, void, env, tl) | |
105 | DEF_HELPER_2(mttc0_tcstatus, void, env, tl) | |
106 | DEF_HELPER_2(mtc0_tcbind, void, env, tl) | |
107 | DEF_HELPER_2(mttc0_tcbind, void, env, tl) | |
108 | DEF_HELPER_2(mtc0_tcrestart, void, env, tl) | |
109 | DEF_HELPER_2(mttc0_tcrestart, void, env, tl) | |
110 | DEF_HELPER_2(mtc0_tchalt, void, env, tl) | |
111 | DEF_HELPER_2(mttc0_tchalt, void, env, tl) | |
112 | DEF_HELPER_2(mtc0_tccontext, void, env, tl) | |
113 | DEF_HELPER_2(mttc0_tccontext, void, env, tl) | |
114 | DEF_HELPER_2(mtc0_tcschedule, void, env, tl) | |
115 | DEF_HELPER_2(mttc0_tcschedule, void, env, tl) | |
116 | DEF_HELPER_2(mtc0_tcschefback, void, env, tl) | |
117 | DEF_HELPER_2(mttc0_tcschefback, void, env, tl) | |
118 | DEF_HELPER_2(mtc0_entrylo1, void, env, tl) | |
119 | DEF_HELPER_2(mtc0_context, void, env, tl) | |
120 | DEF_HELPER_2(mtc0_pagemask, void, env, tl) | |
121 | DEF_HELPER_2(mtc0_pagegrain, void, env, tl) | |
122 | DEF_HELPER_2(mtc0_wired, void, env, tl) | |
123 | DEF_HELPER_2(mtc0_srsconf0, void, env, tl) | |
124 | DEF_HELPER_2(mtc0_srsconf1, void, env, tl) | |
125 | DEF_HELPER_2(mtc0_srsconf2, void, env, tl) | |
126 | DEF_HELPER_2(mtc0_srsconf3, void, env, tl) | |
127 | DEF_HELPER_2(mtc0_srsconf4, void, env, tl) | |
128 | DEF_HELPER_2(mtc0_hwrena, void, env, tl) | |
129 | DEF_HELPER_2(mtc0_count, void, env, tl) | |
130 | DEF_HELPER_2(mtc0_entryhi, void, env, tl) | |
131 | DEF_HELPER_2(mttc0_entryhi, void, env, tl) | |
132 | DEF_HELPER_2(mtc0_compare, void, env, tl) | |
133 | DEF_HELPER_2(mtc0_status, void, env, tl) | |
134 | DEF_HELPER_2(mttc0_status, void, env, tl) | |
135 | DEF_HELPER_2(mtc0_intctl, void, env, tl) | |
136 | DEF_HELPER_2(mtc0_srsctl, void, env, tl) | |
137 | DEF_HELPER_2(mtc0_cause, void, env, tl) | |
138 | DEF_HELPER_2(mttc0_cause, void, env, tl) | |
139 | DEF_HELPER_2(mtc0_ebase, void, env, tl) | |
140 | DEF_HELPER_2(mttc0_ebase, void, env, tl) | |
141 | DEF_HELPER_2(mtc0_config0, void, env, tl) | |
142 | DEF_HELPER_2(mtc0_config2, void, env, tl) | |
90f12d73 | 143 | DEF_HELPER_2(mtc0_config3, void, env, tl) |
b4160af1 | 144 | DEF_HELPER_2(mtc0_config4, void, env, tl) |
b4dd99a3 | 145 | DEF_HELPER_2(mtc0_config5, void, env, tl) |
895c2d04 BS |
146 | DEF_HELPER_2(mtc0_lladdr, void, env, tl) |
147 | DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32) | |
148 | DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32) | |
149 | DEF_HELPER_2(mtc0_xcontext, void, env, tl) | |
150 | DEF_HELPER_2(mtc0_framemask, void, env, tl) | |
151 | DEF_HELPER_2(mtc0_debug, void, env, tl) | |
152 | DEF_HELPER_2(mttc0_debug, void, env, tl) | |
153 | DEF_HELPER_2(mtc0_performance0, void, env, tl) | |
154 | DEF_HELPER_2(mtc0_taglo, void, env, tl) | |
155 | DEF_HELPER_2(mtc0_datalo, void, env, tl) | |
156 | DEF_HELPER_2(mtc0_taghi, void, env, tl) | |
157 | DEF_HELPER_2(mtc0_datahi, void, env, tl) | |
f1aa6320 | 158 | |
7207c7f9 LA |
159 | #if defined(TARGET_MIPS64) |
160 | DEF_HELPER_2(dmtc0_entrylo0, void, env, i64) | |
161 | DEF_HELPER_2(dmtc0_entrylo1, void, env, i64) | |
162 | #endif | |
163 | ||
f1aa6320 | 164 | /* MIPS MT functions */ |
f5daeec4 | 165 | DEF_HELPER_2(mftgpr, tl, env, i32) |
895c2d04 BS |
166 | DEF_HELPER_2(mftlo, tl, env, i32) |
167 | DEF_HELPER_2(mfthi, tl, env, i32) | |
168 | DEF_HELPER_2(mftacx, tl, env, i32) | |
169 | DEF_HELPER_1(mftdsp, tl, env) | |
170 | DEF_HELPER_3(mttgpr, void, env, tl, i32) | |
171 | DEF_HELPER_3(mttlo, void, env, tl, i32) | |
172 | DEF_HELPER_3(mtthi, void, env, tl, i32) | |
173 | DEF_HELPER_3(mttacx, void, env, tl, i32) | |
174 | DEF_HELPER_2(mttdsp, void, env, tl) | |
9ed5726c NF |
175 | DEF_HELPER_0(dmt, tl) |
176 | DEF_HELPER_0(emt, tl) | |
895c2d04 BS |
177 | DEF_HELPER_1(dvpe, tl, env) |
178 | DEF_HELPER_1(evpe, tl, env) | |
01bc435b YK |
179 | |
180 | /* R6 Multi-threading */ | |
181 | DEF_HELPER_1(dvp, tl, env) | |
182 | DEF_HELPER_1(evp, tl, env) | |
0eaef5aa | 183 | #endif /* !CONFIG_USER_ONLY */ |
3c824109 NF |
184 | |
185 | /* microMIPS functions */ | |
f5daeec4 RH |
186 | DEF_HELPER_4(lwm, void, env, tl, tl, i32) |
187 | DEF_HELPER_4(swm, void, env, tl, tl, i32) | |
3c824109 | 188 | #ifdef TARGET_MIPS64 |
f5daeec4 RH |
189 | DEF_HELPER_4(ldm, void, env, tl, tl, i32) |
190 | DEF_HELPER_4(sdm, void, env, tl, tl, i32) | |
3c824109 NF |
191 | #endif |
192 | ||
a7812ae4 | 193 | DEF_HELPER_2(fork, void, tl, tl) |
895c2d04 | 194 | DEF_HELPER_2(yield, tl, env, tl) |
f1aa6320 TS |
195 | |
196 | /* CP1 functions */ | |
895c2d04 | 197 | DEF_HELPER_2(cfc1, tl, env, i32) |
736d120a | 198 | DEF_HELPER_4(ctc1, void, env, tl, i32, i32) |
5d0fc900 | 199 | |
895c2d04 BS |
200 | DEF_HELPER_2(float_cvtd_s, i64, env, i32) |
201 | DEF_HELPER_2(float_cvtd_w, i64, env, i32) | |
202 | DEF_HELPER_2(float_cvtd_l, i64, env, i64) | |
203 | DEF_HELPER_2(float_cvtl_d, i64, env, i64) | |
204 | DEF_HELPER_2(float_cvtl_s, i64, env, i32) | |
205 | DEF_HELPER_2(float_cvtps_pw, i64, env, i64) | |
206 | DEF_HELPER_2(float_cvtpw_ps, i64, env, i64) | |
207 | DEF_HELPER_2(float_cvts_d, i32, env, i64) | |
208 | DEF_HELPER_2(float_cvts_w, i32, env, i32) | |
209 | DEF_HELPER_2(float_cvts_l, i32, env, i64) | |
210 | DEF_HELPER_2(float_cvts_pl, i32, env, i32) | |
211 | DEF_HELPER_2(float_cvts_pu, i32, env, i32) | |
212 | DEF_HELPER_2(float_cvtw_s, i32, env, i32) | |
213 | DEF_HELPER_2(float_cvtw_d, i32, env, i64) | |
b6d96bed | 214 | |
895c2d04 BS |
215 | DEF_HELPER_3(float_addr_ps, i64, env, i64, i64) |
216 | DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64) | |
b6d96bed | 217 | |
e7f16abb LA |
218 | DEF_HELPER_FLAGS_1(float_class_s, TCG_CALL_NO_RWG_SE, i32, i32) |
219 | DEF_HELPER_FLAGS_1(float_class_d, TCG_CALL_NO_RWG_SE, i64, i64) | |
220 | ||
221 | #define FOP_PROTO(op) \ | |
222 | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ | |
223 | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) | |
224 | FOP_PROTO(maddf) | |
225 | FOP_PROTO(msubf) | |
226 | #undef FOP_PROTO | |
227 | ||
228 | #define FOP_PROTO(op) \ | |
229 | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ | |
230 | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) | |
231 | FOP_PROTO(max) | |
232 | FOP_PROTO(maxa) | |
233 | FOP_PROTO(min) | |
234 | FOP_PROTO(mina) | |
235 | #undef FOP_PROTO | |
236 | ||
895c2d04 BS |
237 | #define FOP_PROTO(op) \ |
238 | DEF_HELPER_2(float_ ## op ## l_s, i64, env, i32) \ | |
239 | DEF_HELPER_2(float_ ## op ## l_d, i64, env, i64) \ | |
240 | DEF_HELPER_2(float_ ## op ## w_s, i32, env, i32) \ | |
241 | DEF_HELPER_2(float_ ## op ## w_d, i32, env, i64) | |
b6d96bed TS |
242 | FOP_PROTO(round) |
243 | FOP_PROTO(trunc) | |
244 | FOP_PROTO(ceil) | |
245 | FOP_PROTO(floor) | |
246 | #undef FOP_PROTO | |
247 | ||
895c2d04 BS |
248 | #define FOP_PROTO(op) \ |
249 | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ | |
250 | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) | |
a16336e4 | 251 | FOP_PROTO(sqrt) |
5d0fc900 TS |
252 | FOP_PROTO(rsqrt) |
253 | FOP_PROTO(recip) | |
e7f16abb | 254 | FOP_PROTO(rint) |
5d0fc900 TS |
255 | #undef FOP_PROTO |
256 | ||
a7812ae4 PB |
257 | #define FOP_PROTO(op) \ |
258 | DEF_HELPER_1(float_ ## op ## _s, i32, i32) \ | |
259 | DEF_HELPER_1(float_ ## op ## _d, i64, i64) \ | |
260 | DEF_HELPER_1(float_ ## op ## _ps, i64, i64) | |
b6d96bed TS |
261 | FOP_PROTO(abs) |
262 | FOP_PROTO(chs) | |
895c2d04 BS |
263 | #undef FOP_PROTO |
264 | ||
265 | #define FOP_PROTO(op) \ | |
266 | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ | |
267 | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) \ | |
268 | DEF_HELPER_2(float_ ## op ## _ps, i64, env, i64) | |
b6d96bed TS |
269 | FOP_PROTO(recip1) |
270 | FOP_PROTO(rsqrt1) | |
271 | #undef FOP_PROTO | |
272 | ||
895c2d04 BS |
273 | #define FOP_PROTO(op) \ |
274 | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ | |
275 | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) \ | |
276 | DEF_HELPER_3(float_ ## op ## _ps, i64, env, i64, i64) | |
5d0fc900 TS |
277 | FOP_PROTO(add) |
278 | FOP_PROTO(sub) | |
279 | FOP_PROTO(mul) | |
280 | FOP_PROTO(div) | |
b6d96bed TS |
281 | FOP_PROTO(recip2) |
282 | FOP_PROTO(rsqrt2) | |
283 | #undef FOP_PROTO | |
284 | ||
895c2d04 BS |
285 | #define FOP_PROTO(op) \ |
286 | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ | |
287 | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) \ | |
288 | DEF_HELPER_4(float_ ## op ## _ps, i64, env, i64, i64, i64) | |
b3d6cd44 AJ |
289 | FOP_PROTO(madd) |
290 | FOP_PROTO(msub) | |
291 | FOP_PROTO(nmadd) | |
292 | FOP_PROTO(nmsub) | |
5d0fc900 TS |
293 | #undef FOP_PROTO |
294 | ||
895c2d04 BS |
295 | #define FOP_PROTO(op) \ |
296 | DEF_HELPER_4(cmp_d_ ## op, void, env, i64, i64, int) \ | |
297 | DEF_HELPER_4(cmpabs_d_ ## op, void, env, i64, i64, int) \ | |
298 | DEF_HELPER_4(cmp_s_ ## op, void, env, i32, i32, int) \ | |
299 | DEF_HELPER_4(cmpabs_s_ ## op, void, env, i32, i32, int) \ | |
300 | DEF_HELPER_4(cmp_ps_ ## op, void, env, i64, i64, int) \ | |
301 | DEF_HELPER_4(cmpabs_ps_ ## op, void, env, i64, i64, int) | |
5d0fc900 TS |
302 | FOP_PROTO(f) |
303 | FOP_PROTO(un) | |
304 | FOP_PROTO(eq) | |
305 | FOP_PROTO(ueq) | |
306 | FOP_PROTO(olt) | |
307 | FOP_PROTO(ult) | |
308 | FOP_PROTO(ole) | |
309 | FOP_PROTO(ule) | |
310 | FOP_PROTO(sf) | |
311 | FOP_PROTO(ngle) | |
312 | FOP_PROTO(seq) | |
313 | FOP_PROTO(ngl) | |
314 | FOP_PROTO(lt) | |
315 | FOP_PROTO(nge) | |
316 | FOP_PROTO(le) | |
317 | FOP_PROTO(ngt) | |
318 | #undef FOP_PROTO | |
08ba7963 | 319 | |
3f493883 YK |
320 | #define FOP_PROTO(op) \ |
321 | DEF_HELPER_3(r6_cmp_d_ ## op, i64, env, i64, i64) \ | |
322 | DEF_HELPER_3(r6_cmp_s_ ## op, i32, env, i32, i32) | |
323 | FOP_PROTO(af) | |
324 | FOP_PROTO(un) | |
325 | FOP_PROTO(eq) | |
326 | FOP_PROTO(ueq) | |
327 | FOP_PROTO(lt) | |
328 | FOP_PROTO(ult) | |
329 | FOP_PROTO(le) | |
330 | FOP_PROTO(ule) | |
331 | FOP_PROTO(saf) | |
332 | FOP_PROTO(sun) | |
333 | FOP_PROTO(seq) | |
334 | FOP_PROTO(sueq) | |
335 | FOP_PROTO(slt) | |
336 | FOP_PROTO(sult) | |
337 | FOP_PROTO(sle) | |
338 | FOP_PROTO(sule) | |
339 | FOP_PROTO(or) | |
340 | FOP_PROTO(une) | |
341 | FOP_PROTO(ne) | |
342 | FOP_PROTO(sor) | |
343 | FOP_PROTO(sune) | |
344 | FOP_PROTO(sne) | |
345 | #undef FOP_PROTO | |
346 | ||
08ba7963 | 347 | /* Special functions */ |
0eaef5aa | 348 | #ifndef CONFIG_USER_ONLY |
895c2d04 BS |
349 | DEF_HELPER_1(tlbwi, void, env) |
350 | DEF_HELPER_1(tlbwr, void, env) | |
351 | DEF_HELPER_1(tlbp, void, env) | |
352 | DEF_HELPER_1(tlbr, void, env) | |
9456c2fb LA |
353 | DEF_HELPER_1(tlbinv, void, env) |
354 | DEF_HELPER_1(tlbinvf, void, env) | |
895c2d04 BS |
355 | DEF_HELPER_1(di, tl, env) |
356 | DEF_HELPER_1(ei, tl, env) | |
357 | DEF_HELPER_1(eret, void, env) | |
ce9782f4 | 358 | DEF_HELPER_1(eretnc, void, env) |
895c2d04 | 359 | DEF_HELPER_1(deret, void, env) |
0eaef5aa | 360 | #endif /* !CONFIG_USER_ONLY */ |
895c2d04 BS |
361 | DEF_HELPER_1(rdhwr_cpunum, tl, env) |
362 | DEF_HELPER_1(rdhwr_synci_step, tl, env) | |
363 | DEF_HELPER_1(rdhwr_cc, tl, env) | |
364 | DEF_HELPER_1(rdhwr_ccres, tl, env) | |
b00c7218 YK |
365 | DEF_HELPER_1(rdhwr_performance, tl, env) |
366 | DEF_HELPER_1(rdhwr_xnp, tl, env) | |
895c2d04 BS |
367 | DEF_HELPER_2(pmon, void, env, int) |
368 | DEF_HELPER_1(wait, void, env) | |
a7812ae4 | 369 | |
bd277fa1 | 370 | /* Loongson multimedia functions. */ |
95bf787e AJ |
371 | DEF_HELPER_FLAGS_2(paddsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
372 | DEF_HELPER_FLAGS_2(paddush, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
373 | DEF_HELPER_FLAGS_2(paddh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
374 | DEF_HELPER_FLAGS_2(paddw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
375 | DEF_HELPER_FLAGS_2(paddsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
376 | DEF_HELPER_FLAGS_2(paddusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
377 | DEF_HELPER_FLAGS_2(paddb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 378 | |
95bf787e AJ |
379 | DEF_HELPER_FLAGS_2(psubsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
380 | DEF_HELPER_FLAGS_2(psubush, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
381 | DEF_HELPER_FLAGS_2(psubh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
382 | DEF_HELPER_FLAGS_2(psubw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
383 | DEF_HELPER_FLAGS_2(psubsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
384 | DEF_HELPER_FLAGS_2(psubusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
385 | DEF_HELPER_FLAGS_2(psubb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 386 | |
95bf787e AJ |
387 | DEF_HELPER_FLAGS_2(pshufh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
388 | DEF_HELPER_FLAGS_2(packsswh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
389 | DEF_HELPER_FLAGS_2(packsshb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
390 | DEF_HELPER_FLAGS_2(packushb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 391 | |
95bf787e AJ |
392 | DEF_HELPER_FLAGS_2(punpcklhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
393 | DEF_HELPER_FLAGS_2(punpckhhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
394 | DEF_HELPER_FLAGS_2(punpcklbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
395 | DEF_HELPER_FLAGS_2(punpckhbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
396 | DEF_HELPER_FLAGS_2(punpcklwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
397 | DEF_HELPER_FLAGS_2(punpckhwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 398 | |
95bf787e AJ |
399 | DEF_HELPER_FLAGS_2(pavgh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
400 | DEF_HELPER_FLAGS_2(pavgb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
401 | DEF_HELPER_FLAGS_2(pmaxsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
402 | DEF_HELPER_FLAGS_2(pminsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
403 | DEF_HELPER_FLAGS_2(pmaxub, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
404 | DEF_HELPER_FLAGS_2(pminub, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 405 | |
95bf787e AJ |
406 | DEF_HELPER_FLAGS_2(pcmpeqw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
407 | DEF_HELPER_FLAGS_2(pcmpgtw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
408 | DEF_HELPER_FLAGS_2(pcmpeqh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
409 | DEF_HELPER_FLAGS_2(pcmpgth, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
410 | DEF_HELPER_FLAGS_2(pcmpeqb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
411 | DEF_HELPER_FLAGS_2(pcmpgtb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 412 | |
95bf787e AJ |
413 | DEF_HELPER_FLAGS_2(psllw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
414 | DEF_HELPER_FLAGS_2(psllh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
415 | DEF_HELPER_FLAGS_2(psrlw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
416 | DEF_HELPER_FLAGS_2(psrlh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
417 | DEF_HELPER_FLAGS_2(psraw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
418 | DEF_HELPER_FLAGS_2(psrah, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 419 | |
95bf787e AJ |
420 | DEF_HELPER_FLAGS_2(pmullh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
421 | DEF_HELPER_FLAGS_2(pmulhh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
422 | DEF_HELPER_FLAGS_2(pmulhuh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
423 | DEF_HELPER_FLAGS_2(pmaddhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 424 | |
95bf787e AJ |
425 | DEF_HELPER_FLAGS_2(pasubub, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
426 | DEF_HELPER_FLAGS_1(biadd, TCG_CALL_NO_RWG_SE, i64, i64) | |
427 | DEF_HELPER_FLAGS_1(pmovmskb, TCG_CALL_NO_RWG_SE, i64, i64) | |
bd277fa1 | 428 | |
461c08df JL |
429 | /*** MIPS DSP ***/ |
430 | /* DSP Arithmetic Sub-class insns */ | |
431 | DEF_HELPER_FLAGS_3(addq_ph, 0, tl, tl, tl, env) | |
432 | DEF_HELPER_FLAGS_3(addq_s_ph, 0, tl, tl, tl, env) | |
433 | #if defined(TARGET_MIPS64) | |
434 | DEF_HELPER_FLAGS_3(addq_qh, 0, tl, tl, tl, env) | |
435 | DEF_HELPER_FLAGS_3(addq_s_qh, 0, tl, tl, tl, env) | |
436 | #endif | |
437 | DEF_HELPER_FLAGS_3(addq_s_w, 0, tl, tl, tl, env) | |
438 | #if defined(TARGET_MIPS64) | |
439 | DEF_HELPER_FLAGS_3(addq_pw, 0, tl, tl, tl, env) | |
440 | DEF_HELPER_FLAGS_3(addq_s_pw, 0, tl, tl, tl, env) | |
441 | #endif | |
442 | DEF_HELPER_FLAGS_3(addu_qb, 0, tl, tl, tl, env) | |
443 | DEF_HELPER_FLAGS_3(addu_s_qb, 0, tl, tl, tl, env) | |
444 | DEF_HELPER_FLAGS_2(adduh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
445 | DEF_HELPER_FLAGS_2(adduh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
446 | DEF_HELPER_FLAGS_3(addu_ph, 0, tl, tl, tl, env) | |
447 | DEF_HELPER_FLAGS_3(addu_s_ph, 0, tl, tl, tl, env) | |
448 | DEF_HELPER_FLAGS_2(addqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
449 | DEF_HELPER_FLAGS_2(addqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
450 | DEF_HELPER_FLAGS_2(addqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
451 | DEF_HELPER_FLAGS_2(addqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
452 | #if defined(TARGET_MIPS64) | |
453 | DEF_HELPER_FLAGS_3(addu_ob, 0, tl, tl, tl, env) | |
454 | DEF_HELPER_FLAGS_3(addu_s_ob, 0, tl, tl, tl, env) | |
455 | DEF_HELPER_FLAGS_2(adduh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
456 | DEF_HELPER_FLAGS_2(adduh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
457 | DEF_HELPER_FLAGS_3(addu_qh, 0, tl, tl, tl, env) | |
458 | DEF_HELPER_FLAGS_3(addu_s_qh, 0, tl, tl, tl, env) | |
459 | #endif | |
460 | DEF_HELPER_FLAGS_3(subq_ph, 0, tl, tl, tl, env) | |
461 | DEF_HELPER_FLAGS_3(subq_s_ph, 0, tl, tl, tl, env) | |
462 | #if defined(TARGET_MIPS64) | |
463 | DEF_HELPER_FLAGS_3(subq_qh, 0, tl, tl, tl, env) | |
464 | DEF_HELPER_FLAGS_3(subq_s_qh, 0, tl, tl, tl, env) | |
465 | #endif | |
466 | DEF_HELPER_FLAGS_3(subq_s_w, 0, tl, tl, tl, env) | |
467 | #if defined(TARGET_MIPS64) | |
468 | DEF_HELPER_FLAGS_3(subq_pw, 0, tl, tl, tl, env) | |
469 | DEF_HELPER_FLAGS_3(subq_s_pw, 0, tl, tl, tl, env) | |
470 | #endif | |
471 | DEF_HELPER_FLAGS_3(subu_qb, 0, tl, tl, tl, env) | |
472 | DEF_HELPER_FLAGS_3(subu_s_qb, 0, tl, tl, tl, env) | |
473 | DEF_HELPER_FLAGS_2(subuh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
474 | DEF_HELPER_FLAGS_2(subuh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
475 | DEF_HELPER_FLAGS_3(subu_ph, 0, tl, tl, tl, env) | |
476 | DEF_HELPER_FLAGS_3(subu_s_ph, 0, tl, tl, tl, env) | |
477 | DEF_HELPER_FLAGS_2(subqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
478 | DEF_HELPER_FLAGS_2(subqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
479 | DEF_HELPER_FLAGS_2(subqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
480 | DEF_HELPER_FLAGS_2(subqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
481 | #if defined(TARGET_MIPS64) | |
482 | DEF_HELPER_FLAGS_3(subu_ob, 0, tl, tl, tl, env) | |
483 | DEF_HELPER_FLAGS_3(subu_s_ob, 0, tl, tl, tl, env) | |
484 | DEF_HELPER_FLAGS_2(subuh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
485 | DEF_HELPER_FLAGS_2(subuh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
486 | DEF_HELPER_FLAGS_3(subu_qh, 0, tl, tl, tl, env) | |
487 | DEF_HELPER_FLAGS_3(subu_s_qh, 0, tl, tl, tl, env) | |
488 | #endif | |
489 | DEF_HELPER_FLAGS_3(addsc, 0, tl, tl, tl, env) | |
490 | DEF_HELPER_FLAGS_3(addwc, 0, tl, tl, tl, env) | |
491 | DEF_HELPER_FLAGS_2(modsub, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
492 | DEF_HELPER_FLAGS_1(raddu_w_qb, TCG_CALL_NO_RWG_SE, tl, tl) | |
493 | #if defined(TARGET_MIPS64) | |
494 | DEF_HELPER_FLAGS_1(raddu_l_ob, TCG_CALL_NO_RWG_SE, tl, tl) | |
495 | #endif | |
496 | DEF_HELPER_FLAGS_2(absq_s_qb, 0, tl, tl, env) | |
497 | DEF_HELPER_FLAGS_2(absq_s_ph, 0, tl, tl, env) | |
498 | DEF_HELPER_FLAGS_2(absq_s_w, 0, tl, tl, env) | |
499 | #if defined(TARGET_MIPS64) | |
500 | DEF_HELPER_FLAGS_2(absq_s_ob, 0, tl, tl, env) | |
501 | DEF_HELPER_FLAGS_2(absq_s_qh, 0, tl, tl, env) | |
502 | DEF_HELPER_FLAGS_2(absq_s_pw, 0, tl, tl, env) | |
503 | #endif | |
504 | DEF_HELPER_FLAGS_2(precr_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
505 | DEF_HELPER_FLAGS_2(precrq_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
506 | DEF_HELPER_FLAGS_3(precr_sra_ph_w, TCG_CALL_NO_RWG_SE, | |
507 | tl, i32, tl, tl) | |
508 | DEF_HELPER_FLAGS_3(precr_sra_r_ph_w, TCG_CALL_NO_RWG_SE, | |
509 | tl, i32, tl, tl) | |
510 | DEF_HELPER_FLAGS_2(precrq_ph_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
511 | DEF_HELPER_FLAGS_3(precrq_rs_ph_w, 0, tl, tl, tl, env) | |
512 | #if defined(TARGET_MIPS64) | |
513 | DEF_HELPER_FLAGS_2(precr_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
514 | DEF_HELPER_FLAGS_3(precr_sra_qh_pw, | |
515 | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) | |
516 | DEF_HELPER_FLAGS_3(precr_sra_r_qh_pw, | |
517 | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) | |
518 | DEF_HELPER_FLAGS_2(precrq_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
519 | DEF_HELPER_FLAGS_2(precrq_qh_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
520 | DEF_HELPER_FLAGS_3(precrq_rs_qh_pw, | |
521 | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) | |
522 | DEF_HELPER_FLAGS_2(precrq_pw_l, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
523 | #endif | |
524 | DEF_HELPER_FLAGS_3(precrqu_s_qb_ph, 0, tl, tl, tl, env) | |
525 | #if defined(TARGET_MIPS64) | |
526 | DEF_HELPER_FLAGS_3(precrqu_s_ob_qh, | |
527 | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) | |
528 | ||
529 | DEF_HELPER_FLAGS_1(preceq_pw_qhl, TCG_CALL_NO_RWG_SE, tl, tl) | |
530 | DEF_HELPER_FLAGS_1(preceq_pw_qhr, TCG_CALL_NO_RWG_SE, tl, tl) | |
531 | DEF_HELPER_FLAGS_1(preceq_pw_qhla, TCG_CALL_NO_RWG_SE, tl, tl) | |
532 | DEF_HELPER_FLAGS_1(preceq_pw_qhra, TCG_CALL_NO_RWG_SE, tl, tl) | |
533 | #endif | |
534 | DEF_HELPER_FLAGS_1(precequ_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) | |
535 | DEF_HELPER_FLAGS_1(precequ_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) | |
536 | DEF_HELPER_FLAGS_1(precequ_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) | |
537 | DEF_HELPER_FLAGS_1(precequ_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) | |
538 | #if defined(TARGET_MIPS64) | |
539 | DEF_HELPER_FLAGS_1(precequ_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) | |
540 | DEF_HELPER_FLAGS_1(precequ_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) | |
541 | DEF_HELPER_FLAGS_1(precequ_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) | |
542 | DEF_HELPER_FLAGS_1(precequ_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) | |
543 | #endif | |
544 | DEF_HELPER_FLAGS_1(preceu_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) | |
545 | DEF_HELPER_FLAGS_1(preceu_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) | |
546 | DEF_HELPER_FLAGS_1(preceu_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) | |
547 | DEF_HELPER_FLAGS_1(preceu_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) | |
548 | #if defined(TARGET_MIPS64) | |
549 | DEF_HELPER_FLAGS_1(preceu_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) | |
550 | DEF_HELPER_FLAGS_1(preceu_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) | |
551 | DEF_HELPER_FLAGS_1(preceu_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) | |
552 | DEF_HELPER_FLAGS_1(preceu_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) | |
553 | #endif | |
554 | ||
77c5fa8b JL |
555 | /* DSP GPR-Based Shift Sub-class insns */ |
556 | DEF_HELPER_FLAGS_3(shll_qb, 0, tl, tl, tl, env) | |
557 | #if defined(TARGET_MIPS64) | |
558 | DEF_HELPER_FLAGS_3(shll_ob, 0, tl, tl, tl, env) | |
559 | #endif | |
560 | DEF_HELPER_FLAGS_3(shll_ph, 0, tl, tl, tl, env) | |
561 | DEF_HELPER_FLAGS_3(shll_s_ph, 0, tl, tl, tl, env) | |
562 | #if defined(TARGET_MIPS64) | |
563 | DEF_HELPER_FLAGS_3(shll_qh, 0, tl, tl, tl, env) | |
564 | DEF_HELPER_FLAGS_3(shll_s_qh, 0, tl, tl, tl, env) | |
565 | #endif | |
566 | DEF_HELPER_FLAGS_3(shll_s_w, 0, tl, tl, tl, env) | |
567 | #if defined(TARGET_MIPS64) | |
568 | DEF_HELPER_FLAGS_3(shll_pw, 0, tl, tl, tl, env) | |
569 | DEF_HELPER_FLAGS_3(shll_s_pw, 0, tl, tl, tl, env) | |
570 | #endif | |
571 | DEF_HELPER_FLAGS_2(shrl_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
572 | DEF_HELPER_FLAGS_2(shrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
573 | #if defined(TARGET_MIPS64) | |
574 | DEF_HELPER_FLAGS_2(shrl_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
575 | DEF_HELPER_FLAGS_2(shrl_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
576 | #endif | |
577 | DEF_HELPER_FLAGS_2(shra_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
578 | DEF_HELPER_FLAGS_2(shra_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
579 | #if defined(TARGET_MIPS64) | |
580 | DEF_HELPER_FLAGS_2(shra_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
581 | DEF_HELPER_FLAGS_2(shra_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
582 | #endif | |
583 | DEF_HELPER_FLAGS_2(shra_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
584 | DEF_HELPER_FLAGS_2(shra_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
585 | DEF_HELPER_FLAGS_2(shra_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
586 | #if defined(TARGET_MIPS64) | |
587 | DEF_HELPER_FLAGS_2(shra_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
588 | DEF_HELPER_FLAGS_2(shra_r_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
589 | DEF_HELPER_FLAGS_2(shra_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
590 | DEF_HELPER_FLAGS_2(shra_r_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
591 | #endif | |
592 | ||
a22260ae JL |
593 | /* DSP Multiply Sub-class insns */ |
594 | DEF_HELPER_FLAGS_3(muleu_s_ph_qbl, 0, tl, tl, tl, env) | |
595 | DEF_HELPER_FLAGS_3(muleu_s_ph_qbr, 0, tl, tl, tl, env) | |
596 | #if defined(TARGET_MIPS64) | |
597 | DEF_HELPER_FLAGS_3(muleu_s_qh_obl, 0, tl, tl, tl, env) | |
598 | DEF_HELPER_FLAGS_3(muleu_s_qh_obr, 0, tl, tl, tl, env) | |
599 | #endif | |
600 | DEF_HELPER_FLAGS_3(mulq_rs_ph, 0, tl, tl, tl, env) | |
601 | #if defined(TARGET_MIPS64) | |
602 | DEF_HELPER_FLAGS_3(mulq_rs_qh, 0, tl, tl, tl, env) | |
603 | #endif | |
604 | DEF_HELPER_FLAGS_3(muleq_s_w_phl, 0, tl, tl, tl, env) | |
605 | DEF_HELPER_FLAGS_3(muleq_s_w_phr, 0, tl, tl, tl, env) | |
606 | #if defined(TARGET_MIPS64) | |
607 | DEF_HELPER_FLAGS_3(muleq_s_pw_qhl, 0, tl, tl, tl, env) | |
608 | DEF_HELPER_FLAGS_3(muleq_s_pw_qhr, 0, tl, tl, tl, env) | |
609 | #endif | |
610 | DEF_HELPER_FLAGS_4(dpau_h_qbl, 0, void, i32, tl, tl, env) | |
611 | DEF_HELPER_FLAGS_4(dpau_h_qbr, 0, void, i32, tl, tl, env) | |
612 | #if defined(TARGET_MIPS64) | |
613 | DEF_HELPER_FLAGS_4(dpau_h_obl, 0, void, tl, tl, i32, env) | |
614 | DEF_HELPER_FLAGS_4(dpau_h_obr, 0, void, tl, tl, i32, env) | |
615 | #endif | |
616 | DEF_HELPER_FLAGS_4(dpsu_h_qbl, 0, void, i32, tl, tl, env) | |
617 | DEF_HELPER_FLAGS_4(dpsu_h_qbr, 0, void, i32, tl, tl, env) | |
618 | #if defined(TARGET_MIPS64) | |
619 | DEF_HELPER_FLAGS_4(dpsu_h_obl, 0, void, tl, tl, i32, env) | |
620 | DEF_HELPER_FLAGS_4(dpsu_h_obr, 0, void, tl, tl, i32, env) | |
621 | #endif | |
622 | DEF_HELPER_FLAGS_4(dpa_w_ph, 0, void, i32, tl, tl, env) | |
623 | #if defined(TARGET_MIPS64) | |
624 | DEF_HELPER_FLAGS_4(dpa_w_qh, 0, void, tl, tl, i32, env) | |
625 | #endif | |
626 | DEF_HELPER_FLAGS_4(dpax_w_ph, 0, void, i32, tl, tl, env) | |
627 | DEF_HELPER_FLAGS_4(dpaq_s_w_ph, 0, void, i32, tl, tl, env) | |
628 | #if defined(TARGET_MIPS64) | |
629 | DEF_HELPER_FLAGS_4(dpaq_s_w_qh, 0, void, tl, tl, i32, env) | |
630 | #endif | |
631 | DEF_HELPER_FLAGS_4(dpaqx_s_w_ph, 0, void, i32, tl, tl, env) | |
632 | DEF_HELPER_FLAGS_4(dpaqx_sa_w_ph, 0, void, i32, tl, tl, env) | |
633 | DEF_HELPER_FLAGS_4(dps_w_ph, 0, void, i32, tl, tl, env) | |
634 | #if defined(TARGET_MIPS64) | |
635 | DEF_HELPER_FLAGS_4(dps_w_qh, 0, void, tl, tl, i32, env) | |
636 | #endif | |
637 | DEF_HELPER_FLAGS_4(dpsx_w_ph, 0, void, i32, tl, tl, env) | |
638 | DEF_HELPER_FLAGS_4(dpsq_s_w_ph, 0, void, i32, tl, tl, env) | |
639 | #if defined(TARGET_MIPS64) | |
640 | DEF_HELPER_FLAGS_4(dpsq_s_w_qh, 0, void, tl, tl, i32, env) | |
641 | #endif | |
642 | DEF_HELPER_FLAGS_4(dpsqx_s_w_ph, 0, void, i32, tl, tl, env) | |
643 | DEF_HELPER_FLAGS_4(dpsqx_sa_w_ph, 0, void, i32, tl, tl, env) | |
644 | DEF_HELPER_FLAGS_4(mulsaq_s_w_ph, 0, void, i32, tl, tl, env) | |
645 | #if defined(TARGET_MIPS64) | |
646 | DEF_HELPER_FLAGS_4(mulsaq_s_w_qh, 0, void, tl, tl, i32, env) | |
647 | #endif | |
648 | DEF_HELPER_FLAGS_4(dpaq_sa_l_w, 0, void, i32, tl, tl, env) | |
649 | #if defined(TARGET_MIPS64) | |
650 | DEF_HELPER_FLAGS_4(dpaq_sa_l_pw, 0, void, tl, tl, i32, env) | |
651 | #endif | |
652 | DEF_HELPER_FLAGS_4(dpsq_sa_l_w, 0, void, i32, tl, tl, env) | |
653 | #if defined(TARGET_MIPS64) | |
654 | DEF_HELPER_FLAGS_4(dpsq_sa_l_pw, 0, void, tl, tl, i32, env) | |
655 | DEF_HELPER_FLAGS_4(mulsaq_s_l_pw, 0, void, tl, tl, i32, env) | |
656 | #endif | |
657 | DEF_HELPER_FLAGS_4(maq_s_w_phl, 0, void, i32, tl, tl, env) | |
658 | DEF_HELPER_FLAGS_4(maq_s_w_phr, 0, void, i32, tl, tl, env) | |
659 | DEF_HELPER_FLAGS_4(maq_sa_w_phl, 0, void, i32, tl, tl, env) | |
660 | DEF_HELPER_FLAGS_4(maq_sa_w_phr, 0, void, i32, tl, tl, env) | |
661 | DEF_HELPER_FLAGS_3(mul_ph, 0, tl, tl, tl, env) | |
662 | DEF_HELPER_FLAGS_3(mul_s_ph, 0, tl, tl, tl, env) | |
663 | DEF_HELPER_FLAGS_3(mulq_s_ph, 0, tl, tl, tl, env) | |
664 | DEF_HELPER_FLAGS_3(mulq_s_w, 0, tl, tl, tl, env) | |
665 | DEF_HELPER_FLAGS_3(mulq_rs_w, 0, tl, tl, tl, env) | |
666 | DEF_HELPER_FLAGS_4(mulsa_w_ph, 0, void, i32, tl, tl, env) | |
667 | #if defined(TARGET_MIPS64) | |
668 | DEF_HELPER_FLAGS_4(maq_s_w_qhll, 0, void, tl, tl, i32, env) | |
669 | DEF_HELPER_FLAGS_4(maq_s_w_qhlr, 0, void, tl, tl, i32, env) | |
670 | DEF_HELPER_FLAGS_4(maq_s_w_qhrl, 0, void, tl, tl, i32, env) | |
671 | DEF_HELPER_FLAGS_4(maq_s_w_qhrr, 0, void, tl, tl, i32, env) | |
672 | DEF_HELPER_FLAGS_4(maq_sa_w_qhll, 0, void, tl, tl, i32, env) | |
673 | DEF_HELPER_FLAGS_4(maq_sa_w_qhlr, 0, void, tl, tl, i32, env) | |
674 | DEF_HELPER_FLAGS_4(maq_sa_w_qhrl, 0, void, tl, tl, i32, env) | |
675 | DEF_HELPER_FLAGS_4(maq_sa_w_qhrr, 0, void, tl, tl, i32, env) | |
676 | DEF_HELPER_FLAGS_4(maq_s_l_pwl, 0, void, tl, tl, i32, env) | |
677 | DEF_HELPER_FLAGS_4(maq_s_l_pwr, 0, void, tl, tl, i32, env) | |
678 | DEF_HELPER_FLAGS_4(dmadd, 0, void, tl, tl, i32, env) | |
679 | DEF_HELPER_FLAGS_4(dmaddu, 0, void, tl, tl, i32, env) | |
680 | DEF_HELPER_FLAGS_4(dmsub, 0, void, tl, tl, i32, env) | |
681 | DEF_HELPER_FLAGS_4(dmsubu, 0, void, tl, tl, i32, env) | |
682 | #endif | |
683 | ||
1cb6686c JL |
684 | /* DSP Bit/Manipulation Sub-class insns */ |
685 | DEF_HELPER_FLAGS_1(bitrev, TCG_CALL_NO_RWG_SE, tl, tl) | |
686 | DEF_HELPER_FLAGS_3(insv, 0, tl, env, tl, tl) | |
687 | #if defined(TARGET_MIPS64) | |
f5daeec4 | 688 | DEF_HELPER_FLAGS_3(dinsv, 0, tl, env, tl, tl) |
1cb6686c JL |
689 | #endif |
690 | ||
26690560 JL |
691 | /* DSP Compare-Pick Sub-class insns */ |
692 | DEF_HELPER_FLAGS_3(cmpu_eq_qb, 0, void, tl, tl, env) | |
693 | DEF_HELPER_FLAGS_3(cmpu_lt_qb, 0, void, tl, tl, env) | |
694 | DEF_HELPER_FLAGS_3(cmpu_le_qb, 0, void, tl, tl, env) | |
695 | DEF_HELPER_FLAGS_2(cmpgu_eq_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
696 | DEF_HELPER_FLAGS_2(cmpgu_lt_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
697 | DEF_HELPER_FLAGS_2(cmpgu_le_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
698 | DEF_HELPER_FLAGS_3(cmp_eq_ph, 0, void, tl, tl, env) | |
699 | DEF_HELPER_FLAGS_3(cmp_lt_ph, 0, void, tl, tl, env) | |
700 | DEF_HELPER_FLAGS_3(cmp_le_ph, 0, void, tl, tl, env) | |
701 | #if defined(TARGET_MIPS64) | |
702 | DEF_HELPER_FLAGS_3(cmpu_eq_ob, 0, void, tl, tl, env) | |
703 | DEF_HELPER_FLAGS_3(cmpu_lt_ob, 0, void, tl, tl, env) | |
704 | DEF_HELPER_FLAGS_3(cmpu_le_ob, 0, void, tl, tl, env) | |
705 | DEF_HELPER_FLAGS_3(cmpgdu_eq_ob, 0, tl, tl, tl, env) | |
706 | DEF_HELPER_FLAGS_3(cmpgdu_lt_ob, 0, tl, tl, tl, env) | |
707 | DEF_HELPER_FLAGS_3(cmpgdu_le_ob, 0, tl, tl, tl, env) | |
708 | DEF_HELPER_FLAGS_2(cmpgu_eq_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
709 | DEF_HELPER_FLAGS_2(cmpgu_lt_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
710 | DEF_HELPER_FLAGS_2(cmpgu_le_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
711 | DEF_HELPER_FLAGS_3(cmp_eq_qh, 0, void, tl, tl, env) | |
712 | DEF_HELPER_FLAGS_3(cmp_lt_qh, 0, void, tl, tl, env) | |
713 | DEF_HELPER_FLAGS_3(cmp_le_qh, 0, void, tl, tl, env) | |
714 | DEF_HELPER_FLAGS_3(cmp_eq_pw, 0, void, tl, tl, env) | |
715 | DEF_HELPER_FLAGS_3(cmp_lt_pw, 0, void, tl, tl, env) | |
716 | DEF_HELPER_FLAGS_3(cmp_le_pw, 0, void, tl, tl, env) | |
717 | #endif | |
718 | DEF_HELPER_FLAGS_3(pick_qb, 0, tl, tl, tl, env) | |
719 | DEF_HELPER_FLAGS_3(pick_ph, 0, tl, tl, tl, env) | |
720 | #if defined(TARGET_MIPS64) | |
721 | DEF_HELPER_FLAGS_3(pick_ob, 0, tl, tl, tl, env) | |
722 | DEF_HELPER_FLAGS_3(pick_qh, 0, tl, tl, tl, env) | |
723 | DEF_HELPER_FLAGS_3(pick_pw, 0, tl, tl, tl, env) | |
724 | #endif | |
26690560 JL |
725 | DEF_HELPER_FLAGS_2(packrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
726 | #if defined(TARGET_MIPS64) | |
727 | DEF_HELPER_FLAGS_2(packrl_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
728 | #endif | |
729 | ||
b53371ed JL |
730 | /* DSP Accumulator and DSPControl Access Sub-class insns */ |
731 | DEF_HELPER_FLAGS_3(extr_w, 0, tl, tl, tl, env) | |
732 | DEF_HELPER_FLAGS_3(extr_r_w, 0, tl, tl, tl, env) | |
733 | DEF_HELPER_FLAGS_3(extr_rs_w, 0, tl, tl, tl, env) | |
734 | #if defined(TARGET_MIPS64) | |
735 | DEF_HELPER_FLAGS_3(dextr_w, 0, tl, tl, tl, env) | |
736 | DEF_HELPER_FLAGS_3(dextr_r_w, 0, tl, tl, tl, env) | |
737 | DEF_HELPER_FLAGS_3(dextr_rs_w, 0, tl, tl, tl, env) | |
738 | DEF_HELPER_FLAGS_3(dextr_l, 0, tl, tl, tl, env) | |
739 | DEF_HELPER_FLAGS_3(dextr_r_l, 0, tl, tl, tl, env) | |
740 | DEF_HELPER_FLAGS_3(dextr_rs_l, 0, tl, tl, tl, env) | |
741 | #endif | |
742 | DEF_HELPER_FLAGS_3(extr_s_h, 0, tl, tl, tl, env) | |
743 | #if defined(TARGET_MIPS64) | |
744 | DEF_HELPER_FLAGS_3(dextr_s_h, 0, tl, tl, tl, env) | |
745 | #endif | |
746 | DEF_HELPER_FLAGS_3(extp, 0, tl, tl, tl, env) | |
747 | DEF_HELPER_FLAGS_3(extpdp, 0, tl, tl, tl, env) | |
748 | #if defined(TARGET_MIPS64) | |
749 | DEF_HELPER_FLAGS_3(dextp, 0, tl, tl, tl, env) | |
750 | DEF_HELPER_FLAGS_3(dextpdp, 0, tl, tl, tl, env) | |
751 | #endif | |
752 | DEF_HELPER_FLAGS_3(shilo, 0, void, tl, tl, env) | |
753 | #if defined(TARGET_MIPS64) | |
754 | DEF_HELPER_FLAGS_3(dshilo, 0, void, tl, tl, env) | |
755 | #endif | |
756 | DEF_HELPER_FLAGS_3(mthlip, 0, void, tl, tl, env) | |
757 | #if defined(TARGET_MIPS64) | |
758 | DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env) | |
759 | #endif | |
760 | DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env) | |
761 | DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env) | |
4c789546 YK |
762 | |
763 | /* MIPS SIMD Architecture */ | |
764 | DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32) | |
765 | DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32) | |
766 | DEF_HELPER_4(msa_nori_b, void, env, i32, i32, i32) | |
767 | DEF_HELPER_4(msa_xori_b, void, env, i32, i32, i32) | |
768 | DEF_HELPER_4(msa_bmnzi_b, void, env, i32, i32, i32) | |
769 | DEF_HELPER_4(msa_bmzi_b, void, env, i32, i32, i32) | |
770 | DEF_HELPER_4(msa_bseli_b, void, env, i32, i32, i32) | |
771 | DEF_HELPER_5(msa_shf_df, void, env, i32, i32, i32, i32) | |
80e71591 YK |
772 | |
773 | DEF_HELPER_5(msa_addvi_df, void, env, i32, i32, i32, s32) | |
774 | DEF_HELPER_5(msa_subvi_df, void, env, i32, i32, i32, s32) | |
775 | DEF_HELPER_5(msa_maxi_s_df, void, env, i32, i32, i32, s32) | |
776 | DEF_HELPER_5(msa_maxi_u_df, void, env, i32, i32, i32, s32) | |
777 | DEF_HELPER_5(msa_mini_s_df, void, env, i32, i32, i32, s32) | |
778 | DEF_HELPER_5(msa_mini_u_df, void, env, i32, i32, i32, s32) | |
779 | DEF_HELPER_5(msa_ceqi_df, void, env, i32, i32, i32, s32) | |
780 | DEF_HELPER_5(msa_clti_s_df, void, env, i32, i32, i32, s32) | |
781 | DEF_HELPER_5(msa_clti_u_df, void, env, i32, i32, i32, s32) | |
782 | DEF_HELPER_5(msa_clei_s_df, void, env, i32, i32, i32, s32) | |
783 | DEF_HELPER_5(msa_clei_u_df, void, env, i32, i32, i32, s32) | |
784 | DEF_HELPER_4(msa_ldi_df, void, env, i32, i32, s32) | |
d4cf28de YK |
785 | |
786 | DEF_HELPER_5(msa_slli_df, void, env, i32, i32, i32, i32) | |
787 | DEF_HELPER_5(msa_srai_df, void, env, i32, i32, i32, i32) | |
788 | DEF_HELPER_5(msa_srli_df, void, env, i32, i32, i32, i32) | |
789 | DEF_HELPER_5(msa_bclri_df, void, env, i32, i32, i32, i32) | |
790 | DEF_HELPER_5(msa_bseti_df, void, env, i32, i32, i32, i32) | |
791 | DEF_HELPER_5(msa_bnegi_df, void, env, i32, i32, i32, i32) | |
792 | DEF_HELPER_5(msa_binsli_df, void, env, i32, i32, i32, i32) | |
793 | DEF_HELPER_5(msa_binsri_df, void, env, i32, i32, i32, i32) | |
794 | DEF_HELPER_5(msa_sat_s_df, void, env, i32, i32, i32, i32) | |
795 | DEF_HELPER_5(msa_sat_u_df, void, env, i32, i32, i32, i32) | |
796 | DEF_HELPER_5(msa_srari_df, void, env, i32, i32, i32, i32) | |
797 | DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32) | |
28f99f08 YK |
798 | |
799 | DEF_HELPER_5(msa_sll_df, void, env, i32, i32, i32, i32) | |
800 | DEF_HELPER_5(msa_sra_df, void, env, i32, i32, i32, i32) | |
801 | DEF_HELPER_5(msa_srl_df, void, env, i32, i32, i32, i32) | |
802 | DEF_HELPER_5(msa_bclr_df, void, env, i32, i32, i32, i32) | |
803 | DEF_HELPER_5(msa_bset_df, void, env, i32, i32, i32, i32) | |
804 | DEF_HELPER_5(msa_bneg_df, void, env, i32, i32, i32, i32) | |
805 | DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32) | |
806 | DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32) | |
807 | DEF_HELPER_5(msa_addv_df, void, env, i32, i32, i32, i32) | |
808 | DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32) | |
809 | DEF_HELPER_5(msa_max_s_df, void, env, i32, i32, i32, i32) | |
810 | DEF_HELPER_5(msa_max_u_df, void, env, i32, i32, i32, i32) | |
811 | DEF_HELPER_5(msa_min_s_df, void, env, i32, i32, i32, i32) | |
812 | DEF_HELPER_5(msa_min_u_df, void, env, i32, i32, i32, i32) | |
813 | DEF_HELPER_5(msa_max_a_df, void, env, i32, i32, i32, i32) | |
814 | DEF_HELPER_5(msa_min_a_df, void, env, i32, i32, i32, i32) | |
815 | DEF_HELPER_5(msa_ceq_df, void, env, i32, i32, i32, i32) | |
816 | DEF_HELPER_5(msa_clt_s_df, void, env, i32, i32, i32, i32) | |
817 | DEF_HELPER_5(msa_clt_u_df, void, env, i32, i32, i32, i32) | |
818 | DEF_HELPER_5(msa_cle_s_df, void, env, i32, i32, i32, i32) | |
819 | DEF_HELPER_5(msa_cle_u_df, void, env, i32, i32, i32, i32) | |
820 | DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32) | |
821 | DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32) | |
822 | DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32) | |
823 | DEF_HELPER_5(msa_adds_u_df, void, env, i32, i32, i32, i32) | |
824 | DEF_HELPER_5(msa_ave_s_df, void, env, i32, i32, i32, i32) | |
825 | DEF_HELPER_5(msa_ave_u_df, void, env, i32, i32, i32, i32) | |
826 | DEF_HELPER_5(msa_aver_s_df, void, env, i32, i32, i32, i32) | |
827 | DEF_HELPER_5(msa_aver_u_df, void, env, i32, i32, i32, i32) | |
828 | DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32) | |
829 | DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32) | |
830 | DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32) | |
831 | DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32) | |
832 | DEF_HELPER_5(msa_asub_s_df, void, env, i32, i32, i32, i32) | |
833 | DEF_HELPER_5(msa_asub_u_df, void, env, i32, i32, i32, i32) | |
834 | DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32) | |
835 | DEF_HELPER_5(msa_maddv_df, void, env, i32, i32, i32, i32) | |
836 | DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32) | |
837 | DEF_HELPER_5(msa_div_s_df, void, env, i32, i32, i32, i32) | |
838 | DEF_HELPER_5(msa_div_u_df, void, env, i32, i32, i32, i32) | |
839 | DEF_HELPER_5(msa_mod_s_df, void, env, i32, i32, i32, i32) | |
840 | DEF_HELPER_5(msa_mod_u_df, void, env, i32, i32, i32, i32) | |
841 | DEF_HELPER_5(msa_dotp_s_df, void, env, i32, i32, i32, i32) | |
842 | DEF_HELPER_5(msa_dotp_u_df, void, env, i32, i32, i32, i32) | |
843 | DEF_HELPER_5(msa_dpadd_s_df, void, env, i32, i32, i32, i32) | |
844 | DEF_HELPER_5(msa_dpadd_u_df, void, env, i32, i32, i32, i32) | |
845 | DEF_HELPER_5(msa_dpsub_s_df, void, env, i32, i32, i32, i32) | |
846 | DEF_HELPER_5(msa_dpsub_u_df, void, env, i32, i32, i32, i32) | |
847 | DEF_HELPER_5(msa_sld_df, void, env, i32, i32, i32, i32) | |
848 | DEF_HELPER_5(msa_splat_df, void, env, i32, i32, i32, i32) | |
849 | DEF_HELPER_5(msa_pckev_df, void, env, i32, i32, i32, i32) | |
850 | DEF_HELPER_5(msa_pckod_df, void, env, i32, i32, i32, i32) | |
851 | DEF_HELPER_5(msa_ilvl_df, void, env, i32, i32, i32, i32) | |
852 | DEF_HELPER_5(msa_ilvr_df, void, env, i32, i32, i32, i32) | |
853 | DEF_HELPER_5(msa_ilvev_df, void, env, i32, i32, i32, i32) | |
854 | DEF_HELPER_5(msa_ilvod_df, void, env, i32, i32, i32, i32) | |
855 | DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32) | |
856 | DEF_HELPER_5(msa_srar_df, void, env, i32, i32, i32, i32) | |
857 | DEF_HELPER_5(msa_srlr_df, void, env, i32, i32, i32, i32) | |
858 | DEF_HELPER_5(msa_hadd_s_df, void, env, i32, i32, i32, i32) | |
859 | DEF_HELPER_5(msa_hadd_u_df, void, env, i32, i32, i32, i32) | |
860 | DEF_HELPER_5(msa_hsub_s_df, void, env, i32, i32, i32, i32) | |
861 | DEF_HELPER_5(msa_hsub_u_df, void, env, i32, i32, i32, i32) | |
1e608ec1 YK |
862 | |
863 | DEF_HELPER_5(msa_sldi_df, void, env, i32, i32, i32, i32) | |
864 | DEF_HELPER_5(msa_splati_df, void, env, i32, i32, i32, i32) | |
865 | DEF_HELPER_5(msa_copy_s_df, void, env, i32, i32, i32, i32) | |
866 | DEF_HELPER_5(msa_copy_u_df, void, env, i32, i32, i32, i32) | |
867 | DEF_HELPER_5(msa_insert_df, void, env, i32, i32, i32, i32) | |
868 | DEF_HELPER_5(msa_insve_df, void, env, i32, i32, i32, i32) | |
869 | DEF_HELPER_3(msa_ctcmsa, void, env, tl, i32) | |
870 | DEF_HELPER_2(msa_cfcmsa, tl, env, i32) | |
871 | DEF_HELPER_3(msa_move_v, void, env, i32, i32) | |
7d05b9c8 YK |
872 | |
873 | DEF_HELPER_5(msa_fcaf_df, void, env, i32, i32, i32, i32) | |
874 | DEF_HELPER_5(msa_fcun_df, void, env, i32, i32, i32, i32) | |
875 | DEF_HELPER_5(msa_fceq_df, void, env, i32, i32, i32, i32) | |
876 | DEF_HELPER_5(msa_fcueq_df, void, env, i32, i32, i32, i32) | |
877 | DEF_HELPER_5(msa_fclt_df, void, env, i32, i32, i32, i32) | |
878 | DEF_HELPER_5(msa_fcult_df, void, env, i32, i32, i32, i32) | |
879 | DEF_HELPER_5(msa_fcle_df, void, env, i32, i32, i32, i32) | |
880 | DEF_HELPER_5(msa_fcule_df, void, env, i32, i32, i32, i32) | |
881 | DEF_HELPER_5(msa_fsaf_df, void, env, i32, i32, i32, i32) | |
882 | DEF_HELPER_5(msa_fsun_df, void, env, i32, i32, i32, i32) | |
883 | DEF_HELPER_5(msa_fseq_df, void, env, i32, i32, i32, i32) | |
884 | DEF_HELPER_5(msa_fsueq_df, void, env, i32, i32, i32, i32) | |
885 | DEF_HELPER_5(msa_fslt_df, void, env, i32, i32, i32, i32) | |
886 | DEF_HELPER_5(msa_fsult_df, void, env, i32, i32, i32, i32) | |
887 | DEF_HELPER_5(msa_fsle_df, void, env, i32, i32, i32, i32) | |
888 | DEF_HELPER_5(msa_fsule_df, void, env, i32, i32, i32, i32) | |
889 | DEF_HELPER_5(msa_fadd_df, void, env, i32, i32, i32, i32) | |
890 | DEF_HELPER_5(msa_fsub_df, void, env, i32, i32, i32, i32) | |
891 | DEF_HELPER_5(msa_fmul_df, void, env, i32, i32, i32, i32) | |
892 | DEF_HELPER_5(msa_fdiv_df, void, env, i32, i32, i32, i32) | |
893 | DEF_HELPER_5(msa_fmadd_df, void, env, i32, i32, i32, i32) | |
894 | DEF_HELPER_5(msa_fmsub_df, void, env, i32, i32, i32, i32) | |
895 | DEF_HELPER_5(msa_fexp2_df, void, env, i32, i32, i32, i32) | |
896 | DEF_HELPER_5(msa_fexdo_df, void, env, i32, i32, i32, i32) | |
897 | DEF_HELPER_5(msa_ftq_df, void, env, i32, i32, i32, i32) | |
898 | DEF_HELPER_5(msa_fmin_df, void, env, i32, i32, i32, i32) | |
899 | DEF_HELPER_5(msa_fmin_a_df, void, env, i32, i32, i32, i32) | |
900 | DEF_HELPER_5(msa_fmax_df, void, env, i32, i32, i32, i32) | |
901 | DEF_HELPER_5(msa_fmax_a_df, void, env, i32, i32, i32, i32) | |
902 | DEF_HELPER_5(msa_fcor_df, void, env, i32, i32, i32, i32) | |
903 | DEF_HELPER_5(msa_fcune_df, void, env, i32, i32, i32, i32) | |
904 | DEF_HELPER_5(msa_fcne_df, void, env, i32, i32, i32, i32) | |
905 | DEF_HELPER_5(msa_mul_q_df, void, env, i32, i32, i32, i32) | |
906 | DEF_HELPER_5(msa_madd_q_df, void, env, i32, i32, i32, i32) | |
907 | DEF_HELPER_5(msa_msub_q_df, void, env, i32, i32, i32, i32) | |
908 | DEF_HELPER_5(msa_fsor_df, void, env, i32, i32, i32, i32) | |
909 | DEF_HELPER_5(msa_fsune_df, void, env, i32, i32, i32, i32) | |
910 | DEF_HELPER_5(msa_fsne_df, void, env, i32, i32, i32, i32) | |
911 | DEF_HELPER_5(msa_mulr_q_df, void, env, i32, i32, i32, i32) | |
912 | DEF_HELPER_5(msa_maddr_q_df, void, env, i32, i32, i32, i32) | |
913 | DEF_HELPER_5(msa_msubr_q_df, void, env, i32, i32, i32, i32) | |
cbe50b9a YK |
914 | |
915 | DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32) | |
916 | DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32) | |
917 | DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32) | |
918 | DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32) | |
919 | DEF_HELPER_4(msa_bmnz_v, void, env, i32, i32, i32) | |
920 | DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32) | |
921 | DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32) | |
922 | DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32) | |
923 | DEF_HELPER_4(msa_pcnt_df, void, env, i32, i32, i32) | |
924 | DEF_HELPER_4(msa_nloc_df, void, env, i32, i32, i32) | |
925 | DEF_HELPER_4(msa_nlzc_df, void, env, i32, i32, i32) | |
3bdeb688 YK |
926 | |
927 | DEF_HELPER_4(msa_fclass_df, void, env, i32, i32, i32) | |
928 | DEF_HELPER_4(msa_ftrunc_s_df, void, env, i32, i32, i32) | |
929 | DEF_HELPER_4(msa_ftrunc_u_df, void, env, i32, i32, i32) | |
930 | DEF_HELPER_4(msa_fsqrt_df, void, env, i32, i32, i32) | |
931 | DEF_HELPER_4(msa_frsqrt_df, void, env, i32, i32, i32) | |
932 | DEF_HELPER_4(msa_frcp_df, void, env, i32, i32, i32) | |
933 | DEF_HELPER_4(msa_frint_df, void, env, i32, i32, i32) | |
934 | DEF_HELPER_4(msa_flog2_df, void, env, i32, i32, i32) | |
935 | DEF_HELPER_4(msa_fexupl_df, void, env, i32, i32, i32) | |
936 | DEF_HELPER_4(msa_fexupr_df, void, env, i32, i32, i32) | |
937 | DEF_HELPER_4(msa_ffql_df, void, env, i32, i32, i32) | |
938 | DEF_HELPER_4(msa_ffqr_df, void, env, i32, i32, i32) | |
939 | DEF_HELPER_4(msa_ftint_s_df, void, env, i32, i32, i32) | |
940 | DEF_HELPER_4(msa_ftint_u_df, void, env, i32, i32, i32) | |
941 | DEF_HELPER_4(msa_ffint_s_df, void, env, i32, i32, i32) | |
942 | DEF_HELPER_4(msa_ffint_u_df, void, env, i32, i32, i32) | |
f7685877 | 943 | |
adc370a4 YK |
944 | #define MSALDST_PROTO(type) \ |
945 | DEF_HELPER_3(msa_ld_ ## type, void, env, i32, tl) \ | |
946 | DEF_HELPER_3(msa_st_ ## type, void, env, i32, tl) | |
947 | MSALDST_PROTO(b) | |
948 | MSALDST_PROTO(h) | |
949 | MSALDST_PROTO(w) | |
950 | MSALDST_PROTO(d) | |
951 | #undef MSALDST_PROTO |