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d19893da FB |
1 | /* |
2 | * Host code generation | |
5fafdf24 | 3 | * |
d19893da FB |
4 | * Copyright (c) 2003 Fabrice Bellard |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | #include <stdarg.h> | |
21 | #include <stdlib.h> | |
22 | #include <stdio.h> | |
23 | #include <string.h> | |
24 | #include <inttypes.h> | |
25 | ||
26 | #include "config.h" | |
2054396a | 27 | |
af5ad107 | 28 | #define NO_CPU_IO_DEFS |
d3eead2e FB |
29 | #include "cpu.h" |
30 | #include "exec-all.h" | |
d19893da | 31 | #include "disas.h" |
57fec1fe | 32 | #include "tcg.h" |
d19893da | 33 | |
57fec1fe FB |
34 | /* code generation context */ |
35 | TCGContext tcg_ctx; | |
d19893da | 36 | |
d19893da | 37 | uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
57fec1fe | 38 | TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE]; |
c4687878 FB |
39 | |
40 | target_ulong gen_opc_pc[OPC_BUF_SIZE]; | |
d19893da | 41 | uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
f76af4b3 FB |
42 | #if defined(TARGET_I386) |
43 | uint8_t gen_opc_cc_op[OPC_BUF_SIZE]; | |
e95c8d51 | 44 | #elif defined(TARGET_SPARC) |
c4687878 | 45 | target_ulong gen_opc_npc[OPC_BUF_SIZE]; |
c3278b7b | 46 | target_ulong gen_opc_jump_pc[2]; |
823029f9 | 47 | #elif defined(TARGET_MIPS) || defined(TARGET_SH4) |
30d6cb84 | 48 | uint32_t gen_opc_hflags[OPC_BUF_SIZE]; |
f76af4b3 | 49 | #endif |
d19893da | 50 | |
58fe2f10 FB |
51 | int code_copy_enabled = 1; |
52 | ||
57fec1fe FB |
53 | #ifdef CONFIG_PROFILER |
54 | int64_t dyngen_tb_count1; | |
55 | int64_t dyngen_tb_count; | |
56 | int64_t dyngen_op_count; | |
57 | int64_t dyngen_old_op_count; | |
58 | int64_t dyngen_tcg_del_op_count; | |
59 | int dyngen_op_count_max; | |
60 | int64_t dyngen_code_in_len; | |
61 | int64_t dyngen_code_out_len; | |
62 | int64_t dyngen_interm_time; | |
63 | int64_t dyngen_code_time; | |
64 | int64_t dyngen_restore_count; | |
65 | int64_t dyngen_restore_time; | |
d19893da FB |
66 | #endif |
67 | ||
57fec1fe | 68 | /* XXX: suppress that */ |
d07bde88 BS |
69 | unsigned long code_gen_max_block_size(void) |
70 | { | |
71 | static unsigned long max; | |
72 | ||
73 | if (max == 0) { | |
74 | #define DEF(s, n, copy_size) max = copy_size > max? copy_size : max; | |
57fec1fe | 75 | #include "tcg-opc.h" |
d07bde88 BS |
76 | #undef DEF |
77 | max *= OPC_MAX_SIZE; | |
78 | } | |
79 | ||
80 | return max; | |
81 | } | |
82 | ||
57fec1fe FB |
83 | void cpu_gen_init(void) |
84 | { | |
85 | tcg_context_init(&tcg_ctx); | |
86 | tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf), | |
87 | 128 * sizeof(long)); | |
88 | } | |
89 | ||
d19893da | 90 | /* return non zero if the very first instruction is invalid so that |
5fafdf24 | 91 | the virtual CPU can trigger an exception. |
d19893da FB |
92 | |
93 | '*gen_code_size_ptr' contains the size of the generated code (host | |
94 | code). | |
95 | */ | |
d07bde88 | 96 | int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr) |
d19893da | 97 | { |
57fec1fe | 98 | TCGContext *s = &tcg_ctx; |
d19893da FB |
99 | uint8_t *gen_code_buf; |
100 | int gen_code_size; | |
57fec1fe FB |
101 | #ifdef CONFIG_PROFILER |
102 | int64_t ti; | |
103 | #endif | |
104 | ||
105 | #ifdef CONFIG_PROFILER | |
106 | dyngen_tb_count1++; /* includes aborted translations because of | |
107 | exceptions */ | |
108 | ti = profile_getclock(); | |
109 | #endif | |
110 | tcg_func_start(s); | |
d19893da | 111 | |
ec6338ba FB |
112 | if (gen_intermediate_code(env, tb) < 0) |
113 | return -1; | |
114 | ||
115 | /* generate machine code */ | |
57fec1fe | 116 | gen_code_buf = tb->tc_ptr; |
ec6338ba FB |
117 | tb->tb_next_offset[0] = 0xffff; |
118 | tb->tb_next_offset[1] = 0xffff; | |
57fec1fe | 119 | s->tb_next_offset = tb->tb_next_offset; |
4cbb86e1 | 120 | #ifdef USE_DIRECT_JUMP |
57fec1fe FB |
121 | s->tb_jmp_offset = tb->tb_jmp_offset; |
122 | s->tb_next = NULL; | |
ec6338ba | 123 | /* the following two entries are optional (only used for string ops) */ |
57fec1fe | 124 | /* XXX: not used ? */ |
ec6338ba FB |
125 | tb->tb_jmp_offset[2] = 0xffff; |
126 | tb->tb_jmp_offset[3] = 0xffff; | |
d19893da | 127 | #else |
57fec1fe FB |
128 | s->tb_jmp_offset = NULL; |
129 | s->tb_next = tb->tb_next; | |
d19893da | 130 | #endif |
57fec1fe FB |
131 | |
132 | #ifdef CONFIG_PROFILER | |
133 | dyngen_tb_count++; | |
134 | dyngen_interm_time += profile_getclock() - ti; | |
135 | dyngen_code_time -= profile_getclock(); | |
136 | #endif | |
137 | gen_code_size = dyngen_code(s, gen_code_buf); | |
d19893da | 138 | *gen_code_size_ptr = gen_code_size; |
57fec1fe FB |
139 | #ifdef CONFIG_PROFILER |
140 | dyngen_code_time += profile_getclock(); | |
141 | dyngen_code_in_len += tb->size; | |
142 | dyngen_code_out_len += gen_code_size; | |
143 | #endif | |
144 | ||
d19893da | 145 | #ifdef DEBUG_DISAS |
f193c797 | 146 | if (loglevel & CPU_LOG_TB_OUT_ASM) { |
d19893da | 147 | fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr); |
c4687878 | 148 | disas(logfile, tb->tc_ptr, *gen_code_size_ptr); |
d19893da FB |
149 | fprintf(logfile, "\n"); |
150 | fflush(logfile); | |
151 | } | |
152 | #endif | |
153 | return 0; | |
154 | } | |
155 | ||
5fafdf24 | 156 | /* The cpu state corresponding to 'searched_pc' is restored. |
d19893da | 157 | */ |
5fafdf24 | 158 | int cpu_restore_state(TranslationBlock *tb, |
58fe2f10 FB |
159 | CPUState *env, unsigned long searched_pc, |
160 | void *puc) | |
d19893da | 161 | { |
57fec1fe FB |
162 | TCGContext *s = &tcg_ctx; |
163 | int j; | |
d19893da | 164 | unsigned long tc_ptr; |
57fec1fe FB |
165 | #ifdef CONFIG_PROFILER |
166 | int64_t ti; | |
167 | #endif | |
168 | ||
169 | #ifdef CONFIG_PROFILER | |
170 | ti = profile_getclock(); | |
171 | #endif | |
172 | tcg_func_start(s); | |
d19893da | 173 | |
4c3a88a2 | 174 | if (gen_intermediate_code_pc(env, tb) < 0) |
d19893da | 175 | return -1; |
3b46e624 | 176 | |
d19893da FB |
177 | /* find opc index corresponding to search_pc */ |
178 | tc_ptr = (unsigned long)tb->tc_ptr; | |
179 | if (searched_pc < tc_ptr) | |
180 | return -1; | |
57fec1fe FB |
181 | |
182 | s->tb_next_offset = tb->tb_next_offset; | |
183 | #ifdef USE_DIRECT_JUMP | |
184 | s->tb_jmp_offset = tb->tb_jmp_offset; | |
185 | s->tb_next = NULL; | |
186 | #else | |
187 | s->tb_jmp_offset = NULL; | |
188 | s->tb_next = tb->tb_next; | |
189 | #endif | |
623e265c | 190 | j = dyngen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr); |
57fec1fe FB |
191 | if (j < 0) |
192 | return -1; | |
d19893da FB |
193 | /* now find start of instruction before */ |
194 | while (gen_opc_instr_start[j] == 0) | |
195 | j--; | |
f76af4b3 FB |
196 | #if defined(TARGET_I386) |
197 | { | |
198 | int cc_op; | |
3c1cf9fa | 199 | #ifdef DEBUG_DISAS |
f193c797 | 200 | if (loglevel & CPU_LOG_TB_OP) { |
3c1cf9fa | 201 | int i; |
6e0374f6 | 202 | fprintf(logfile, "RESTORE:\n"); |
3c1cf9fa FB |
203 | for(i=0;i<=j; i++) { |
204 | if (gen_opc_instr_start[i]) { | |
c4687878 | 205 | fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); |
3c1cf9fa FB |
206 | } |
207 | } | |
5fafdf24 TS |
208 | fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", |
209 | searched_pc, j, gen_opc_pc[j] - tb->cs_base, | |
c4687878 | 210 | (uint32_t)tb->cs_base); |
3c1cf9fa FB |
211 | } |
212 | #endif | |
f76af4b3 FB |
213 | env->eip = gen_opc_pc[j] - tb->cs_base; |
214 | cc_op = gen_opc_cc_op[j]; | |
215 | if (cc_op != CC_OP_DYNAMIC) | |
216 | env->cc_op = cc_op; | |
217 | } | |
218 | #elif defined(TARGET_ARM) | |
219 | env->regs[15] = gen_opc_pc[j]; | |
d3eead2e | 220 | #elif defined(TARGET_SPARC) |
c3278b7b FB |
221 | { |
222 | target_ulong npc; | |
223 | env->pc = gen_opc_pc[j]; | |
224 | npc = gen_opc_npc[j]; | |
225 | if (npc == 1) { | |
226 | /* dynamic NPC: already stored */ | |
227 | } else if (npc == 2) { | |
745cacc7 | 228 | target_ulong t2 = (target_ulong)(unsigned long)puc; |
c3278b7b | 229 | /* jump PC: use T2 and the jump targets of the translation */ |
5fafdf24 | 230 | if (t2) |
c3278b7b FB |
231 | env->npc = gen_opc_jump_pc[0]; |
232 | else | |
233 | env->npc = gen_opc_jump_pc[1]; | |
234 | } else { | |
235 | env->npc = npc; | |
236 | } | |
237 | } | |
6dca2016 | 238 | #elif defined(TARGET_PPC) |
af5ad107 | 239 | { |
57fec1fe | 240 | int type, c; |
af5ad107 FB |
241 | /* for PPC, we need to look at the micro operation to get the |
242 | access type */ | |
243 | env->nip = gen_opc_pc[j]; | |
57fec1fe | 244 | c = gen_opc_buf[j]; |
af5ad107 FB |
245 | switch(c) { |
246 | #if defined(CONFIG_USER_ONLY) | |
247 | #define CASE3(op)\ | |
248 | case INDEX_op_ ## op ## _raw | |
249 | #else | |
250 | #define CASE3(op)\ | |
af5ad107 | 251 | case INDEX_op_ ## op ## _user:\ |
7863667f JM |
252 | case INDEX_op_ ## op ## _kernel:\ |
253 | case INDEX_op_ ## op ## _hypv | |
af5ad107 | 254 | #endif |
3b46e624 | 255 | |
af5ad107 FB |
256 | CASE3(stfd): |
257 | CASE3(stfs): | |
258 | CASE3(lfd): | |
259 | CASE3(lfs): | |
260 | type = ACCESS_FLOAT; | |
261 | break; | |
a541f297 FB |
262 | CASE3(lwarx): |
263 | type = ACCESS_RES; | |
264 | break; | |
af5ad107 FB |
265 | CASE3(stwcx): |
266 | type = ACCESS_RES; | |
267 | break; | |
268 | CASE3(eciwx): | |
269 | CASE3(ecowx): | |
270 | type = ACCESS_EXT; | |
271 | break; | |
272 | default: | |
273 | type = ACCESS_INT; | |
274 | break; | |
275 | } | |
276 | env->access_type = type; | |
277 | } | |
e6e5906b PB |
278 | #elif defined(TARGET_M68K) |
279 | env->pc = gen_opc_pc[j]; | |
6af0bf9c | 280 | #elif defined(TARGET_MIPS) |
ead9360e | 281 | env->PC[env->current_tc] = gen_opc_pc[j]; |
30d6cb84 FB |
282 | env->hflags &= ~MIPS_HFLAG_BMASK; |
283 | env->hflags |= gen_opc_hflags[j]; | |
eddf68a6 JM |
284 | #elif defined(TARGET_ALPHA) |
285 | env->pc = gen_opc_pc[j]; | |
823029f9 TS |
286 | #elif defined(TARGET_SH4) |
287 | env->pc = gen_opc_pc[j]; | |
288 | env->flags = gen_opc_hflags[j]; | |
e62b5b13 EI |
289 | #elif defined(TARGET_CRIS) |
290 | env->pregs[PR_ERP] = gen_opc_pc[j]; | |
f76af4b3 | 291 | #endif |
57fec1fe FB |
292 | |
293 | #ifdef CONFIG_PROFILER | |
294 | dyngen_restore_time += profile_getclock() - ti; | |
295 | dyngen_restore_count++; | |
296 | #endif | |
d19893da FB |
297 | return 0; |
298 | } |