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removed switches in op.c (Paul Brook)
[qemu.git] / target-i386 / op.c
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1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
f68dd770 20
f68dd770 21#define ASM_SOFTMMU
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22#include "exec.h"
23
24/* n must be a constant to be efficient */
14ce26e7 25static inline target_long lshift(target_long x, int n)
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26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
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83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
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135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
175void OPPROTO op_addl_T0_T1(void)
176{
177 T0 += T1;
178}
179
180void OPPROTO op_orl_T0_T1(void)
181{
182 T0 |= T1;
183}
184
185void OPPROTO op_andl_T0_T1(void)
186{
187 T0 &= T1;
188}
189
190void OPPROTO op_subl_T0_T1(void)
191{
192 T0 -= T1;
193}
194
195void OPPROTO op_xorl_T0_T1(void)
196{
197 T0 ^= T1;
198}
199
200void OPPROTO op_negl_T0(void)
201{
202 T0 = -T0;
203}
204
205void OPPROTO op_incl_T0(void)
206{
207 T0++;
208}
209
210void OPPROTO op_decl_T0(void)
211{
212 T0--;
213}
214
215void OPPROTO op_notl_T0(void)
216{
217 T0 = ~T0;
218}
219
220void OPPROTO op_bswapl_T0(void)
221{
222 T0 = bswap32(T0);
223}
224
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225#ifdef TARGET_X86_64
226void OPPROTO op_bswapq_T0(void)
227{
228 T0 = bswap64(T0);
229}
230#endif
231
2c0262af 232/* multiply/divide */
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233
234/* XXX: add eflags optimizations */
235/* XXX: add non P4 style flags */
236
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237void OPPROTO op_mulb_AL_T0(void)
238{
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
14ce26e7 241 EAX = (EAX & ~0xffff) | res;
d36cd60e 242 CC_DST = res;
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243 CC_SRC = (res & 0xff00);
244}
245
246void OPPROTO op_imulb_AL_T0(void)
247{
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
14ce26e7 250 EAX = (EAX & ~0xffff) | (res & 0xffff);
d36cd60e 251 CC_DST = res;
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252 CC_SRC = (res != (int8_t)res);
253}
254
255void OPPROTO op_mulw_AX_T0(void)
256{
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
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259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 261 CC_DST = res;
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262 CC_SRC = res >> 16;
263}
264
265void OPPROTO op_imulw_AX_T0(void)
266{
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
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269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 271 CC_DST = res;
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272 CC_SRC = (res != (int16_t)res);
273}
274
275void OPPROTO op_mull_EAX_T0(void)
276{
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
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279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
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283}
284
285void OPPROTO op_imull_EAX_T0(void)
286{
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
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289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
d36cd60e 291 CC_DST = res;
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292 CC_SRC = (res != (int32_t)res);
293}
294
295void OPPROTO op_imulw_T0_T1(void)
296{
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
d36cd60e 300 CC_DST = res;
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301 CC_SRC = (res != (int16_t)res);
302}
303
304void OPPROTO op_imull_T0_T1(void)
305{
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
d36cd60e 309 CC_DST = res;
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310 CC_SRC = (res != (int32_t)res);
311}
312
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313#ifdef TARGET_X86_64
314void OPPROTO op_mulq_EAX_T0(void)
315{
316 helper_mulq_EAX_T0();
317}
318
319void OPPROTO op_imulq_EAX_T0(void)
320{
321 helper_imulq_EAX_T0();
322}
323
324void OPPROTO op_imulq_T0_T1(void)
325{
326 helper_imulq_T0_T1();
327}
328#endif
329
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330/* division, flags are undefined */
331/* XXX: add exceptions for overflow */
332
333void OPPROTO op_divb_AL_T0(void)
334{
335 unsigned int num, den, q, r;
336
337 num = (EAX & 0xffff);
338 den = (T0 & 0xff);
339 if (den == 0) {
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340 raise_exception(EXCP00_DIVZ);
341 }
342 q = (num / den) & 0xff;
343 r = (num % den) & 0xff;
14ce26e7 344 EAX = (EAX & ~0xffff) | (r << 8) | q;
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345}
346
347void OPPROTO op_idivb_AL_T0(void)
348{
349 int num, den, q, r;
350
351 num = (int16_t)EAX;
352 den = (int8_t)T0;
353 if (den == 0) {
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354 raise_exception(EXCP00_DIVZ);
355 }
356 q = (num / den) & 0xff;
357 r = (num % den) & 0xff;
14ce26e7 358 EAX = (EAX & ~0xffff) | (r << 8) | q;
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359}
360
361void OPPROTO op_divw_AX_T0(void)
362{
363 unsigned int num, den, q, r;
364
365 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
366 den = (T0 & 0xffff);
367 if (den == 0) {
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368 raise_exception(EXCP00_DIVZ);
369 }
370 q = (num / den) & 0xffff;
371 r = (num % den) & 0xffff;
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372 EAX = (EAX & ~0xffff) | q;
373 EDX = (EDX & ~0xffff) | r;
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374}
375
376void OPPROTO op_idivw_AX_T0(void)
377{
378 int num, den, q, r;
379
380 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
381 den = (int16_t)T0;
382 if (den == 0) {
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383 raise_exception(EXCP00_DIVZ);
384 }
385 q = (num / den) & 0xffff;
386 r = (num % den) & 0xffff;
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387 EAX = (EAX & ~0xffff) | q;
388 EDX = (EDX & ~0xffff) | r;
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389}
390
391void OPPROTO op_divl_EAX_T0(void)
392{
14ce26e7 393 helper_divl_EAX_T0();
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394}
395
396void OPPROTO op_idivl_EAX_T0(void)
397{
14ce26e7 398 helper_idivl_EAX_T0();
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399}
400
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401#ifdef TARGET_X86_64
402void OPPROTO op_divq_EAX_T0(void)
403{
404 helper_divq_EAX_T0();
405}
406
407void OPPROTO op_idivq_EAX_T0(void)
408{
409 helper_idivq_EAX_T0();
410}
411#endif
412
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413/* constant load & misc op */
414
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415/* XXX: consistent names */
416void OPPROTO op_movl_T0_imu(void)
417{
418 T0 = (uint32_t)PARAM1;
419}
420
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421void OPPROTO op_movl_T0_im(void)
422{
14ce26e7 423 T0 = (int32_t)PARAM1;
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424}
425
426void OPPROTO op_addl_T0_im(void)
427{
428 T0 += PARAM1;
429}
430
431void OPPROTO op_andl_T0_ffff(void)
432{
433 T0 = T0 & 0xffff;
434}
435
436void OPPROTO op_andl_T0_im(void)
437{
438 T0 = T0 & PARAM1;
439}
440
441void OPPROTO op_movl_T0_T1(void)
442{
443 T0 = T1;
444}
445
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446void OPPROTO op_movl_T1_imu(void)
447{
448 T1 = (uint32_t)PARAM1;
449}
450
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451void OPPROTO op_movl_T1_im(void)
452{
14ce26e7 453 T1 = (int32_t)PARAM1;
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454}
455
456void OPPROTO op_addl_T1_im(void)
457{
458 T1 += PARAM1;
459}
460
461void OPPROTO op_movl_T1_A0(void)
462{
463 T1 = A0;
464}
465
466void OPPROTO op_movl_A0_im(void)
467{
14ce26e7 468 A0 = (uint32_t)PARAM1;
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469}
470
471void OPPROTO op_addl_A0_im(void)
472{
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473 A0 = (uint32_t)(A0 + PARAM1);
474}
475
476void OPPROTO op_movl_A0_seg(void)
477{
478 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
479}
480
481void OPPROTO op_addl_A0_seg(void)
482{
483 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
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484}
485
486void OPPROTO op_addl_A0_AL(void)
487{
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488 A0 = (uint32_t)(A0 + (EAX & 0xff));
489}
490
491#ifdef WORDS_BIGENDIAN
492typedef union UREG64 {
493 struct { uint16_t v3, v2, v1, v0; } w;
494 struct { uint32_t v1, v0; } l;
495 uint64_t q;
496} UREG64;
497#else
498typedef union UREG64 {
499 struct { uint16_t v0, v1, v2, v3; } w;
500 struct { uint32_t v0, v1; } l;
501 uint64_t q;
502} UREG64;
503#endif
504
505#ifdef TARGET_X86_64
506
507#define PARAMQ1 \
508({\
509 UREG64 __p;\
510 __p.l.v1 = PARAM1;\
511 __p.l.v0 = PARAM2;\
512 __p.q;\
513})
514
515void OPPROTO op_movq_T0_im64(void)
516{
517 T0 = PARAMQ1;
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518}
519
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520void OPPROTO op_movq_T1_im64(void)
521{
522 T1 = PARAMQ1;
523}
524
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525void OPPROTO op_movq_A0_im(void)
526{
527 A0 = (int32_t)PARAM1;
528}
529
530void OPPROTO op_movq_A0_im64(void)
531{
532 A0 = PARAMQ1;
533}
534
535void OPPROTO op_addq_A0_im(void)
536{
537 A0 = (A0 + (int32_t)PARAM1);
538}
539
540void OPPROTO op_addq_A0_im64(void)
541{
542 A0 = (A0 + PARAMQ1);
543}
544
545void OPPROTO op_movq_A0_seg(void)
546{
547 A0 = *(target_ulong *)((char *)env + PARAM1);
548}
549
550void OPPROTO op_addq_A0_seg(void)
551{
552 A0 += *(target_ulong *)((char *)env + PARAM1);
553}
554
555void OPPROTO op_addq_A0_AL(void)
556{
557 A0 = (A0 + (EAX & 0xff));
558}
559
560#endif
561
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562void OPPROTO op_andl_A0_ffff(void)
563{
564 A0 = A0 & 0xffff;
565}
566
567/* memory access */
568
61382a50 569#define MEMSUFFIX _raw
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570#include "ops_mem.h"
571
61382a50 572#if !defined(CONFIG_USER_ONLY)
f68dd770 573#define MEMSUFFIX _kernel
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574#include "ops_mem.h"
575
f68dd770 576#define MEMSUFFIX _user
2c0262af 577#include "ops_mem.h"
61382a50 578#endif
2c0262af 579
14ce26e7 580/* indirect jump */
2c0262af 581
14ce26e7 582void OPPROTO op_jmp_T0(void)
2c0262af 583{
14ce26e7 584 EIP = T0;
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585}
586
14ce26e7 587void OPPROTO op_movl_eip_im(void)
2c0262af 588{
14ce26e7 589 EIP = (uint32_t)PARAM1;
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590}
591
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592#ifdef TARGET_X86_64
593void OPPROTO op_movq_eip_im(void)
2c0262af 594{
14ce26e7 595 EIP = (int32_t)PARAM1;
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596}
597
14ce26e7 598void OPPROTO op_movq_eip_im64(void)
2c0262af 599{
14ce26e7 600 EIP = PARAMQ1;
2c0262af 601}
14ce26e7 602#endif
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603
604void OPPROTO op_hlt(void)
605{
acf5feac 606 env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
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607 env->exception_index = EXCP_HLT;
608 cpu_loop_exit();
609}
610
611void OPPROTO op_debug(void)
612{
613 env->exception_index = EXCP_DEBUG;
614 cpu_loop_exit();
615}
616
617void OPPROTO op_raise_interrupt(void)
618{
a8ede8ba 619 int intno, next_eip_addend;
2c0262af 620 intno = PARAM1;
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621 next_eip_addend = PARAM2;
622 raise_interrupt(intno, 1, 0, next_eip_addend);
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623}
624
625void OPPROTO op_raise_exception(void)
626{
627 int exception_index;
628 exception_index = PARAM1;
629 raise_exception(exception_index);
630}
631
632void OPPROTO op_into(void)
633{
634 int eflags;
635 eflags = cc_table[CC_OP].compute_all();
636 if (eflags & CC_O) {
637 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
638 }
639 FORCE_RET();
640}
641
642void OPPROTO op_cli(void)
643{
644 env->eflags &= ~IF_MASK;
645}
646
647void OPPROTO op_sti(void)
648{
649 env->eflags |= IF_MASK;
650}
651
652void OPPROTO op_set_inhibit_irq(void)
653{
654 env->hflags |= HF_INHIBIT_IRQ_MASK;
655}
656
657void OPPROTO op_reset_inhibit_irq(void)
658{
659 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
660}
661
662#if 0
663/* vm86plus instructions */
664void OPPROTO op_cli_vm(void)
665{
666 env->eflags &= ~VIF_MASK;
667}
668
669void OPPROTO op_sti_vm(void)
670{
671 env->eflags |= VIF_MASK;
672 if (env->eflags & VIP_MASK) {
673 EIP = PARAM1;
674 raise_exception(EXCP0D_GPF);
675 }
676 FORCE_RET();
677}
678#endif
679
680void OPPROTO op_boundw(void)
681{
682 int low, high, v;
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683 low = ldsw(A0);
684 high = ldsw(A0 + 2);
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685 v = (int16_t)T0;
686 if (v < low || v > high) {
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687 raise_exception(EXCP05_BOUND);
688 }
689 FORCE_RET();
690}
691
692void OPPROTO op_boundl(void)
693{
694 int low, high, v;
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695 low = ldl(A0);
696 high = ldl(A0 + 4);
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697 v = T0;
698 if (v < low || v > high) {
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699 raise_exception(EXCP05_BOUND);
700 }
701 FORCE_RET();
702}
703
704void OPPROTO op_cmpxchg8b(void)
705{
706 helper_cmpxchg8b();
707}
708
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709void OPPROTO op_movl_T0_0(void)
710{
711 T0 = 0;
712}
713
714void OPPROTO op_exit_tb(void)
715{
716 EXIT_TB();
717}
718
719/* multiple size ops */
720
721#define ldul ldl
722
723#define SHIFT 0
724#include "ops_template.h"
725#undef SHIFT
726
727#define SHIFT 1
728#include "ops_template.h"
729#undef SHIFT
730
731#define SHIFT 2
732#include "ops_template.h"
733#undef SHIFT
734
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735#ifdef TARGET_X86_64
736
737#define SHIFT 3
738#include "ops_template.h"
739#undef SHIFT
740
741#endif
742
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743/* sign extend */
744
745void OPPROTO op_movsbl_T0_T0(void)
746{
747 T0 = (int8_t)T0;
748}
749
750void OPPROTO op_movzbl_T0_T0(void)
751{
752 T0 = (uint8_t)T0;
753}
754
755void OPPROTO op_movswl_T0_T0(void)
756{
757 T0 = (int16_t)T0;
758}
759
760void OPPROTO op_movzwl_T0_T0(void)
761{
762 T0 = (uint16_t)T0;
763}
764
765void OPPROTO op_movswl_EAX_AX(void)
766{
767 EAX = (int16_t)EAX;
768}
769
14ce26e7 770#ifdef TARGET_X86_64
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771void OPPROTO op_movslq_T0_T0(void)
772{
773 T0 = (int32_t)T0;
774}
775
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776void OPPROTO op_movslq_RAX_EAX(void)
777{
778 EAX = (int32_t)EAX;
779}
780#endif
781
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782void OPPROTO op_movsbw_AX_AL(void)
783{
14ce26e7 784 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
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785}
786
787void OPPROTO op_movslq_EDX_EAX(void)
788{
789 EDX = (int32_t)EAX >> 31;
790}
791
792void OPPROTO op_movswl_DX_AX(void)
793{
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794 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
795}
796
797#ifdef TARGET_X86_64
798void OPPROTO op_movsqo_RDX_RAX(void)
799{
800 EDX = (int64_t)EAX >> 63;
2c0262af 801}
14ce26e7 802#endif
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803
804/* string ops helpers */
805
806void OPPROTO op_addl_ESI_T0(void)
807{
14ce26e7 808 ESI = (uint32_t)(ESI + T0);
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809}
810
811void OPPROTO op_addw_ESI_T0(void)
812{
813 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
814}
815
816void OPPROTO op_addl_EDI_T0(void)
817{
14ce26e7 818 EDI = (uint32_t)(EDI + T0);
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819}
820
821void OPPROTO op_addw_EDI_T0(void)
822{
823 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
824}
825
826void OPPROTO op_decl_ECX(void)
827{
14ce26e7 828 ECX = (uint32_t)(ECX - 1);
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829}
830
831void OPPROTO op_decw_ECX(void)
832{
833 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
834}
835
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836#ifdef TARGET_X86_64
837void OPPROTO op_addq_ESI_T0(void)
838{
839 ESI = (ESI + T0);
840}
841
842void OPPROTO op_addq_EDI_T0(void)
843{
844 EDI = (EDI + T0);
845}
846
847void OPPROTO op_decq_ECX(void)
848{
849 ECX--;
850}
851#endif
852
f68dd770 853/* push/pop utils */
2c0262af 854
f68dd770 855void op_addl_A0_SS(void)
2c0262af 856{
f68dd770 857 A0 += (long)env->segs[R_SS].base;
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858}
859
f68dd770 860void op_subl_A0_2(void)
2c0262af 861{
14ce26e7 862 A0 = (uint32_t)(A0 - 2);
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863}
864
f68dd770 865void op_subl_A0_4(void)
2c0262af 866{
14ce26e7 867 A0 = (uint32_t)(A0 - 4);
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868}
869
870void op_addl_ESP_4(void)
871{
14ce26e7 872 ESP = (uint32_t)(ESP + 4);
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873}
874
875void op_addl_ESP_2(void)
876{
14ce26e7 877 ESP = (uint32_t)(ESP + 2);
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878}
879
880void op_addw_ESP_4(void)
881{
882 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
883}
884
885void op_addw_ESP_2(void)
886{
887 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
888}
889
890void op_addl_ESP_im(void)
891{
14ce26e7 892 ESP = (uint32_t)(ESP + PARAM1);
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893}
894
895void op_addw_ESP_im(void)
896{
897 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
898}
899
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900#ifdef TARGET_X86_64
901void op_subq_A0_8(void)
902{
903 A0 -= 8;
904}
905
906void op_addq_ESP_8(void)
907{
908 ESP += 8;
909}
910
911void op_addq_ESP_im(void)
912{
913 ESP += PARAM1;
914}
915#endif
916
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917void OPPROTO op_rdtsc(void)
918{
919 helper_rdtsc();
920}
921
922void OPPROTO op_cpuid(void)
923{
924 helper_cpuid();
925}
926
61a8c4ec
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927void OPPROTO op_enter_level(void)
928{
929 helper_enter_level(PARAM1, PARAM2);
930}
931
023fe10d
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932void OPPROTO op_sysenter(void)
933{
934 helper_sysenter();
935}
936
937void OPPROTO op_sysexit(void)
938{
939 helper_sysexit();
940}
941
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942#ifdef TARGET_X86_64
943void OPPROTO op_syscall(void)
944{
06c2f506 945 helper_syscall(PARAM1);
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946}
947
948void OPPROTO op_sysret(void)
949{
950 helper_sysret(PARAM1);
951}
952#endif
953
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954void OPPROTO op_rdmsr(void)
955{
956 helper_rdmsr();
957}
958
959void OPPROTO op_wrmsr(void)
960{
961 helper_wrmsr();
962}
963
964/* bcd */
965
966/* XXX: exception */
967void OPPROTO op_aam(void)
968{
969 int base = PARAM1;
970 int al, ah;
971 al = EAX & 0xff;
972 ah = al / base;
973 al = al % base;
974 EAX = (EAX & ~0xffff) | al | (ah << 8);
975 CC_DST = al;
976}
977
978void OPPROTO op_aad(void)
979{
980 int base = PARAM1;
981 int al, ah;
982 al = EAX & 0xff;
983 ah = (EAX >> 8) & 0xff;
984 al = ((ah * base) + al) & 0xff;
985 EAX = (EAX & ~0xffff) | al;
986 CC_DST = al;
987}
988
989void OPPROTO op_aaa(void)
990{
991 int icarry;
992 int al, ah, af;
993 int eflags;
994
995 eflags = cc_table[CC_OP].compute_all();
996 af = eflags & CC_A;
997 al = EAX & 0xff;
998 ah = (EAX >> 8) & 0xff;
999
1000 icarry = (al > 0xf9);
1001 if (((al & 0x0f) > 9 ) || af) {
1002 al = (al + 6) & 0x0f;
1003 ah = (ah + 1 + icarry) & 0xff;
1004 eflags |= CC_C | CC_A;
1005 } else {
1006 eflags &= ~(CC_C | CC_A);
1007 al &= 0x0f;
1008 }
1009 EAX = (EAX & ~0xffff) | al | (ah << 8);
1010 CC_SRC = eflags;
1011}
1012
1013void OPPROTO op_aas(void)
1014{
1015 int icarry;
1016 int al, ah, af;
1017 int eflags;
1018
1019 eflags = cc_table[CC_OP].compute_all();
1020 af = eflags & CC_A;
1021 al = EAX & 0xff;
1022 ah = (EAX >> 8) & 0xff;
1023
1024 icarry = (al < 6);
1025 if (((al & 0x0f) > 9 ) || af) {
1026 al = (al - 6) & 0x0f;
1027 ah = (ah - 1 - icarry) & 0xff;
1028 eflags |= CC_C | CC_A;
1029 } else {
1030 eflags &= ~(CC_C | CC_A);
1031 al &= 0x0f;
1032 }
1033 EAX = (EAX & ~0xffff) | al | (ah << 8);
1034 CC_SRC = eflags;
1035}
1036
1037void OPPROTO op_daa(void)
1038{
1039 int al, af, cf;
1040 int eflags;
1041
1042 eflags = cc_table[CC_OP].compute_all();
1043 cf = eflags & CC_C;
1044 af = eflags & CC_A;
1045 al = EAX & 0xff;
1046
1047 eflags = 0;
1048 if (((al & 0x0f) > 9 ) || af) {
1049 al = (al + 6) & 0xff;
1050 eflags |= CC_A;
1051 }
1052 if ((al > 0x9f) || cf) {
1053 al = (al + 0x60) & 0xff;
1054 eflags |= CC_C;
1055 }
1056 EAX = (EAX & ~0xff) | al;
1057 /* well, speed is not an issue here, so we compute the flags by hand */
1058 eflags |= (al == 0) << 6; /* zf */
1059 eflags |= parity_table[al]; /* pf */
1060 eflags |= (al & 0x80); /* sf */
1061 CC_SRC = eflags;
1062}
1063
1064void OPPROTO op_das(void)
1065{
1066 int al, al1, af, cf;
1067 int eflags;
1068
1069 eflags = cc_table[CC_OP].compute_all();
1070 cf = eflags & CC_C;
1071 af = eflags & CC_A;
1072 al = EAX & 0xff;
1073
1074 eflags = 0;
1075 al1 = al;
1076 if (((al & 0x0f) > 9 ) || af) {
1077 eflags |= CC_A;
1078 if (al < 6 || cf)
1079 eflags |= CC_C;
1080 al = (al - 6) & 0xff;
1081 }
1082 if ((al1 > 0x99) || cf) {
1083 al = (al - 0x60) & 0xff;
1084 eflags |= CC_C;
1085 }
1086 EAX = (EAX & ~0xff) | al;
1087 /* well, speed is not an issue here, so we compute the flags by hand */
1088 eflags |= (al == 0) << 6; /* zf */
1089 eflags |= parity_table[al]; /* pf */
1090 eflags |= (al & 0x80); /* sf */
1091 CC_SRC = eflags;
1092}
1093
1094/* segment handling */
1095
1096/* never use it with R_CS */
1097void OPPROTO op_movl_seg_T0(void)
1098{
3415a4dd 1099 load_seg(PARAM1, T0);
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1100}
1101
1102/* faster VM86 version */
1103void OPPROTO op_movl_seg_T0_vm(void)
1104{
1105 int selector;
1106 SegmentCache *sc;
1107
1108 selector = T0 & 0xffff;
1109 /* env->segs[] access */
1110 sc = (SegmentCache *)((char *)env + PARAM1);
1111 sc->selector = selector;
14ce26e7 1112 sc->base = (selector << 4);
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1113}
1114
1115void OPPROTO op_movl_T0_seg(void)
1116{
1117 T0 = env->segs[PARAM1].selector;
1118}
1119
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1120void OPPROTO op_lsl(void)
1121{
1122 helper_lsl();
1123}
1124
1125void OPPROTO op_lar(void)
1126{
1127 helper_lar();
1128}
1129
3ab493de
FB
1130void OPPROTO op_verr(void)
1131{
1132 helper_verr();
1133}
1134
1135void OPPROTO op_verw(void)
1136{
1137 helper_verw();
1138}
1139
1140void OPPROTO op_arpl(void)
1141{
1142 if ((T0 & 3) < (T1 & 3)) {
1143 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1144 T0 = (T0 & ~3) | (T1 & 3);
1145 T1 = CC_Z;
1146 } else {
1147 T1 = 0;
1148 }
1149 FORCE_RET();
1150}
1151
1152void OPPROTO op_arpl_update(void)
1153{
1154 int eflags;
1155 eflags = cc_table[CC_OP].compute_all();
1156 CC_SRC = (eflags & ~CC_Z) | T1;
1157}
1158
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FB
1159/* T0: segment, T1:eip */
1160void OPPROTO op_ljmp_protected_T0_T1(void)
1161{
08cea4ee 1162 helper_ljmp_protected_T0_T1(PARAM1);
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1163}
1164
1165void OPPROTO op_lcall_real_T0_T1(void)
1166{
1167 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1168}
1169
1170void OPPROTO op_lcall_protected_T0_T1(void)
1171{
1172 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1173}
1174
1175void OPPROTO op_iret_real(void)
1176{
1177 helper_iret_real(PARAM1);
1178}
1179
1180void OPPROTO op_iret_protected(void)
1181{
08cea4ee 1182 helper_iret_protected(PARAM1, PARAM2);
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FB
1183}
1184
1185void OPPROTO op_lret_protected(void)
1186{
1187 helper_lret_protected(PARAM1, PARAM2);
1188}
1189
1190void OPPROTO op_lldt_T0(void)
1191{
1192 helper_lldt_T0();
1193}
1194
1195void OPPROTO op_ltr_T0(void)
1196{
1197 helper_ltr_T0();
1198}
1199
1200/* CR registers access */
1201void OPPROTO op_movl_crN_T0(void)
1202{
1203 helper_movl_crN_T0(PARAM1);
1204}
1205
82e41634 1206#if !defined(CONFIG_USER_ONLY)
39c61f49
FB
1207void OPPROTO op_movtl_T0_cr8(void)
1208{
39c61f49 1209 T0 = cpu_get_apic_tpr(env);
39c61f49 1210}
82e41634 1211#endif
39c61f49 1212
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1213/* DR registers access */
1214void OPPROTO op_movl_drN_T0(void)
1215{
1216 helper_movl_drN_T0(PARAM1);
1217}
1218
1219void OPPROTO op_lmsw_T0(void)
1220{
710c15a2
FB
1221 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1222 if already set to one. */
1223 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
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FB
1224 helper_movl_crN_T0(0);
1225}
1226
1227void OPPROTO op_invlpg_A0(void)
1228{
1229 helper_invlpg(A0);
1230}
1231
1232void OPPROTO op_movl_T0_env(void)
1233{
1234 T0 = *(uint32_t *)((char *)env + PARAM1);
1235}
1236
1237void OPPROTO op_movl_env_T0(void)
1238{
1239 *(uint32_t *)((char *)env + PARAM1) = T0;
1240}
1241
1242void OPPROTO op_movl_env_T1(void)
1243{
1244 *(uint32_t *)((char *)env + PARAM1) = T1;
1245}
1246
14ce26e7
FB
1247void OPPROTO op_movtl_T0_env(void)
1248{
1249 T0 = *(target_ulong *)((char *)env + PARAM1);
1250}
1251
1252void OPPROTO op_movtl_env_T0(void)
1253{
1254 *(target_ulong *)((char *)env + PARAM1) = T0;
1255}
1256
1257void OPPROTO op_movtl_T1_env(void)
1258{
1259 T1 = *(target_ulong *)((char *)env + PARAM1);
1260}
1261
1262void OPPROTO op_movtl_env_T1(void)
1263{
1264 *(target_ulong *)((char *)env + PARAM1) = T1;
1265}
1266
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1267void OPPROTO op_clts(void)
1268{
1269 env->cr[0] &= ~CR0_TS_MASK;
7eee2a50 1270 env->hflags &= ~HF_TS_MASK;
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FB
1271}
1272
1273/* flags handling */
1274
14ce26e7 1275void OPPROTO op_goto_tb0(void)
2c0262af 1276{
ae063a68 1277 GOTO_TB(op_goto_tb0, PARAM1, 0);
14ce26e7
FB
1278}
1279
1280void OPPROTO op_goto_tb1(void)
1281{
ae063a68 1282 GOTO_TB(op_goto_tb1, PARAM1, 1);
14ce26e7
FB
1283}
1284
1285void OPPROTO op_jmp_label(void)
1286{
1287 GOTO_LABEL_PARAM(1);
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FB
1288}
1289
14ce26e7 1290void OPPROTO op_jnz_T0_label(void)
2c0262af
FB
1291{
1292 if (T0)
14ce26e7 1293 GOTO_LABEL_PARAM(1);
39c61f49 1294 FORCE_RET();
14ce26e7
FB
1295}
1296
1297void OPPROTO op_jz_T0_label(void)
1298{
1299 if (!T0)
1300 GOTO_LABEL_PARAM(1);
39c61f49 1301 FORCE_RET();
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FB
1302}
1303
1304/* slow set cases (compute x86 flags) */
1305void OPPROTO op_seto_T0_cc(void)
1306{
1307 int eflags;
1308 eflags = cc_table[CC_OP].compute_all();
1309 T0 = (eflags >> 11) & 1;
1310}
1311
1312void OPPROTO op_setb_T0_cc(void)
1313{
1314 T0 = cc_table[CC_OP].compute_c();
1315}
1316
1317void OPPROTO op_setz_T0_cc(void)
1318{
1319 int eflags;
1320 eflags = cc_table[CC_OP].compute_all();
1321 T0 = (eflags >> 6) & 1;
1322}
1323
1324void OPPROTO op_setbe_T0_cc(void)
1325{
1326 int eflags;
1327 eflags = cc_table[CC_OP].compute_all();
1328 T0 = (eflags & (CC_Z | CC_C)) != 0;
1329}
1330
1331void OPPROTO op_sets_T0_cc(void)
1332{
1333 int eflags;
1334 eflags = cc_table[CC_OP].compute_all();
1335 T0 = (eflags >> 7) & 1;
1336}
1337
1338void OPPROTO op_setp_T0_cc(void)
1339{
1340 int eflags;
1341 eflags = cc_table[CC_OP].compute_all();
1342 T0 = (eflags >> 2) & 1;
1343}
1344
1345void OPPROTO op_setl_T0_cc(void)
1346{
1347 int eflags;
1348 eflags = cc_table[CC_OP].compute_all();
1349 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1350}
1351
1352void OPPROTO op_setle_T0_cc(void)
1353{
1354 int eflags;
1355 eflags = cc_table[CC_OP].compute_all();
1356 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1357}
1358
1359void OPPROTO op_xor_T0_1(void)
1360{
1361 T0 ^= 1;
1362}
1363
1364void OPPROTO op_set_cc_op(void)
1365{
1366 CC_OP = PARAM1;
1367}
1368
0b9dc5e4
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1369void OPPROTO op_mov_T0_cc(void)
1370{
1371 T0 = cc_table[CC_OP].compute_all();
1372}
1373
4136f33c 1374/* XXX: clear VIF/VIP in all ops ? */
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1375
1376void OPPROTO op_movl_eflags_T0(void)
1377{
4b7aba51 1378 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
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1379}
1380
1381void OPPROTO op_movw_eflags_T0(void)
1382{
4b7aba51 1383 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
4136f33c
FB
1384}
1385
1386void OPPROTO op_movl_eflags_T0_io(void)
1387{
4b7aba51 1388 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
4136f33c
FB
1389}
1390
1391void OPPROTO op_movw_eflags_T0_io(void)
1392{
4b7aba51 1393 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
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1394}
1395
1396void OPPROTO op_movl_eflags_T0_cpl0(void)
1397{
4b7aba51 1398 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
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1399}
1400
1401void OPPROTO op_movw_eflags_T0_cpl0(void)
1402{
4b7aba51 1403 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
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1404}
1405
1406#if 0
1407/* vm86plus version */
1408void OPPROTO op_movw_eflags_T0_vm(void)
1409{
1410 int eflags;
1411 eflags = T0;
1412 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1413 DF = 1 - (2 * ((eflags >> 10) & 1));
1414 /* we also update some system flags as in user mode */
1415 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1416 (eflags & FL_UPDATE_MASK16);
1417 if (eflags & IF_MASK) {
1418 env->eflags |= VIF_MASK;
1419 if (env->eflags & VIP_MASK) {
1420 EIP = PARAM1;
1421 raise_exception(EXCP0D_GPF);
1422 }
1423 }
1424 FORCE_RET();
1425}
1426
1427void OPPROTO op_movl_eflags_T0_vm(void)
1428{
1429 int eflags;
1430 eflags = T0;
1431 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1432 DF = 1 - (2 * ((eflags >> 10) & 1));
1433 /* we also update some system flags as in user mode */
1434 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1435 (eflags & FL_UPDATE_MASK32);
1436 if (eflags & IF_MASK) {
1437 env->eflags |= VIF_MASK;
1438 if (env->eflags & VIP_MASK) {
1439 EIP = PARAM1;
1440 raise_exception(EXCP0D_GPF);
1441 }
1442 }
1443 FORCE_RET();
1444}
1445#endif
1446
1447/* XXX: compute only O flag */
1448void OPPROTO op_movb_eflags_T0(void)
1449{
1450 int of;
1451 of = cc_table[CC_OP].compute_all() & CC_O;
1452 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1453}
1454
1455void OPPROTO op_movl_T0_eflags(void)
1456{
1457 int eflags;
1458 eflags = cc_table[CC_OP].compute_all();
1459 eflags |= (DF & DF_MASK);
1460 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1461 T0 = eflags;
1462}
1463
1464/* vm86plus version */
1465#if 0
1466void OPPROTO op_movl_T0_eflags_vm(void)
1467{
1468 int eflags;
1469 eflags = cc_table[CC_OP].compute_all();
1470 eflags |= (DF & DF_MASK);
1471 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1472 if (env->eflags & VIF_MASK)
1473 eflags |= IF_MASK;
1474 T0 = eflags;
1475}
1476#endif
1477
1478void OPPROTO op_cld(void)
1479{
1480 DF = 1;
1481}
1482
1483void OPPROTO op_std(void)
1484{
1485 DF = -1;
1486}
1487
1488void OPPROTO op_clc(void)
1489{
1490 int eflags;
1491 eflags = cc_table[CC_OP].compute_all();
1492 eflags &= ~CC_C;
1493 CC_SRC = eflags;
1494}
1495
1496void OPPROTO op_stc(void)
1497{
1498 int eflags;
1499 eflags = cc_table[CC_OP].compute_all();
1500 eflags |= CC_C;
1501 CC_SRC = eflags;
1502}
1503
1504void OPPROTO op_cmc(void)
1505{
1506 int eflags;
1507 eflags = cc_table[CC_OP].compute_all();
1508 eflags ^= CC_C;
1509 CC_SRC = eflags;
1510}
1511
1512void OPPROTO op_salc(void)
1513{
1514 int cf;
1515 cf = cc_table[CC_OP].compute_c();
1516 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1517}
1518
1519static int compute_all_eflags(void)
1520{
1521 return CC_SRC;
1522}
1523
1524static int compute_c_eflags(void)
1525{
1526 return CC_SRC & CC_C;
1527}
1528
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1529CCTable cc_table[CC_OP_NB] = {
1530 [CC_OP_DYNAMIC] = { /* should never happen */ },
1531
1532 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1533
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1534 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1535 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1536 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
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1537
1538 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1539 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1540 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1541
1542 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1543 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1544 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1545
1546 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1547 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1548 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1549
1550 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1551 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1552 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1553
1554 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1555 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1556 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1557
1558 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1559 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1560 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1561
1562 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1563 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1564 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1565
1566 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1567 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1568 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1569
1570 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1571 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1572 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
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1573
1574#ifdef TARGET_X86_64
1575 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1576
1577 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1578
1579 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1580
1581 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1582
1583 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1584
1585 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1586
1587 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1588
1589 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1590
1591 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1592
1593 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1594#endif
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1595};
1596
1597/* floating point support. Some of the code for complicated x87
1598 functions comes from the LGPL'ed x86 emulator found in the Willows
1599 TWIN windows emulator. */
1600
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1601/* fp load FT0 */
1602
1603void OPPROTO op_flds_FT0_A0(void)
1604{
1605#ifdef USE_FP_CONVERT
14ce26e7 1606 FP_CONVERT.i32 = ldl(A0);
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1607 FT0 = FP_CONVERT.f;
1608#else
14ce26e7 1609 FT0 = ldfl(A0);
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1610#endif
1611}
1612
1613void OPPROTO op_fldl_FT0_A0(void)
1614{
1615#ifdef USE_FP_CONVERT
14ce26e7 1616 FP_CONVERT.i64 = ldq(A0);
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1617 FT0 = FP_CONVERT.d;
1618#else
14ce26e7 1619 FT0 = ldfq(A0);
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1620#endif
1621}
1622
1623/* helpers are needed to avoid static constant reference. XXX: find a better way */
1624#ifdef USE_INT_TO_FLOAT_HELPERS
1625
1626void helper_fild_FT0_A0(void)
1627{
14ce26e7 1628 FT0 = (CPU86_LDouble)ldsw(A0);
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1629}
1630
1631void helper_fildl_FT0_A0(void)
1632{
14ce26e7 1633 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
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1634}
1635
1636void helper_fildll_FT0_A0(void)
1637{
14ce26e7 1638 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
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1639}
1640
1641void OPPROTO op_fild_FT0_A0(void)
1642{
1643 helper_fild_FT0_A0();
1644}
1645
1646void OPPROTO op_fildl_FT0_A0(void)
1647{
1648 helper_fildl_FT0_A0();
1649}
1650
1651void OPPROTO op_fildll_FT0_A0(void)
1652{
1653 helper_fildll_FT0_A0();
1654}
1655
1656#else
1657
1658void OPPROTO op_fild_FT0_A0(void)
1659{
1660#ifdef USE_FP_CONVERT
14ce26e7 1661 FP_CONVERT.i32 = ldsw(A0);
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1662 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1663#else
14ce26e7 1664 FT0 = (CPU86_LDouble)ldsw(A0);
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1665#endif
1666}
1667
1668void OPPROTO op_fildl_FT0_A0(void)
1669{
1670#ifdef USE_FP_CONVERT
14ce26e7 1671 FP_CONVERT.i32 = (int32_t) ldl(A0);
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1672 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1673#else
14ce26e7 1674 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
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1675#endif
1676}
1677
1678void OPPROTO op_fildll_FT0_A0(void)
1679{
1680#ifdef USE_FP_CONVERT
14ce26e7 1681 FP_CONVERT.i64 = (int64_t) ldq(A0);
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1682 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1683#else
14ce26e7 1684 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
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1685#endif
1686}
1687#endif
1688
1689/* fp load ST0 */
1690
1691void OPPROTO op_flds_ST0_A0(void)
1692{
1693 int new_fpstt;
1694 new_fpstt = (env->fpstt - 1) & 7;
1695#ifdef USE_FP_CONVERT
14ce26e7 1696 FP_CONVERT.i32 = ldl(A0);
664e0f19 1697 env->fpregs[new_fpstt].d = FP_CONVERT.f;
2c0262af 1698#else
664e0f19 1699 env->fpregs[new_fpstt].d = ldfl(A0);
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1700#endif
1701 env->fpstt = new_fpstt;
1702 env->fptags[new_fpstt] = 0; /* validate stack entry */
1703}
1704
1705void OPPROTO op_fldl_ST0_A0(void)
1706{
1707 int new_fpstt;
1708 new_fpstt = (env->fpstt - 1) & 7;
1709#ifdef USE_FP_CONVERT
14ce26e7 1710 FP_CONVERT.i64 = ldq(A0);
664e0f19 1711 env->fpregs[new_fpstt].d = FP_CONVERT.d;
2c0262af 1712#else
664e0f19 1713 env->fpregs[new_fpstt].d = ldfq(A0);
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1714#endif
1715 env->fpstt = new_fpstt;
1716 env->fptags[new_fpstt] = 0; /* validate stack entry */
1717}
1718
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1719void OPPROTO op_fldt_ST0_A0(void)
1720{
1721 helper_fldt_ST0_A0();
1722}
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1723
1724/* helpers are needed to avoid static constant reference. XXX: find a better way */
1725#ifdef USE_INT_TO_FLOAT_HELPERS
1726
1727void helper_fild_ST0_A0(void)
1728{
1729 int new_fpstt;
1730 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1731 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
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1732 env->fpstt = new_fpstt;
1733 env->fptags[new_fpstt] = 0; /* validate stack entry */
1734}
1735
1736void helper_fildl_ST0_A0(void)
1737{
1738 int new_fpstt;
1739 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1740 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
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1741 env->fpstt = new_fpstt;
1742 env->fptags[new_fpstt] = 0; /* validate stack entry */
1743}
1744
1745void helper_fildll_ST0_A0(void)
1746{
1747 int new_fpstt;
1748 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1749 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
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1750 env->fpstt = new_fpstt;
1751 env->fptags[new_fpstt] = 0; /* validate stack entry */
1752}
1753
1754void OPPROTO op_fild_ST0_A0(void)
1755{
1756 helper_fild_ST0_A0();
1757}
1758
1759void OPPROTO op_fildl_ST0_A0(void)
1760{
1761 helper_fildl_ST0_A0();
1762}
1763
1764void OPPROTO op_fildll_ST0_A0(void)
1765{
1766 helper_fildll_ST0_A0();
1767}
1768
1769#else
1770
1771void OPPROTO op_fild_ST0_A0(void)
1772{
1773 int new_fpstt;
1774 new_fpstt = (env->fpstt - 1) & 7;
1775#ifdef USE_FP_CONVERT
14ce26e7 1776 FP_CONVERT.i32 = ldsw(A0);
664e0f19 1777 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1778#else
664e0f19 1779 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
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1780#endif
1781 env->fpstt = new_fpstt;
1782 env->fptags[new_fpstt] = 0; /* validate stack entry */
1783}
1784
1785void OPPROTO op_fildl_ST0_A0(void)
1786{
1787 int new_fpstt;
1788 new_fpstt = (env->fpstt - 1) & 7;
1789#ifdef USE_FP_CONVERT
14ce26e7 1790 FP_CONVERT.i32 = (int32_t) ldl(A0);
664e0f19 1791 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1792#else
664e0f19 1793 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
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1794#endif
1795 env->fpstt = new_fpstt;
1796 env->fptags[new_fpstt] = 0; /* validate stack entry */
1797}
1798
1799void OPPROTO op_fildll_ST0_A0(void)
1800{
1801 int new_fpstt;
1802 new_fpstt = (env->fpstt - 1) & 7;
1803#ifdef USE_FP_CONVERT
14ce26e7 1804 FP_CONVERT.i64 = (int64_t) ldq(A0);
664e0f19 1805 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
2c0262af 1806#else
664e0f19 1807 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
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1808#endif
1809 env->fpstt = new_fpstt;
1810 env->fptags[new_fpstt] = 0; /* validate stack entry */
1811}
1812
1813#endif
1814
1815/* fp store */
1816
1817void OPPROTO op_fsts_ST0_A0(void)
1818{
1819#ifdef USE_FP_CONVERT
1820 FP_CONVERT.f = (float)ST0;
14ce26e7 1821 stfl(A0, FP_CONVERT.f);
2c0262af 1822#else
14ce26e7 1823 stfl(A0, (float)ST0);
2c0262af 1824#endif
6eea2b1b 1825 FORCE_RET();
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1826}
1827
1828void OPPROTO op_fstl_ST0_A0(void)
1829{
14ce26e7 1830 stfq(A0, (double)ST0);
6eea2b1b 1831 FORCE_RET();
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1832}
1833
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1834void OPPROTO op_fstt_ST0_A0(void)
1835{
1836 helper_fstt_ST0_A0();
1837}
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1838
1839void OPPROTO op_fist_ST0_A0(void)
1840{
1841#if defined(__sparc__) && !defined(__sparc_v9__)
1842 register CPU86_LDouble d asm("o0");
1843#else
1844 CPU86_LDouble d;
1845#endif
1846 int val;
1847
1848 d = ST0;
7a0e1f41 1849 val = floatx_to_int32(d, &env->fp_status);
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1850 if (val != (int16_t)val)
1851 val = -32768;
14ce26e7 1852 stw(A0, val);
6eea2b1b 1853 FORCE_RET();
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1854}
1855
1856void OPPROTO op_fistl_ST0_A0(void)
1857{
1858#if defined(__sparc__) && !defined(__sparc_v9__)
1859 register CPU86_LDouble d asm("o0");
1860#else
1861 CPU86_LDouble d;
1862#endif
1863 int val;
1864
1865 d = ST0;
7a0e1f41 1866 val = floatx_to_int32(d, &env->fp_status);
14ce26e7 1867 stl(A0, val);
6eea2b1b 1868 FORCE_RET();
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1869}
1870
1871void OPPROTO op_fistll_ST0_A0(void)
1872{
1873#if defined(__sparc__) && !defined(__sparc_v9__)
1874 register CPU86_LDouble d asm("o0");
1875#else
1876 CPU86_LDouble d;
1877#endif
1878 int64_t val;
1879
1880 d = ST0;
7a0e1f41 1881 val = floatx_to_int64(d, &env->fp_status);
14ce26e7 1882 stq(A0, val);
6eea2b1b 1883 FORCE_RET();
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1884}
1885
1886void OPPROTO op_fbld_ST0_A0(void)
1887{
1888 helper_fbld_ST0_A0();
1889}
1890
1891void OPPROTO op_fbst_ST0_A0(void)
1892{
1893 helper_fbst_ST0_A0();
1894}
1895
1896/* FPU move */
1897
1898void OPPROTO op_fpush(void)
1899{
1900 fpush();
1901}
1902
1903void OPPROTO op_fpop(void)
1904{
1905 fpop();
1906}
1907
1908void OPPROTO op_fdecstp(void)
1909{
1910 env->fpstt = (env->fpstt - 1) & 7;
1911 env->fpus &= (~0x4700);
1912}
1913
1914void OPPROTO op_fincstp(void)
1915{
1916 env->fpstt = (env->fpstt + 1) & 7;
1917 env->fpus &= (~0x4700);
1918}
1919
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1920void OPPROTO op_ffree_STN(void)
1921{
1922 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1923}
1924
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1925void OPPROTO op_fmov_ST0_FT0(void)
1926{
1927 ST0 = FT0;
1928}
1929
1930void OPPROTO op_fmov_FT0_STN(void)
1931{
1932 FT0 = ST(PARAM1);
1933}
1934
1935void OPPROTO op_fmov_ST0_STN(void)
1936{
1937 ST0 = ST(PARAM1);
1938}
1939
1940void OPPROTO op_fmov_STN_ST0(void)
1941{
1942 ST(PARAM1) = ST0;
1943}
1944
1945void OPPROTO op_fxchg_ST0_STN(void)
1946{
1947 CPU86_LDouble tmp;
1948 tmp = ST(PARAM1);
1949 ST(PARAM1) = ST0;
1950 ST0 = tmp;
1951}
1952
1953/* FPU operations */
1954
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1955const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
1956
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1957void OPPROTO op_fcom_ST0_FT0(void)
1958{
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1959 int ret;
1960
1961 ret = floatx_compare(ST0, FT0, &env->fp_status);
1962 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
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1963 FORCE_RET();
1964}
1965
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1966void OPPROTO op_fucom_ST0_FT0(void)
1967{
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1968 int ret;
1969
1970 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
1971 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
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1972 FORCE_RET();
1973}
1974
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1975const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
1976
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1977void OPPROTO op_fcomi_ST0_FT0(void)
1978{
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1979 int eflags;
1980 int ret;
1981
1982 ret = floatx_compare(ST0, FT0, &env->fp_status);
2c0262af 1983 eflags = cc_table[CC_OP].compute_all();
43fb823b 1984 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
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1985 CC_SRC = eflags;
1986 FORCE_RET();
1987}
1988
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1989void OPPROTO op_fucomi_ST0_FT0(void)
1990{
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1991 int eflags;
1992 int ret;
1993
1994 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2c0262af 1995 eflags = cc_table[CC_OP].compute_all();
43fb823b 1996 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
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1997 CC_SRC = eflags;
1998 FORCE_RET();
1999}
2000
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2001void OPPROTO op_fcmov_ST0_STN_T0(void)
2002{
2003 if (T0) {
2004 ST0 = ST(PARAM1);
2005 }
2006 FORCE_RET();
2007}
2008
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2009void OPPROTO op_fadd_ST0_FT0(void)
2010{
2011 ST0 += FT0;
2012}
2013
2014void OPPROTO op_fmul_ST0_FT0(void)
2015{
2016 ST0 *= FT0;
2017}
2018
2019void OPPROTO op_fsub_ST0_FT0(void)
2020{
2021 ST0 -= FT0;
2022}
2023
2024void OPPROTO op_fsubr_ST0_FT0(void)
2025{
2026 ST0 = FT0 - ST0;
2027}
2028
2029void OPPROTO op_fdiv_ST0_FT0(void)
2030{
2ee73ac3 2031 ST0 = helper_fdiv(ST0, FT0);
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2032}
2033
2034void OPPROTO op_fdivr_ST0_FT0(void)
2035{
2ee73ac3 2036 ST0 = helper_fdiv(FT0, ST0);
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2037}
2038
2039/* fp operations between STN and ST0 */
2040
2041void OPPROTO op_fadd_STN_ST0(void)
2042{
2043 ST(PARAM1) += ST0;
2044}
2045
2046void OPPROTO op_fmul_STN_ST0(void)
2047{
2048 ST(PARAM1) *= ST0;
2049}
2050
2051void OPPROTO op_fsub_STN_ST0(void)
2052{
2053 ST(PARAM1) -= ST0;
2054}
2055
2056void OPPROTO op_fsubr_STN_ST0(void)
2057{
2058 CPU86_LDouble *p;
2059 p = &ST(PARAM1);
2060 *p = ST0 - *p;
2061}
2062
2063void OPPROTO op_fdiv_STN_ST0(void)
2064{
2ee73ac3
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2065 CPU86_LDouble *p;
2066 p = &ST(PARAM1);
2067 *p = helper_fdiv(*p, ST0);
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2068}
2069
2070void OPPROTO op_fdivr_STN_ST0(void)
2071{
2072 CPU86_LDouble *p;
2073 p = &ST(PARAM1);
2ee73ac3 2074 *p = helper_fdiv(ST0, *p);
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2075}
2076
2077/* misc FPU operations */
2078void OPPROTO op_fchs_ST0(void)
2079{
7a0e1f41 2080 ST0 = floatx_chs(ST0);
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2081}
2082
2083void OPPROTO op_fabs_ST0(void)
2084{
7a0e1f41 2085 ST0 = floatx_abs(ST0);
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2086}
2087
2088void OPPROTO op_fxam_ST0(void)
2089{
2090 helper_fxam_ST0();
2091}
2092
2093void OPPROTO op_fld1_ST0(void)
2094{
2095 ST0 = f15rk[1];
2096}
2097
2098void OPPROTO op_fldl2t_ST0(void)
2099{
2100 ST0 = f15rk[6];
2101}
2102
2103void OPPROTO op_fldl2e_ST0(void)
2104{
2105 ST0 = f15rk[5];
2106}
2107
2108void OPPROTO op_fldpi_ST0(void)
2109{
2110 ST0 = f15rk[2];
2111}
2112
2113void OPPROTO op_fldlg2_ST0(void)
2114{
2115 ST0 = f15rk[3];
2116}
2117
2118void OPPROTO op_fldln2_ST0(void)
2119{
2120 ST0 = f15rk[4];
2121}
2122
2123void OPPROTO op_fldz_ST0(void)
2124{
2125 ST0 = f15rk[0];
2126}
2127
2128void OPPROTO op_fldz_FT0(void)
2129{
6a8c397d 2130 FT0 = f15rk[0];
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2131}
2132
2133/* associated heplers to reduce generated code length and to simplify
2134 relocation (FP constants are usually stored in .rodata section) */
2135
2136void OPPROTO op_f2xm1(void)
2137{
2138 helper_f2xm1();
2139}
2140
2141void OPPROTO op_fyl2x(void)
2142{
2143 helper_fyl2x();
2144}
2145
2146void OPPROTO op_fptan(void)
2147{
2148 helper_fptan();
2149}
2150
2151void OPPROTO op_fpatan(void)
2152{
2153 helper_fpatan();
2154}
2155
2156void OPPROTO op_fxtract(void)
2157{
2158 helper_fxtract();
2159}
2160
2161void OPPROTO op_fprem1(void)
2162{
2163 helper_fprem1();
2164}
2165
2166
2167void OPPROTO op_fprem(void)
2168{
2169 helper_fprem();
2170}
2171
2172void OPPROTO op_fyl2xp1(void)
2173{
2174 helper_fyl2xp1();
2175}
2176
2177void OPPROTO op_fsqrt(void)
2178{
2179 helper_fsqrt();
2180}
2181
2182void OPPROTO op_fsincos(void)
2183{
2184 helper_fsincos();
2185}
2186
2187void OPPROTO op_frndint(void)
2188{
2189 helper_frndint();
2190}
2191
2192void OPPROTO op_fscale(void)
2193{
2194 helper_fscale();
2195}
2196
2197void OPPROTO op_fsin(void)
2198{
2199 helper_fsin();
2200}
2201
2202void OPPROTO op_fcos(void)
2203{
2204 helper_fcos();
2205}
2206
2207void OPPROTO op_fnstsw_A0(void)
2208{
2209 int fpus;
2210 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2211 stw(A0, fpus);
6eea2b1b 2212 FORCE_RET();
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2213}
2214
2215void OPPROTO op_fnstsw_EAX(void)
2216{
2217 int fpus;
2218 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2219 EAX = (EAX & ~0xffff) | fpus;
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2220}
2221
2222void OPPROTO op_fnstcw_A0(void)
2223{
14ce26e7 2224 stw(A0, env->fpuc);
6eea2b1b 2225 FORCE_RET();
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2226}
2227
2228void OPPROTO op_fldcw_A0(void)
2229{
14ce26e7 2230 env->fpuc = lduw(A0);
7a0e1f41 2231 update_fp_status();
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2232}
2233
2234void OPPROTO op_fclex(void)
2235{
2236 env->fpus &= 0x7f00;
2237}
2238
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2239void OPPROTO op_fwait(void)
2240{
2241 if (env->fpus & FPUS_SE)
2242 fpu_raise_exception();
2243 FORCE_RET();
2244}
2245
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2246void OPPROTO op_fninit(void)
2247{
2248 env->fpus = 0;
2249 env->fpstt = 0;
2250 env->fpuc = 0x37f;
2251 env->fptags[0] = 1;
2252 env->fptags[1] = 1;
2253 env->fptags[2] = 1;
2254 env->fptags[3] = 1;
2255 env->fptags[4] = 1;
2256 env->fptags[5] = 1;
2257 env->fptags[6] = 1;
2258 env->fptags[7] = 1;
2259}
2260
2261void OPPROTO op_fnstenv_A0(void)
2262{
14ce26e7 2263 helper_fstenv(A0, PARAM1);
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2264}
2265
2266void OPPROTO op_fldenv_A0(void)
2267{
14ce26e7 2268 helper_fldenv(A0, PARAM1);
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2269}
2270
2271void OPPROTO op_fnsave_A0(void)
2272{
14ce26e7 2273 helper_fsave(A0, PARAM1);
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2274}
2275
2276void OPPROTO op_frstor_A0(void)
2277{
14ce26e7 2278 helper_frstor(A0, PARAM1);
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2279}
2280
2281/* threading support */
2282void OPPROTO op_lock(void)
2283{
2284 cpu_lock();
2285}
2286
2287void OPPROTO op_unlock(void)
2288{
2289 cpu_unlock();
2290}
2291
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FB
2292/* SSE support */
2293static inline void memcpy16(void *d, void *s)
2294{
2295 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2296 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2297 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2298 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2299}
2300
2301void OPPROTO op_movo(void)
2302{
2303 /* XXX: badly generated code */
2304 XMMReg *d, *s;
2305 d = (XMMReg *)((char *)env + PARAM1);
2306 s = (XMMReg *)((char *)env + PARAM2);
2307 memcpy16(d, s);
2308}
2309
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2310void OPPROTO op_movq(void)
2311{
2312 uint64_t *d, *s;
2313 d = (uint64_t *)((char *)env + PARAM1);
2314 s = (uint64_t *)((char *)env + PARAM2);
2315 *d = *s;
2316}
2317
2318void OPPROTO op_movl(void)
2319{
2320 uint32_t *d, *s;
2321 d = (uint32_t *)((char *)env + PARAM1);
2322 s = (uint32_t *)((char *)env + PARAM2);
2323 *d = *s;
2324}
2325
2326void OPPROTO op_movq_env_0(void)
2327{
2328 uint64_t *d;
2329 d = (uint64_t *)((char *)env + PARAM1);
2330 *d = 0;
2331}
2332
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2333void OPPROTO op_fxsave_A0(void)
2334{
2335 helper_fxsave(A0, PARAM1);
2336}
2337
2338void OPPROTO op_fxrstor_A0(void)
2339{
2340 helper_fxrstor(A0, PARAM1);
2341}
664e0f19
FB
2342
2343/* XXX: optimize by storing fptt and fptags in the static cpu state */
2344void OPPROTO op_enter_mmx(void)
2345{
2346 env->fpstt = 0;
2347 *(uint32_t *)(env->fptags) = 0;
2348 *(uint32_t *)(env->fptags + 4) = 0;
2349}
2350
2351void OPPROTO op_emms(void)
2352{
2353 /* set to empty state */
2354 *(uint32_t *)(env->fptags) = 0x01010101;
2355 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2356}
2357
2358#define SHIFT 0
2359#include "ops_sse.h"
2360
2361#define SHIFT 1
2362#include "ops_sse.h"
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