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ide: Convert WIN_DSM to ide_cmd_table handler
[qemu.git] / hw / ide / core.c
CommitLineData
5391d806 1/*
38cdea7c 2 * QEMU IDE disk and CD/DVD-ROM Emulator
5fafdf24 3 *
5391d806 4 * Copyright (c) 2003 Fabrice Bellard
201a51fc 5 * Copyright (c) 2006 Openedhand Ltd.
5fafdf24 6 *
5391d806
FB		 7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
59f2a787 25#include <hw/hw.h>
0d09e41a 26#include <hw/i386/pc.h>
a2cb15b0 27#include <hw/pci/pci.h>
0d09e41a 28#include <hw/isa/isa.h>
1de7afc9
PB		 29#include "qemu/error-report.h"
30#include "qemu/timer.h"
9c17d615
PB		 31#include "sysemu/sysemu.h"
32#include "sysemu/dma.h"
0d09e41a 33#include "hw/block/block.h"
9c17d615 34#include "sysemu/blockdev.h"
59f2a787
GH		 35
36#include <hw/ide/internal.h>
e8b54394 37
b93af93d
BW		 38/* These values were based on a Seagate ST3500418AS but have been modified
39 to make more sense in QEMU */
40static const int smart_attributes[][12] = {
41 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
42 /* raw read error rate*/
43 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
44 /* spin up */
45 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
46 /* start stop count */
47 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
48 /* remapped sectors */
49 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
50 /* power on hours */
51 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* power cycle count */
53 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
54 /* airflow-temperature-celsius */
55 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
e8b54394
BW		 56};
57
ce4b6522 58static int ide_handle_rw_error(IDEState *s, int error, int op);
40c4ed3f 59static void ide_dummy_transfer_stop(IDEState *s);
98087450 60
5391d806
FB		 61static void padstr(char *str, const char *src, int len)
62{
63 int i, v;
64 for(i = 0; i < len; i++) {
65 if (*src)
66 v = *src++;
67 else
68 v = ' ';
69b34976 69 str[i^1] = v;
5391d806
FB		 70 }
71}
72
67b915a5
FB		 73static void put_le16(uint16_t *p, unsigned int v)
74{
0c4ad8dc 75 *p = cpu_to_le16(v);
67b915a5
FB		 76}
77
5391d806
FB		 78static void ide_identify(IDEState *s)
79{
80 uint16_t *p;
81 unsigned int oldsize;
d353fb72 82 IDEDevice *dev = s->unit ? s->bus->slave : s->bus->master;
5391d806 83
94458802
FB		 84 if (s->identify_set) {
85 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
86 return;
87 }
88
5391d806
FB		 89 memset(s->io_buffer, 0, 512);
90 p = (uint16_t *)s->io_buffer;
67b915a5 91 put_le16(p + 0, 0x0040);
5fafdf24 92 put_le16(p + 1, s->cylinders);
67b915a5
FB		 93 put_le16(p + 3, s->heads);
94 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
95 put_le16(p + 5, 512); /* XXX: retired, remove ? */
5fafdf24 96 put_le16(p + 6, s->sectors);
fa879c64 97 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 98 put_le16(p + 20, 3); /* XXX: retired, remove ? */
99 put_le16(p + 21, 512); /* cache size in sectors */
100 put_le16(p + 22, 4); /* ecc bytes */
47c06340 101 padstr((char *)(p + 23), s->version, 8); /* firmware version */
27e0c9a1 102 padstr((char *)(p + 27), s->drive_model_str, 40); /* model */
3b46e624 103#if MAX_MULT_SECTORS > 1
67b915a5 104 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
5391d806 105#endif
67b915a5 106 put_le16(p + 48, 1); /* dword I/O */
94458802 107 put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
67b915a5
FB		 108 put_le16(p + 51, 0x200); /* PIO transfer cycle */
109 put_le16(p + 52, 0x200); /* DMA transfer cycle */
94458802 110 put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
67b915a5
FB		 111 put_le16(p + 54, s->cylinders);
112 put_le16(p + 55, s->heads);
113 put_le16(p + 56, s->sectors);
5391d806 114 oldsize = s->cylinders * s->heads * s->sectors;
67b915a5
FB		 115 put_le16(p + 57, oldsize);
116 put_le16(p + 58, oldsize >> 16);
5391d806 117 if (s->mult_sectors)
67b915a5
FB		 118 put_le16(p + 59, 0x100 | s->mult_sectors);
119 put_le16(p + 60, s->nb_sectors);
120 put_le16(p + 61, s->nb_sectors >> 16);
d1b5c20d 121 put_le16(p + 62, 0x07); /* single word dma0-2 supported */
94458802 122 put_le16(p + 63, 0x07); /* mdma0-2 supported */
79d1d331 123 put_le16(p + 64, 0x03); /* pio3-4 supported */
94458802
FB		 124 put_le16(p + 65, 120);
125 put_le16(p + 66, 120);
126 put_le16(p + 67, 120);
127 put_le16(p + 68, 120);
d353fb72
CH		 128 if (dev && dev->conf.discard_granularity) {
129 put_le16(p + 69, (1 << 14)); /* determinate TRIM behavior */
130 }
ccf0fd8b
RE		 131
132 if (s->ncq_queues) {
133 put_le16(p + 75, s->ncq_queues - 1);
134 /* NCQ supported */
135 put_le16(p + 76, (1 << 8));
136 }
137
94458802
FB		 138 put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
139 put_le16(p + 81, 0x16); /* conforms to ata5 */
a58b8d54
CH		 140 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
141 put_le16(p + 82, (1 << 14) | (1 << 5) | 1);
c2ff060f
FB		 142 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
143 put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
95ebda85
FB		 144 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
145 if (s->wwn) {
146 put_le16(p + 84, (1 << 14) | (1 << 8) | 0);
147 } else {
148 put_le16(p + 84, (1 << 14) | 0);
149 }
e900a7b7
CH		 150 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
151 if (bdrv_enable_write_cache(s->bs))
152 put_le16(p + 85, (1 << 14) | (1 << 5) | 1);
153 else
154 put_le16(p + 85, (1 << 14) | 1);
c2ff060f 155 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
2844bdd9 156 put_le16(p + 86, (1 << 13) | (1 <<12) | (1 << 10));
95ebda85
FB		 157 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
158 if (s->wwn) {
159 put_le16(p + 87, (1 << 14) | (1 << 8) | 0);
160 } else {
161 put_le16(p + 87, (1 << 14) | 0);
162 }
94458802
FB		 163 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
164 put_le16(p + 93, 1 | (1 << 14) | 0x2000);
c2ff060f
FB		 165 put_le16(p + 100, s->nb_sectors);
166 put_le16(p + 101, s->nb_sectors >> 16);
167 put_le16(p + 102, s->nb_sectors >> 32);
168 put_le16(p + 103, s->nb_sectors >> 48);
d353fb72 169
57dac7ef
MA		 170 if (dev && dev->conf.physical_block_size)
171 put_le16(p + 106, 0x6000 | get_physical_block_exp(&dev->conf));
95ebda85
FB		 172 if (s->wwn) {
173 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
174 put_le16(p + 108, s->wwn >> 48);
175 put_le16(p + 109, s->wwn >> 32);
176 put_le16(p + 110, s->wwn >> 16);
177 put_le16(p + 111, s->wwn);
178 }
d353fb72
CH		 179 if (dev && dev->conf.discard_granularity) {
180 put_le16(p + 169, 1); /* TRIM support */
181 }
94458802
FB		 182
183 memcpy(s->identify_data, p, sizeof(s->identify_data));
184 s->identify_set = 1;
5391d806
FB		 185}
186
187static void ide_atapi_identify(IDEState *s)
188{
189 uint16_t *p;
190
94458802
FB		 191 if (s->identify_set) {
192 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
193 return;
194 }
195
5391d806
FB		 196 memset(s->io_buffer, 0, 512);
197 p = (uint16_t *)s->io_buffer;
198 /* Removable CDROM, 50us response, 12 byte packets */
67b915a5 199 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
fa879c64 200 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 201 put_le16(p + 20, 3); /* buffer type */
202 put_le16(p + 21, 512); /* cache size in sectors */
203 put_le16(p + 22, 4); /* ecc bytes */
47c06340 204 padstr((char *)(p + 23), s->version, 8); /* firmware version */
27e0c9a1 205 padstr((char *)(p + 27), s->drive_model_str, 40); /* model */
67b915a5 206 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
8ccad811
FB		 207#ifdef USE_DMA_CDROM
208 put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
209 put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
d1b5c20d 210 put_le16(p + 62, 7); /* single word dma0-2 supported */
8ccad811 211 put_le16(p + 63, 7); /* mdma0-2 supported */
8ccad811 212#else
67b915a5
FB		 213 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
214 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
215 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
8ccad811 216#endif
79d1d331 217 put_le16(p + 64, 3); /* pio3-4 supported */
67b915a5
FB		 218 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
219 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
220 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
221 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
94458802 222
67b915a5
FB		 223 put_le16(p + 71, 30); /* in ns */
224 put_le16(p + 72, 30); /* in ns */
5391d806 225
1bdaa28d
AG		 226 if (s->ncq_queues) {
227 put_le16(p + 75, s->ncq_queues - 1);
228 /* NCQ supported */
229 put_le16(p + 76, (1 << 8));
230 }
231
67b915a5 232 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
8ccad811
FB		 233#ifdef USE_DMA_CDROM
234 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
235#endif
94458802
FB		 236 memcpy(s->identify_data, p, sizeof(s->identify_data));
237 s->identify_set = 1;
5391d806
FB		 238}
239
201a51fc
AZ		 240static void ide_cfata_identify(IDEState *s)
241{
242 uint16_t *p;
243 uint32_t cur_sec;
201a51fc
AZ		 244
245 p = (uint16_t *) s->identify_data;
246 if (s->identify_set)
247 goto fill_buffer;
248
249 memset(p, 0, sizeof(s->identify_data));
250
251 cur_sec = s->cylinders * s->heads * s->sectors;
252
253 put_le16(p + 0, 0x848a); /* CF Storage Card signature */
254 put_le16(p + 1, s->cylinders); /* Default cylinders */
255 put_le16(p + 3, s->heads); /* Default heads */
256 put_le16(p + 6, s->sectors); /* Default sectors per track */
257 put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */
258 put_le16(p + 8, s->nb_sectors); /* Sectors per card */
fa879c64 259 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
201a51fc 260 put_le16(p + 22, 0x0004); /* ECC bytes */
47c06340 261 padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */
27e0c9a1 262 padstr((char *) (p + 27), s->drive_model_str, 40);/* Model number */
201a51fc
AZ		 263#if MAX_MULT_SECTORS > 1
264 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
265#else
266 put_le16(p + 47, 0x0000);
267#endif
268 put_le16(p + 49, 0x0f00); /* Capabilities */
269 put_le16(p + 51, 0x0002); /* PIO cycle timing mode */
270 put_le16(p + 52, 0x0001); /* DMA cycle timing mode */
271 put_le16(p + 53, 0x0003); /* Translation params valid */
272 put_le16(p + 54, s->cylinders); /* Current cylinders */
273 put_le16(p + 55, s->heads); /* Current heads */
274 put_le16(p + 56, s->sectors); /* Current sectors */
275 put_le16(p + 57, cur_sec); /* Current capacity */
276 put_le16(p + 58, cur_sec >> 16); /* Current capacity */
277 if (s->mult_sectors) /* Multiple sector setting */
278 put_le16(p + 59, 0x100 | s->mult_sectors);
279 put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */
280 put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */
281 put_le16(p + 63, 0x0203); /* Multiword DMA capability */
282 put_le16(p + 64, 0x0001); /* Flow Control PIO support */
283 put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */
284 put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */
285 put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */
286 put_le16(p + 82, 0x400c); /* Command Set supported */
287 put_le16(p + 83, 0x7068); /* Command Set supported */
288 put_le16(p + 84, 0x4000); /* Features supported */
289 put_le16(p + 85, 0x000c); /* Command Set enabled */
290 put_le16(p + 86, 0x7044); /* Command Set enabled */
291 put_le16(p + 87, 0x4000); /* Features enabled */
292 put_le16(p + 91, 0x4060); /* Current APM level */
293 put_le16(p + 129, 0x0002); /* Current features option */
294 put_le16(p + 130, 0x0005); /* Reassigned sectors */
295 put_le16(p + 131, 0x0001); /* Initial power mode */
296 put_le16(p + 132, 0x0000); /* User signature */
297 put_le16(p + 160, 0x8100); /* Power requirement */
298 put_le16(p + 161, 0x8001); /* CF command set */
299
300 s->identify_set = 1;
301
302fill_buffer:
303 memcpy(s->io_buffer, p, sizeof(s->identify_data));
304}
305
5391d806
FB		 306static void ide_set_signature(IDEState *s)
307{
308 s->select &= 0xf0; /* clear head */
309 /* put signature */
310 s->nsector = 1;
311 s->sector = 1;
cd8722bb 312 if (s->drive_kind == IDE_CD) {
5391d806
FB		 313 s->lcyl = 0x14;
314 s->hcyl = 0xeb;
315 } else if (s->bs) {
316 s->lcyl = 0;
317 s->hcyl = 0;
318 } else {
319 s->lcyl = 0xff;
320 s->hcyl = 0xff;
321 }
322}
323
d353fb72
CH		 324typedef struct TrimAIOCB {
325 BlockDriverAIOCB common;
326 QEMUBH *bh;
327 int ret;
501378c3
PB		 328 QEMUIOVector *qiov;
329 BlockDriverAIOCB *aiocb;
330 int i, j;
d353fb72
CH		 331} TrimAIOCB;
332
333static void trim_aio_cancel(BlockDriverAIOCB *acb)
334{
335 TrimAIOCB *iocb = container_of(acb, TrimAIOCB, common);
336
501378c3
PB		 337 /* Exit the loop in case bdrv_aio_cancel calls ide_issue_trim_cb again. */
338 iocb->j = iocb->qiov->niov - 1;
339 iocb->i = (iocb->qiov->iov[iocb->j].iov_len / 8) - 1;
340
341 /* Tell ide_issue_trim_cb not to trigger the completion, too. */
d353fb72
CH		 342 qemu_bh_delete(iocb->bh);
343 iocb->bh = NULL;
501378c3
PB		 344
345 if (iocb->aiocb) {
346 bdrv_aio_cancel(iocb->aiocb);
347 }
d353fb72
CH		 348 qemu_aio_release(iocb);
349}
350
d7331bed 351static const AIOCBInfo trim_aiocb_info = {
d353fb72
CH		 352 .aiocb_size = sizeof(TrimAIOCB),
353 .cancel = trim_aio_cancel,
354};
355
356static void ide_trim_bh_cb(void *opaque)
357{
358 TrimAIOCB *iocb = opaque;
359
360 iocb->common.cb(iocb->common.opaque, iocb->ret);
361
362 qemu_bh_delete(iocb->bh);
363 iocb->bh = NULL;
d353fb72
CH		 364 qemu_aio_release(iocb);
365}
366
501378c3
PB		 367static void ide_issue_trim_cb(void *opaque, int ret)
368{
369 TrimAIOCB *iocb = opaque;
370 if (ret >= 0) {
371 while (iocb->j < iocb->qiov->niov) {
372 int j = iocb->j;
373 while (++iocb->i < iocb->qiov->iov[j].iov_len / 8) {
374 int i = iocb->i;
375 uint64_t *buffer = iocb->qiov->iov[j].iov_base;
376
377 /* 6-byte LBA + 2-byte range per entry */
378 uint64_t entry = le64_to_cpu(buffer[i]);
379 uint64_t sector = entry & 0x0000ffffffffffffULL;
380 uint16_t count = entry >> 48;
381
382 if (count == 0) {
383 continue;
384 }
385
386 /* Got an entry! Submit and exit. */
387 iocb->aiocb = bdrv_aio_discard(iocb->common.bs, sector, count,
388 ide_issue_trim_cb, opaque);
389 return;
390 }
391
392 iocb->j++;
393 iocb->i = -1;
394 }
395 } else {
396 iocb->ret = ret;
397 }
398
399 iocb->aiocb = NULL;
400 if (iocb->bh) {
401 qemu_bh_schedule(iocb->bh);
402 }
403}
404
d353fb72
CH		 405BlockDriverAIOCB *ide_issue_trim(BlockDriverState *bs,
406 int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
407 BlockDriverCompletionFunc *cb, void *opaque)
408{
409 TrimAIOCB *iocb;
d353fb72 410
d7331bed 411 iocb = qemu_aio_get(&trim_aiocb_info, bs, cb, opaque);
d353fb72
CH		 412 iocb->bh = qemu_bh_new(ide_trim_bh_cb, iocb);
413 iocb->ret = 0;
501378c3
PB		 414 iocb->qiov = qiov;
415 iocb->i = -1;
416 iocb->j = 0;
417 ide_issue_trim_cb(iocb, 0);
d353fb72
CH		 418 return &iocb->common;
419}
420
5391d806
FB		 421static inline void ide_abort_command(IDEState *s)
422{
423 s->status = READY_STAT | ERR_STAT;
424 s->error = ABRT_ERR;
425}
426
5391d806 427/* prepare data transfer and tell what to do after */
33231e0e
KW		 428void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
429 EndTransferFunc *end_transfer_func)
5391d806
FB		 430{
431 s->end_transfer_func = end_transfer_func;
432 s->data_ptr = buf;
433 s->data_end = buf + size;
40a6238a 434 if (!(s->status & ERR_STAT)) {
7603d156 435 s->status |= DRQ_STAT;
40a6238a
AG		 436 }
437 s->bus->dma->ops->start_transfer(s->bus->dma);
5391d806
FB		 438}
439
33231e0e 440void ide_transfer_stop(IDEState *s)
5391d806
FB		 441{
442 s->end_transfer_func = ide_transfer_stop;
443 s->data_ptr = s->io_buffer;
444 s->data_end = s->io_buffer;
445 s->status &= ~DRQ_STAT;
446}
447
356721ae 448int64_t ide_get_sector(IDEState *s)
5391d806
FB		 449{
450 int64_t sector_num;
451 if (s->select & 0x40) {
452 /* lba */
c2ff060f
FB		 453 if (!s->lba48) {
454 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
455 (s->lcyl << 8) | s->sector;
456 } else {
457 sector_num = ((int64_t)s->hob_hcyl << 40) |
458 ((int64_t) s->hob_lcyl << 32) |
459 ((int64_t) s->hob_sector << 24) |
460 ((int64_t) s->hcyl << 16) |
461 ((int64_t) s->lcyl << 8) | s->sector;
462 }
5391d806
FB		 463 } else {
464 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
c2ff060f 465 (s->select & 0x0f) * s->sectors + (s->sector - 1);
5391d806
FB		 466 }
467 return sector_num;
468}
469
356721ae 470void ide_set_sector(IDEState *s, int64_t sector_num)
5391d806
FB		 471{
472 unsigned int cyl, r;
473 if (s->select & 0x40) {
c2ff060f
FB		 474 if (!s->lba48) {
475 s->select = (s->select & 0xf0) | (sector_num >> 24);
476 s->hcyl = (sector_num >> 16);
477 s->lcyl = (sector_num >> 8);
478 s->sector = (sector_num);
479 } else {
480 s->sector = sector_num;
481 s->lcyl = sector_num >> 8;
482 s->hcyl = sector_num >> 16;
483 s->hob_sector = sector_num >> 24;
484 s->hob_lcyl = sector_num >> 32;
485 s->hob_hcyl = sector_num >> 40;
486 }
5391d806
FB		 487 } else {
488 cyl = sector_num / (s->heads * s->sectors);
489 r = sector_num % (s->heads * s->sectors);
490 s->hcyl = cyl >> 8;
491 s->lcyl = cyl;
1b8eb456 492 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
5391d806
FB		 493 s->sector = (r % s->sectors) + 1;
494 }
495}
496
e162cfb0
AZ		 497static void ide_rw_error(IDEState *s) {
498 ide_abort_command(s);
9cdd03a7 499 ide_set_irq(s->bus);
e162cfb0
AZ		 500}
501
bef0fd59
SH		 502static void ide_sector_read_cb(void *opaque, int ret)
503{
504 IDEState *s = opaque;
505 int n;
506
507 s->pio_aiocb = NULL;
508 s->status &= ~BUSY_STAT;
509
510 bdrv_acct_done(s->bs, &s->acct);
511 if (ret != 0) {
512 if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY |
513 BM_STATUS_RETRY_READ)) {
514 return;
515 }
516 }
517
518 n = s->nsector;
519 if (n > s->req_nb_sectors) {
520 n = s->req_nb_sectors;
521 }
522
523 /* Allow the guest to read the io_buffer */
524 ide_transfer_start(s, s->io_buffer, n * BDRV_SECTOR_SIZE, ide_sector_read);
525
526 ide_set_irq(s->bus);
527
528 ide_set_sector(s, ide_get_sector(s) + n);
529 s->nsector -= n;
530}
531
40a6238a 532void ide_sector_read(IDEState *s)
5391d806
FB		 533{
534 int64_t sector_num;
bef0fd59 535 int n;
5391d806
FB		 536
537 s->status = READY_STAT | SEEK_STAT;
a136e5a8 538 s->error = 0; /* not needed by IDE spec, but needed by Windows */
5391d806
FB		 539 sector_num = ide_get_sector(s);
540 n = s->nsector;
bef0fd59 541
5391d806 542 if (n == 0) {
5391d806 543 ide_transfer_stop(s);
bef0fd59
SH		 544 return;
545 }
546
547 s->status |= BUSY_STAT;
548
549 if (n > s->req_nb_sectors) {
550 n = s->req_nb_sectors;
551 }
552
5391d806 553#if defined(DEBUG_IDE)
bef0fd59 554 printf("sector=%" PRId64 "\n", sector_num);
5391d806 555#endif
a597e79c 556
bef0fd59
SH		 557 s->iov.iov_base = s->io_buffer;
558 s->iov.iov_len = n * BDRV_SECTOR_SIZE;
559 qemu_iovec_init_external(&s->qiov, &s->iov, 1);
560
561 bdrv_acct_start(s->bs, &s->acct, n * BDRV_SECTOR_SIZE, BDRV_ACCT_READ);
562 s->pio_aiocb = bdrv_aio_readv(s->bs, sector_num, &s->qiov, n,
563 ide_sector_read_cb, s);
5391d806
FB		 564}
565
b61744b3 566static void dma_buf_commit(IDEState *s)
7aea4412 567{
1fb8648d 568 qemu_sglist_destroy(&s->sg);
7aea4412
AL		 569}
570
33231e0e 571void ide_set_inactive(IDEState *s)
8337606d 572{
40a6238a
AG		 573 s->bus->dma->aiocb = NULL;
574 s->bus->dma->ops->set_inactive(s->bus->dma);
8337606d
KW		 575}
576
356721ae 577void ide_dma_error(IDEState *s)
e162cfb0
AZ		 578{
579 ide_transfer_stop(s);
580 s->error = ABRT_ERR;
581 s->status = READY_STAT | ERR_STAT;
40a6238a 582 ide_set_inactive(s);
9cdd03a7 583 ide_set_irq(s->bus);
e162cfb0
AZ		 584}
585
ce4b6522 586static int ide_handle_rw_error(IDEState *s, int error, int op)
428c5705 587{
1ceee0d5 588 bool is_read = (op & BM_STATUS_RETRY_READ) != 0;
3e1caa5f 589 BlockErrorAction action = bdrv_get_error_action(s->bs, is_read, error);
428c5705 590
3e1caa5f 591 if (action == BDRV_ACTION_STOP) {
40a6238a 592 s->bus->dma->ops->set_unit(s->bus->dma, s->unit);
def93791 593 s->bus->error_status = op;
3e1caa5f 594 } else if (action == BDRV_ACTION_REPORT) {
ce4b6522 595 if (op & BM_STATUS_DMA_RETRY) {
b61744b3 596 dma_buf_commit(s);
428c5705 597 ide_dma_error(s);
7aea4412 598 } else {
428c5705 599 ide_rw_error(s);
7aea4412 600 }
428c5705 601 }
3e1caa5f
PB		 602 bdrv_error_action(s->bs, action, is_read, error);
603 return action != BDRV_ACTION_IGNORE;
428c5705
AL		 604}
605
cd369c46 606void ide_dma_cb(void *opaque, int ret)
98087450 607{
40a6238a 608 IDEState *s = opaque;
8ccad811
FB		 609 int n;
610 int64_t sector_num;
038268e2 611 bool stay_active = false;
8ccad811 612
e162cfb0 613 if (ret < 0) {
cd369c46
CH		 614 int op = BM_STATUS_DMA_RETRY;
615
4e1e0051 616 if (s->dma_cmd == IDE_DMA_READ)
cd369c46 617 op |= BM_STATUS_RETRY_READ;
d353fb72
CH		 618 else if (s->dma_cmd == IDE_DMA_TRIM)
619 op |= BM_STATUS_RETRY_TRIM;
620
cd369c46 621 if (ide_handle_rw_error(s, -ret, op)) {
ce4b6522
KW		 622 return;
623 }
e162cfb0
AZ		 624 }
625
8ccad811 626 n = s->io_buffer_size >> 9;
038268e2
KW		 627 if (n > s->nsector) {
628 /* The PRDs were longer than needed for this request. Shorten them so
629 * we don't get a negative remainder. The Active bit must remain set
630 * after the request completes. */
631 n = s->nsector;
632 stay_active = true;
633 }
634
8ccad811
FB		 635 sector_num = ide_get_sector(s);
636 if (n > 0) {
b61744b3 637 dma_buf_commit(s);
8ccad811
FB		 638 sector_num += n;
639 ide_set_sector(s, sector_num);
640 s->nsector -= n;
8ccad811
FB		 641 }
642
643 /* end of transfer ? */
644 if (s->nsector == 0) {
98087450 645 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 646 ide_set_irq(s->bus);
cd369c46 647 goto eot;
98087450 648 }
8ccad811
FB		 649
650 /* launch next transfer */
651 n = s->nsector;
596bb44d 652 s->io_buffer_index = 0;
8ccad811 653 s->io_buffer_size = n * 512;
4e1e0051 654 if (s->bus->dma->ops->prepare_buf(s->bus->dma, ide_cmd_is_read(s)) == 0) {
69c38b8f
KW		 655 /* The PRDs were too short. Reset the Active bit, but don't raise an
656 * interrupt. */
72bcca73 657 s->status = READY_STAT | SEEK_STAT;
7aea4412 658 goto eot;
69c38b8f 659 }
cd369c46 660
8ccad811 661#ifdef DEBUG_AIO
4e1e0051
CH		 662 printf("ide_dma_cb: sector_num=%" PRId64 " n=%d, cmd_cmd=%d\n",
663 sector_num, n, s->dma_cmd);
8ccad811 664#endif
cd369c46 665
4e1e0051
CH		 666 switch (s->dma_cmd) {
667 case IDE_DMA_READ:
cd369c46
CH		 668 s->bus->dma->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num,
669 ide_dma_cb, s);
4e1e0051
CH		 670 break;
671 case IDE_DMA_WRITE:
cd369c46
CH		 672 s->bus->dma->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num,
673 ide_dma_cb, s);
4e1e0051 674 break;
d353fb72
CH		 675 case IDE_DMA_TRIM:
676 s->bus->dma->aiocb = dma_bdrv_io(s->bs, &s->sg, sector_num,
43cf8ae6
DG		 677 ide_issue_trim, ide_dma_cb, s,
678 DMA_DIRECTION_TO_DEVICE);
d353fb72 679 break;
cd369c46 680 }
cd369c46
CH		 681 return;
682
683eot:
a597e79c
CH		 684 if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) {
685 bdrv_acct_done(s->bs, &s->acct);
686 }
687 ide_set_inactive(s);
038268e2
KW		 688 if (stay_active) {
689 s->bus->dma->ops->add_status(s->bus->dma, BM_STATUS_DMAING);
690 }
98087450
FB		 691}
692
4e1e0051 693static void ide_sector_start_dma(IDEState *s, enum ide_dma_cmd dma_cmd)
98087450 694{
8ccad811 695 s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
98087450
FB		 696 s->io_buffer_index = 0;
697 s->io_buffer_size = 0;
4e1e0051 698 s->dma_cmd = dma_cmd;
a597e79c
CH		 699
700 switch (dma_cmd) {
701 case IDE_DMA_READ:
702 bdrv_acct_start(s->bs, &s->acct, s->nsector * BDRV_SECTOR_SIZE,
703 BDRV_ACCT_READ);
704 break;
705 case IDE_DMA_WRITE:
706 bdrv_acct_start(s->bs, &s->acct, s->nsector * BDRV_SECTOR_SIZE,
707 BDRV_ACCT_WRITE);
708 break;
709 default:
710 break;
711 }
712
cd369c46 713 s->bus->dma->ops->start_dma(s->bus->dma, s, ide_dma_cb);
98087450
FB		 714}
715
a09db21f
FB		 716static void ide_sector_write_timer_cb(void *opaque)
717{
718 IDEState *s = opaque;
9cdd03a7 719 ide_set_irq(s->bus);
a09db21f
FB		 720}
721
e82dabd8 722static void ide_sector_write_cb(void *opaque, int ret)
5391d806 723{
e82dabd8
SH		 724 IDEState *s = opaque;
725 int n;
a597e79c 726
a597e79c 727 bdrv_acct_done(s->bs, &s->acct);
428c5705 728
e82dabd8
SH		 729 s->pio_aiocb = NULL;
730 s->status &= ~BUSY_STAT;
731
e162cfb0 732 if (ret != 0) {
e82dabd8 733 if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY)) {
428c5705 734 return;
e82dabd8 735 }
e162cfb0
AZ		 736 }
737
e82dabd8
SH		 738 n = s->nsector;
739 if (n > s->req_nb_sectors) {
740 n = s->req_nb_sectors;
741 }
5391d806
FB		 742 s->nsector -= n;
743 if (s->nsector == 0) {
292eef5a 744 /* no more sectors to write */
5391d806
FB		 745 ide_transfer_stop(s);
746 } else {
e82dabd8
SH		 747 int n1 = s->nsector;
748 if (n1 > s->req_nb_sectors) {
5391d806 749 n1 = s->req_nb_sectors;
e82dabd8
SH		 750 }
751 ide_transfer_start(s, s->io_buffer, n1 * BDRV_SECTOR_SIZE,
752 ide_sector_write);
5391d806 753 }
e82dabd8 754 ide_set_sector(s, ide_get_sector(s) + n);
3b46e624 755
31c2a146
TS		 756 if (win2k_install_hack && ((++s->irq_count % 16) == 0)) {
757 /* It seems there is a bug in the Windows 2000 installer HDD
758 IDE driver which fills the disk with empty logs when the
759 IDE write IRQ comes too early. This hack tries to correct
760 that at the expense of slower write performances. Use this
761 option _only_ to install Windows 2000. You must disable it
762 for normal use. */
f7736b91 763 qemu_mod_timer(s->sector_write_timer,
74475455 764 qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000));
f7736b91 765 } else {
9cdd03a7 766 ide_set_irq(s->bus);
31c2a146 767 }
5391d806
FB		 768}
769
e82dabd8
SH		 770void ide_sector_write(IDEState *s)
771{
772 int64_t sector_num;
773 int n;
774
775 s->status = READY_STAT | SEEK_STAT | BUSY_STAT;
776 sector_num = ide_get_sector(s);
777#if defined(DEBUG_IDE)
778 printf("sector=%" PRId64 "\n", sector_num);
779#endif
780 n = s->nsector;
781 if (n > s->req_nb_sectors) {
782 n = s->req_nb_sectors;
783 }
784
785 s->iov.iov_base = s->io_buffer;
786 s->iov.iov_len = n * BDRV_SECTOR_SIZE;
787 qemu_iovec_init_external(&s->qiov, &s->iov, 1);
788
789 bdrv_acct_start(s->bs, &s->acct, n * BDRV_SECTOR_SIZE, BDRV_ACCT_READ);
790 s->pio_aiocb = bdrv_aio_writev(s->bs, sector_num, &s->qiov, n,
791 ide_sector_write_cb, s);
792}
793
b0484ae4
CH		 794static void ide_flush_cb(void *opaque, int ret)
795{
796 IDEState *s = opaque;
797
e2bcadad
KW		 798 if (ret < 0) {
799 /* XXX: What sector number to set here? */
800 if (ide_handle_rw_error(s, -ret, BM_STATUS_RETRY_FLUSH)) {
801 return;
802 }
803 }
b0484ae4 804
a597e79c 805 bdrv_acct_done(s->bs, &s->acct);
b0484ae4
CH		 806 s->status = READY_STAT | SEEK_STAT;
807 ide_set_irq(s->bus);
808}
809
40a6238a 810void ide_flush_cache(IDEState *s)
6bcb1a79 811{
b2df7531 812 if (s->bs == NULL) {
6bcb1a79 813 ide_flush_cb(s, 0);
b2df7531
KW		 814 return;
815 }
816
f68ec837 817 s->status |= BUSY_STAT;
a597e79c 818 bdrv_acct_start(s->bs, &s->acct, 0, BDRV_ACCT_FLUSH);
ad54ae80 819 bdrv_aio_flush(s->bs, ide_flush_cb, s);
6bcb1a79
KW		 820}
821
201a51fc
AZ		 822static void ide_cfata_metadata_inquiry(IDEState *s)
823{
824 uint16_t *p;
825 uint32_t spd;
826
827 p = (uint16_t *) s->io_buffer;
828 memset(p, 0, 0x200);
829 spd = ((s->mdata_size - 1) >> 9) + 1;
830
831 put_le16(p + 0, 0x0001); /* Data format revision */
832 put_le16(p + 1, 0x0000); /* Media property: silicon */
833 put_le16(p + 2, s->media_changed); /* Media status */
834 put_le16(p + 3, s->mdata_size & 0xffff); /* Capacity in bytes (low) */
835 put_le16(p + 4, s->mdata_size >> 16); /* Capacity in bytes (high) */
836 put_le16(p + 5, spd & 0xffff); /* Sectors per device (low) */
837 put_le16(p + 6, spd >> 16); /* Sectors per device (high) */
838}
839
840static void ide_cfata_metadata_read(IDEState *s)
841{
842 uint16_t *p;
843
844 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
845 s->status = ERR_STAT;
846 s->error = ABRT_ERR;
847 return;
848 }
849
850 p = (uint16_t *) s->io_buffer;
851 memset(p, 0, 0x200);
852
853 put_le16(p + 0, s->media_changed); /* Media status */
854 memcpy(p + 1, s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
855 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
856 s->nsector << 9), 0x200 - 2));
857}
858
859static void ide_cfata_metadata_write(IDEState *s)
860{
861 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
862 s->status = ERR_STAT;
863 s->error = ABRT_ERR;
864 return;
865 }
866
867 s->media_changed = 0;
868
869 memcpy(s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
870 s->io_buffer + 2,
871 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
872 s->nsector << 9), 0x200 - 2));
873}
874
bd491d6a 875/* called when the inserted state of the media has changed */
7d4b4ba5 876static void ide_cd_change_cb(void *opaque, bool load)
bd491d6a
TS		 877{
878 IDEState *s = opaque;
96b8f136 879 uint64_t nb_sectors;
bd491d6a 880
25ad22bc 881 s->tray_open = !load;
bd491d6a
TS		 882 bdrv_get_geometry(s->bs, &nb_sectors);
883 s->nb_sectors = nb_sectors;
9118e7f0 884
4b9b7092
AS		 885 /*
886 * First indicate to the guest that a CD has been removed. That's
887 * done on the next command the guest sends us.
888 *
67cc61e4 889 * Then we set UNIT_ATTENTION, by which the guest will
4b9b7092
AS		 890 * detect a new CD in the drive. See ide_atapi_cmd() for details.
891 */
93c8cfd9 892 s->cdrom_changed = 1;
996faf1a 893 s->events.new_media = true;
2df0a3a3
PB		 894 s->events.eject_request = false;
895 ide_set_irq(s->bus);
896}
897
898static void ide_cd_eject_request_cb(void *opaque, bool force)
899{
900 IDEState *s = opaque;
901
902 s->events.eject_request = true;
903 if (force) {
904 s->tray_locked = false;
905 }
9cdd03a7 906 ide_set_irq(s->bus);
bd491d6a
TS		 907}
908
c2ff060f
FB		 909static void ide_cmd_lba48_transform(IDEState *s, int lba48)
910{
911 s->lba48 = lba48;
912
913 /* handle the 'magic' 0 nsector count conversion here. to avoid
914 * fiddling with the rest of the read logic, we just store the
915 * full sector count in ->nsector and ignore ->hob_nsector from now
916 */
917 if (!s->lba48) {
918 if (!s->nsector)
919 s->nsector = 256;
920 } else {
921 if (!s->nsector && !s->hob_nsector)
922 s->nsector = 65536;
923 else {
924 int lo = s->nsector;
925 int hi = s->hob_nsector;
926
927 s->nsector = (hi << 8) | lo;
928 }
929 }
930}
931
bcbdc4d3 932static void ide_clear_hob(IDEBus *bus)
c2ff060f
FB		 933{
934 /* any write clears HOB high bit of device control register */
bcbdc4d3
GH		 935 bus->ifs[0].select &= ~(1 << 7);
936 bus->ifs[1].select &= ~(1 << 7);
c2ff060f
FB		 937}
938
356721ae 939void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
caed8802 940{
bcbdc4d3 941 IDEBus *bus = opaque;
5391d806
FB		 942
943#ifdef DEBUG_IDE
944 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
945#endif
c2ff060f 946
5391d806 947 addr &= 7;
fcdd25ab
AL		 948
949 /* ignore writes to command block while busy with previous command */
bcbdc4d3 950 if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT)))
fcdd25ab
AL		 951 return;
952
5391d806
FB		 953 switch(addr) {
954 case 0:
955 break;
956 case 1:
bcbdc4d3 957 ide_clear_hob(bus);
c45c3d00 958 /* NOTE: data is written to the two drives */
bcbdc4d3
GH		 959 bus->ifs[0].hob_feature = bus->ifs[0].feature;
960 bus->ifs[1].hob_feature = bus->ifs[1].feature;
961 bus->ifs[0].feature = val;
962 bus->ifs[1].feature = val;
5391d806
FB		 963 break;
964 case 2:
bcbdc4d3
GH		 965 ide_clear_hob(bus);
966 bus->ifs[0].hob_nsector = bus->ifs[0].nsector;
967 bus->ifs[1].hob_nsector = bus->ifs[1].nsector;
968 bus->ifs[0].nsector = val;
969 bus->ifs[1].nsector = val;
5391d806
FB		 970 break;
971 case 3:
bcbdc4d3
GH		 972 ide_clear_hob(bus);
973 bus->ifs[0].hob_sector = bus->ifs[0].sector;
974 bus->ifs[1].hob_sector = bus->ifs[1].sector;
975 bus->ifs[0].sector = val;
976 bus->ifs[1].sector = val;
5391d806
FB		 977 break;
978 case 4:
bcbdc4d3
GH		 979 ide_clear_hob(bus);
980 bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl;
981 bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl;
982 bus->ifs[0].lcyl = val;
983 bus->ifs[1].lcyl = val;
5391d806
FB		 984 break;
985 case 5:
bcbdc4d3
GH		 986 ide_clear_hob(bus);
987 bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl;
988 bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl;
989 bus->ifs[0].hcyl = val;
990 bus->ifs[1].hcyl = val;
5391d806
FB		 991 break;
992 case 6:
c2ff060f 993 /* FIXME: HOB readback uses bit 7 */
bcbdc4d3
GH		 994 bus->ifs[0].select = (val & ~0x10) | 0xa0;
995 bus->ifs[1].select = (val | 0x10) | 0xa0;
5391d806 996 /* select drive */
bcbdc4d3 997 bus->unit = (val >> 4) & 1;
5391d806
FB		 998 break;
999 default:
1000 case 7:
1001 /* command */
7cff87ff
AG		 1002 ide_exec_cmd(bus, val);
1003 break;
1004 }
1005}
1006
4286434c
KW		 1007static bool cmd_data_set_management(IDEState *s, uint8_t cmd)
1008{
1009 switch (s->feature) {
1010 case DSM_TRIM:
1011 if (s->bs) {
1012 ide_sector_start_dma(s, IDE_DMA_TRIM);
1013 return false;
1014 }
1015 break;
1016 }
1017
1018 ide_abort_command(s);
1019 return true;
1020}
1021
844505b1
MA		 1022#define HD_OK (1u << IDE_HD)
1023#define CD_OK (1u << IDE_CD)
1024#define CFA_OK (1u << IDE_CFATA)
1025#define HD_CFA_OK (HD_OK | CFA_OK)
1026#define ALL_OK (HD_OK | CD_OK | CFA_OK)
1027
a0436e92
KW		 1028/* Set the Disk Seek Completed status bit during completion */
1029#define SET_DSC (1u << 8)
1030
844505b1 1031/* See ACS-2 T13/2015-D Table B.2 Command codes */
a0436e92
KW		 1032static const struct {
1033 /* Returns true if the completion code should be run */
1034 bool (*handler)(IDEState *s, uint8_t cmd);
1035 int flags;
1036} ide_cmd_table[0x100] = {
844505b1 1037 /* NOP not implemented, mandatory for CD */
a0436e92 1038 [CFA_REQ_EXT_ERROR_CODE] = { NULL, CFA_OK },
4286434c 1039 [WIN_DSM] = { cmd_data_set_management, ALL_OK },
a0436e92
KW		 1040 [WIN_DEVICE_RESET] = { NULL, CD_OK },
1041 [WIN_RECAL] = { NULL, HD_CFA_OK },
1042 [WIN_READ] = { NULL, ALL_OK },
1043 [WIN_READ_ONCE] = { NULL, ALL_OK },
1044 [WIN_READ_EXT] = { NULL, HD_CFA_OK },
1045 [WIN_READDMA_EXT] = { NULL, HD_CFA_OK },
1046 [WIN_READ_NATIVE_MAX_EXT] = { NULL, HD_CFA_OK },
1047 [WIN_MULTREAD_EXT] = { NULL, HD_CFA_OK },
1048 [WIN_WRITE] = { NULL, HD_CFA_OK },
1049 [WIN_WRITE_ONCE] = { NULL, HD_CFA_OK },
1050 [WIN_WRITE_EXT] = { NULL, HD_CFA_OK },
1051 [WIN_WRITEDMA_EXT] = { NULL, HD_CFA_OK },
1052 [CFA_WRITE_SECT_WO_ERASE] = { NULL, CFA_OK },
1053 [WIN_MULTWRITE_EXT] = { NULL, HD_CFA_OK },
1054 [WIN_WRITE_VERIFY] = { NULL, HD_CFA_OK },
1055 [WIN_VERIFY] = { NULL, HD_CFA_OK },
1056 [WIN_VERIFY_ONCE] = { NULL, HD_CFA_OK },
1057 [WIN_VERIFY_EXT] = { NULL, HD_CFA_OK },
1058 [WIN_SEEK] = { NULL, HD_CFA_OK },
1059 [CFA_TRANSLATE_SECTOR] = { NULL, CFA_OK },
1060 [WIN_DIAGNOSE] = { NULL, ALL_OK },
1061 [WIN_SPECIFY] = { NULL, HD_CFA_OK },
1062 [WIN_STANDBYNOW2] = { NULL, ALL_OK },
1063 [WIN_IDLEIMMEDIATE2] = { NULL, ALL_OK },
1064 [WIN_STANDBY2] = { NULL, ALL_OK },
1065 [WIN_SETIDLE2] = { NULL, ALL_OK },
1066 [WIN_CHECKPOWERMODE2] = { NULL, ALL_OK },
1067 [WIN_SLEEPNOW2] = { NULL, ALL_OK },
1068 [WIN_PACKETCMD] = { NULL, CD_OK },
1069 [WIN_PIDENTIFY] = { NULL, CD_OK },
1070 [WIN_SMART] = { NULL, HD_CFA_OK },
1071 [CFA_ACCESS_METADATA_STORAGE] = { NULL, CFA_OK },
1072 [CFA_ERASE_SECTORS] = { NULL, CFA_OK },
1073 [WIN_MULTREAD] = { NULL, HD_CFA_OK },
1074 [WIN_MULTWRITE] = { NULL, HD_CFA_OK },
1075 [WIN_SETMULT] = { NULL, HD_CFA_OK },
1076 [WIN_READDMA] = { NULL, HD_CFA_OK },
1077 [WIN_READDMA_ONCE] = { NULL, HD_CFA_OK },
1078 [WIN_WRITEDMA] = { NULL, HD_CFA_OK },
1079 [WIN_WRITEDMA_ONCE] = { NULL, HD_CFA_OK },
1080 [CFA_WRITE_MULTI_WO_ERASE] = { NULL, CFA_OK },
1081 [WIN_STANDBYNOW1] = { NULL, ALL_OK },
1082 [WIN_IDLEIMMEDIATE] = { NULL, ALL_OK },
1083 [WIN_STANDBY] = { NULL, ALL_OK },
1084 [WIN_SETIDLE1] = { NULL, ALL_OK },
1085 [WIN_CHECKPOWERMODE1] = { NULL, ALL_OK },
1086 [WIN_SLEEPNOW1] = { NULL, ALL_OK },
1087 [WIN_FLUSH_CACHE] = { NULL, ALL_OK },
1088 [WIN_FLUSH_CACHE_EXT] = { NULL, HD_CFA_OK },
1089 [WIN_IDENTIFY] = { NULL, ALL_OK },
1090 [WIN_SETFEATURES] = { NULL, ALL_OK },
1091 [IBM_SENSE_CONDITION] = { NULL, CFA_OK },
1092 [CFA_WEAR_LEVEL] = { NULL, HD_CFA_OK },
1093 [WIN_READ_NATIVE_MAX] = { NULL, ALL_OK },
844505b1
MA		 1094};
1095
1096static bool ide_cmd_permitted(IDEState *s, uint32_t cmd)
1097{
1098 return cmd < ARRAY_SIZE(ide_cmd_table)
a0436e92 1099 && (ide_cmd_table[cmd].flags & (1u << s->drive_kind));
844505b1 1100}
7cff87ff
AG		 1101
1102void ide_exec_cmd(IDEBus *bus, uint32_t val)
1103{
7cdd481c 1104 uint16_t *identify_data;
7cff87ff
AG		 1105 IDEState *s;
1106 int n;
1107 int lba48 = 0;
1108
5391d806 1109#if defined(DEBUG_IDE)
6ef2ba5e 1110 printf("ide: CMD=%02x\n", val);
5391d806 1111#endif
6ef2ba5e 1112 s = idebus_active_if(bus);
66a0a2cb 1113 /* ignore commands to non existent slave */
6ef2ba5e
AG		 1114 if (s != bus->ifs && !s->bs)
1115 return;
c2ff060f 1116
6ef2ba5e
AG		 1117 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
1118 if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET)
1119 return;
fcdd25ab 1120
844505b1
MA		 1121 if (!ide_cmd_permitted(s, val)) {
1122 goto abort_cmd;
1123 }
1124
a0436e92
KW		 1125 if (ide_cmd_table[val].handler != NULL) {
1126 bool complete;
1127
1128 s->status = READY_STAT | BUSY_STAT;
1129 s->error = 0;
1130
1131 complete = ide_cmd_table[val].handler(s, val);
1132 if (complete) {
1133 s->status &= ~BUSY_STAT;
1134 assert(!!s->error == !!(s->status & ERR_STAT));
1135
1136 if ((ide_cmd_table[val].flags & SET_DSC) && !s->error) {
1137 s->status |= SEEK_STAT;
1138 }
1139
1140 ide_set_irq(s->bus);
1141 }
1142
1143 return;
1144 }
1145
6ef2ba5e
AG		 1146 switch(val) {
1147 case WIN_IDENTIFY:
1148 if (s->bs && s->drive_kind != IDE_CD) {
1149 if (s->drive_kind != IDE_CFATA)
1150 ide_identify(s);
1151 else
1152 ide_cfata_identify(s);
769bec72 1153 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1154 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1155 } else {
1156 if (s->drive_kind == IDE_CD) {
1157 ide_set_signature(s);
5391d806 1158 }
6ef2ba5e
AG		 1159 ide_abort_command(s);
1160 }
1161 ide_set_irq(s->bus);
1162 break;
1163 case WIN_SPECIFY:
1164 case WIN_RECAL:
1165 s->error = 0;
1166 s->status = READY_STAT | SEEK_STAT;
1167 ide_set_irq(s->bus);
1168 break;
1169 case WIN_SETMULT:
1170 if (s->drive_kind == IDE_CFATA && s->nsector == 0) {
1171 /* Disable Read and Write Multiple */
1172 s->mult_sectors = 0;
41a2b959 1173 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1174 } else if ((s->nsector & 0xff) != 0 &&
1175 ((s->nsector & 0xff) > MAX_MULT_SECTORS ||
1176 (s->nsector & (s->nsector - 1)) != 0)) {
1177 ide_abort_command(s);
1178 } else {
1179 s->mult_sectors = s->nsector & 0xff;
1180 s->status = READY_STAT | SEEK_STAT;
1181 }
1182 ide_set_irq(s->bus);
1183 break;
67bec53d 1184
6ef2ba5e 1185 case WIN_VERIFY_EXT:
67bec53d
KW		 1186 lba48 = 1;
1187 /* fall through */
6ef2ba5e
AG		 1188 case WIN_VERIFY:
1189 case WIN_VERIFY_ONCE:
1190 /* do sector number check ? */
1191 ide_cmd_lba48_transform(s, lba48);
1192 s->status = READY_STAT | SEEK_STAT;
1193 ide_set_irq(s->bus);
1194 break;
67bec53d 1195
814839c0 1196 case WIN_READ_EXT:
67bec53d
KW		 1197 lba48 = 1;
1198 /* fall through */
6ef2ba5e
AG		 1199 case WIN_READ:
1200 case WIN_READ_ONCE:
3f76a7c3
MA		 1201 if (s->drive_kind == IDE_CD) {
1202 ide_set_signature(s); /* odd, but ATA4 8.27.5.2 requires it */
6ef2ba5e 1203 goto abort_cmd;
3f76a7c3 1204 }
d53cdb30
PB		 1205 if (!s->bs) {
1206 goto abort_cmd;
1207 }
6ef2ba5e
AG		 1208 ide_cmd_lba48_transform(s, lba48);
1209 s->req_nb_sectors = 1;
1210 ide_sector_read(s);
1211 break;
67bec53d 1212
814839c0 1213 case WIN_WRITE_EXT:
67bec53d
KW		 1214 lba48 = 1;
1215 /* fall through */
6ef2ba5e
AG		 1216 case WIN_WRITE:
1217 case WIN_WRITE_ONCE:
1218 case CFA_WRITE_SECT_WO_ERASE:
1219 case WIN_WRITE_VERIFY:
d53cdb30
PB		 1220 if (!s->bs) {
1221 goto abort_cmd;
1222 }
6ef2ba5e
AG		 1223 ide_cmd_lba48_transform(s, lba48);
1224 s->error = 0;
1225 s->status = SEEK_STAT | READY_STAT;
1226 s->req_nb_sectors = 1;
1227 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1228 s->media_changed = 1;
1229 break;
67bec53d 1230
814839c0 1231 case WIN_MULTREAD_EXT:
67bec53d
KW		 1232 lba48 = 1;
1233 /* fall through */
6ef2ba5e 1234 case WIN_MULTREAD:
d53cdb30
PB		 1235 if (!s->bs) {
1236 goto abort_cmd;
1237 }
1238 if (!s->mult_sectors) {
6ef2ba5e 1239 goto abort_cmd;
d53cdb30 1240 }
6ef2ba5e
AG		 1241 ide_cmd_lba48_transform(s, lba48);
1242 s->req_nb_sectors = s->mult_sectors;
1243 ide_sector_read(s);
1244 break;
67bec53d 1245
6ef2ba5e 1246 case WIN_MULTWRITE_EXT:
67bec53d
KW		 1247 lba48 = 1;
1248 /* fall through */
6ef2ba5e
AG		 1249 case WIN_MULTWRITE:
1250 case CFA_WRITE_MULTI_WO_ERASE:
d53cdb30
PB		 1251 if (!s->bs) {
1252 goto abort_cmd;
1253 }
1254 if (!s->mult_sectors) {
6ef2ba5e 1255 goto abort_cmd;
d53cdb30 1256 }
6ef2ba5e
AG		 1257 ide_cmd_lba48_transform(s, lba48);
1258 s->error = 0;
1259 s->status = SEEK_STAT | READY_STAT;
1260 s->req_nb_sectors = s->mult_sectors;
1261 n = s->nsector;
1262 if (n > s->req_nb_sectors)
1263 n = s->req_nb_sectors;
1264 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1265 s->media_changed = 1;
1266 break;
67bec53d 1267
814839c0 1268 case WIN_READDMA_EXT:
67bec53d
KW		 1269 lba48 = 1;
1270 /* fall through */
6ef2ba5e
AG		 1271 case WIN_READDMA:
1272 case WIN_READDMA_ONCE:
d53cdb30 1273 if (!s->bs) {
6ef2ba5e 1274 goto abort_cmd;
d53cdb30 1275 }
6ef2ba5e 1276 ide_cmd_lba48_transform(s, lba48);
4e1e0051 1277 ide_sector_start_dma(s, IDE_DMA_READ);
6ef2ba5e 1278 break;
67bec53d 1279
814839c0 1280 case WIN_WRITEDMA_EXT:
67bec53d
KW		 1281 lba48 = 1;
1282 /* fall through */
6ef2ba5e
AG		 1283 case WIN_WRITEDMA:
1284 case WIN_WRITEDMA_ONCE:
d53cdb30 1285 if (!s->bs) {
6ef2ba5e 1286 goto abort_cmd;
d53cdb30 1287 }
6ef2ba5e 1288 ide_cmd_lba48_transform(s, lba48);
4e1e0051 1289 ide_sector_start_dma(s, IDE_DMA_WRITE);
6ef2ba5e
AG		 1290 s->media_changed = 1;
1291 break;
67bec53d 1292
6ef2ba5e 1293 case WIN_READ_NATIVE_MAX_EXT:
67bec53d
KW		 1294 lba48 = 1;
1295 /* fall through */
6ef2ba5e 1296 case WIN_READ_NATIVE_MAX:
aad64f31
SH		 1297 /* Refuse if no sectors are addressable (e.g. medium not inserted) */
1298 if (s->nb_sectors == 0) {
1299 goto abort_cmd;
1300 }
6ef2ba5e
AG		 1301 ide_cmd_lba48_transform(s, lba48);
1302 ide_set_sector(s, s->nb_sectors - 1);
1303 s->status = READY_STAT | SEEK_STAT;
1304 ide_set_irq(s->bus);
1305 break;
67bec53d 1306
6ef2ba5e
AG		 1307 case WIN_CHECKPOWERMODE1:
1308 case WIN_CHECKPOWERMODE2:
b93af93d 1309 s->error = 0;
6ef2ba5e
AG		 1310 s->nsector = 0xff; /* device active or idle */
1311 s->status = READY_STAT | SEEK_STAT;
1312 ide_set_irq(s->bus);
1313 break;
1314 case WIN_SETFEATURES:
1315 if (!s->bs)
1316 goto abort_cmd;
1317 /* XXX: valid for CDROM ? */
1318 switch(s->feature) {
6ef2ba5e 1319 case 0x02: /* write cache enable */
7cdd481c
PB		 1320 bdrv_set_enable_write_cache(s->bs, true);
1321 identify_data = (uint16_t *)s->identify_data;
1322 put_le16(identify_data + 85, (1 << 14) | (1 << 5) | 1);
1323 s->status = READY_STAT | SEEK_STAT;
1324 ide_set_irq(s->bus);
1325 break;
6ef2ba5e 1326 case 0x82: /* write cache disable */
7cdd481c
PB		 1327 bdrv_set_enable_write_cache(s->bs, false);
1328 identify_data = (uint16_t *)s->identify_data;
1329 put_le16(identify_data + 85, (1 << 14) | 1);
1330 ide_flush_cache(s);
1331 break;
1332 case 0xcc: /* reverting to power-on defaults enable */
1333 case 0x66: /* reverting to power-on defaults disable */
6ef2ba5e
AG		 1334 case 0xaa: /* read look-ahead enable */
1335 case 0x55: /* read look-ahead disable */
1336 case 0x05: /* set advanced power management mode */
1337 case 0x85: /* disable advanced power management mode */
1338 case 0x69: /* NOP */
1339 case 0x67: /* NOP */
1340 case 0x96: /* NOP */
1341 case 0x9a: /* NOP */
1342 case 0x42: /* enable Automatic Acoustic Mode */
1343 case 0xc2: /* disable Automatic Acoustic Mode */
41a2b959 1344 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1345 ide_set_irq(s->bus);
a136e5a8 1346 break;
6ef2ba5e 1347 case 0x03: { /* set transfer mode */
94458802 1348 uint8_t val = s->nsector & 0x07;
7cdd481c 1349 identify_data = (uint16_t *)s->identify_data;
94458802
FB		 1350
1351 switch (s->nsector >> 3) {
6ef2ba5e
AG		 1352 case 0x00: /* pio default */
1353 case 0x01: /* pio mode */
96c35ceb
JQ		 1354 put_le16(identify_data + 62,0x07);
1355 put_le16(identify_data + 63,0x07);
1356 put_le16(identify_data + 88,0x3f);
d1b5c20d 1357 break;
6ef2ba5e 1358 case 0x02: /* sigle word dma mode*/
96c35ceb
JQ		 1359 put_le16(identify_data + 62,0x07 | (1 << (val + 8)));
1360 put_le16(identify_data + 63,0x07);
1361 put_le16(identify_data + 88,0x3f);
94458802 1362 break;
6ef2ba5e 1363 case 0x04: /* mdma mode */
96c35ceb
JQ		 1364 put_le16(identify_data + 62,0x07);
1365 put_le16(identify_data + 63,0x07 | (1 << (val + 8)));
1366 put_le16(identify_data + 88,0x3f);
94458802 1367 break;
6ef2ba5e 1368 case 0x08: /* udma mode */
96c35ceb
JQ		 1369 put_le16(identify_data + 62,0x07);
1370 put_le16(identify_data + 63,0x07);
1371 put_le16(identify_data + 88,0x3f | (1 << (val + 8)));
94458802 1372 break;
6ef2ba5e 1373 default:
94458802
FB		 1374 goto abort_cmd;
1375 }
4fbfcd6d 1376 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1377 ide_set_irq(s->bus);
4fbfcd6d 1378 break;
6ef2ba5e
AG		 1379 }
1380 default:
1381 goto abort_cmd;
1382 }
1383 break;
1384 case WIN_FLUSH_CACHE:
1385 case WIN_FLUSH_CACHE_EXT:
1386 ide_flush_cache(s);
1387 break;
1388 case WIN_STANDBY:
1389 case WIN_STANDBY2:
1390 case WIN_STANDBYNOW1:
1391 case WIN_STANDBYNOW2:
1392 case WIN_IDLEIMMEDIATE:
1d4316d3 1393 case WIN_IDLEIMMEDIATE2:
6ef2ba5e
AG		 1394 case WIN_SETIDLE1:
1395 case WIN_SETIDLE2:
1396 case WIN_SLEEPNOW1:
1397 case WIN_SLEEPNOW2:
1398 s->status = READY_STAT;
1399 ide_set_irq(s->bus);
1400 break;
1401 case WIN_SEEK:
6ef2ba5e
AG		 1402 /* XXX: Check that seek is within bounds */
1403 s->status = READY_STAT | SEEK_STAT;
1404 ide_set_irq(s->bus);
1405 break;
1406 /* ATAPI commands */
1407 case WIN_PIDENTIFY:
844505b1
MA		 1408 ide_atapi_identify(s);
1409 s->status = READY_STAT | SEEK_STAT;
1410 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
6ef2ba5e
AG		 1411 ide_set_irq(s->bus);
1412 break;
1413 case WIN_DIAGNOSE:
1414 ide_set_signature(s);
1415 if (s->drive_kind == IDE_CD)
1416 s->status = 0; /* ATAPI spec (v6) section 9.10 defines packet
1417 * devices to return a clear status register
1418 * with READY_STAT *not* set. */
1419 else
41a2b959 1420 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1421 s->error = 0x01; /* Device 0 passed, Device 1 passed or not
1422 * present.
1423 */
1424 ide_set_irq(s->bus);
1425 break;
1d4316d3 1426 case WIN_DEVICE_RESET:
6ef2ba5e
AG		 1427 ide_set_signature(s);
1428 s->status = 0x00; /* NOTE: READY is _not_ set */
1429 s->error = 0x01;
1430 break;
1431 case WIN_PACKETCMD:
6ef2ba5e
AG		 1432 /* overlapping commands not supported */
1433 if (s->feature & 0x02)
1434 goto abort_cmd;
1435 s->status = READY_STAT | SEEK_STAT;
1436 s->atapi_dma = s->feature & 1;
1437 s->nsector = 1;
1438 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
1439 ide_atapi_cmd);
1440 break;
1441 /* CF-ATA commands */
1442 case CFA_REQ_EXT_ERROR_CODE:
6ef2ba5e
AG		 1443 s->error = 0x09; /* miscellaneous error */
1444 s->status = READY_STAT | SEEK_STAT;
1445 ide_set_irq(s->bus);
1446 break;
1447 case CFA_ERASE_SECTORS:
1448 case CFA_WEAR_LEVEL:
d5b406d9
AG		 1449#if 0
1450 /* This one has the same ID as CFA_WEAR_LEVEL and is required for
1451 Windows 8 to work with AHCI */
1452 case WIN_SECURITY_FREEZE_LOCK:
1453#endif
6ef2ba5e
AG		 1454 if (val == CFA_WEAR_LEVEL)
1455 s->nsector = 0;
1456 if (val == CFA_ERASE_SECTORS)
1457 s->media_changed = 1;
1458 s->error = 0x00;
1459 s->status = READY_STAT | SEEK_STAT;
1460 ide_set_irq(s->bus);
1461 break;
1462 case CFA_TRANSLATE_SECTOR:
6ef2ba5e
AG		 1463 s->error = 0x00;
1464 s->status = READY_STAT | SEEK_STAT;
1465 memset(s->io_buffer, 0, 0x200);
1466 s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */
1467 s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */
1468 s->io_buffer[0x02] = s->select; /* Head */
1469 s->io_buffer[0x03] = s->sector; /* Sector */
1470 s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */
1471 s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */
1472 s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */
1473 s->io_buffer[0x13] = 0x00; /* Erase flag */
1474 s->io_buffer[0x18] = 0x00; /* Hot count */
1475 s->io_buffer[0x19] = 0x00; /* Hot count */
1476 s->io_buffer[0x1a] = 0x01; /* Hot count */
1477 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1478 ide_set_irq(s->bus);
1479 break;
1480 case CFA_ACCESS_METADATA_STORAGE:
6ef2ba5e
AG		 1481 switch (s->feature) {
1482 case 0x02: /* Inquiry Metadata Storage */
1483 ide_cfata_metadata_inquiry(s);
201a51fc 1484 break;
6ef2ba5e
AG		 1485 case 0x03: /* Read Metadata Storage */
1486 ide_cfata_metadata_read(s);
201a51fc 1487 break;
6ef2ba5e
AG		 1488 case 0x04: /* Write Metadata Storage */
1489 ide_cfata_metadata_write(s);
201a51fc 1490 break;
6ef2ba5e
AG		 1491 default:
1492 goto abort_cmd;
1493 }
1494 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1495 s->status = 0x00; /* NOTE: READY is _not_ set */
1496 ide_set_irq(s->bus);
1497 break;
1498 case IBM_SENSE_CONDITION:
6ef2ba5e
AG		 1499 switch (s->feature) {
1500 case 0x01: /* sense temperature in device */
1501 s->nsector = 0x50; /* +20 C */
201a51fc 1502 break;
6ef2ba5e
AG		 1503 default:
1504 goto abort_cmd;
1505 }
1506 s->status = READY_STAT | SEEK_STAT;
1507 ide_set_irq(s->bus);
1508 break;
e8b54394 1509
814839c0 1510 case WIN_SMART:
6ef2ba5e 1511 if (s->hcyl != 0xc2 || s->lcyl != 0x4f)
e8b54394 1512 goto abort_cmd;
6ef2ba5e 1513 if (!s->smart_enabled && s->feature != SMART_ENABLE)
e8b54394 1514 goto abort_cmd;
6ef2ba5e
AG		 1515 switch (s->feature) {
1516 case SMART_DISABLE:
e8b54394
BW		 1517 s->smart_enabled = 0;
1518 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1519 ide_set_irq(s->bus);
e8b54394 1520 break;
6ef2ba5e 1521 case SMART_ENABLE:
e8b54394
BW		 1522 s->smart_enabled = 1;
1523 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1524 ide_set_irq(s->bus);
e8b54394 1525 break;
6ef2ba5e 1526 case SMART_ATTR_AUTOSAVE:
e8b54394
BW		 1527 switch (s->sector) {
1528 case 0x00:
6ef2ba5e
AG		 1529 s->smart_autosave = 0;
1530 break;
e8b54394 1531 case 0xf1:
6ef2ba5e
AG		 1532 s->smart_autosave = 1;
1533 break;
e8b54394 1534 default:
6ef2ba5e 1535 goto abort_cmd;
e8b54394
BW		 1536 }
1537 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1538 ide_set_irq(s->bus);
e8b54394 1539 break;
6ef2ba5e 1540 case SMART_STATUS:
e8b54394 1541 if (!s->smart_errors) {
6ef2ba5e
AG		 1542 s->hcyl = 0xc2;
1543 s->lcyl = 0x4f;
e8b54394 1544 } else {
6ef2ba5e
AG		 1545 s->hcyl = 0x2c;
1546 s->lcyl = 0xf4;
e8b54394
BW		 1547 }
1548 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1549 ide_set_irq(s->bus);
e8b54394 1550 break;
6ef2ba5e 1551 case SMART_READ_THRESH:
e8b54394
BW		 1552 memset(s->io_buffer, 0, 0x200);
1553 s->io_buffer[0] = 0x01; /* smart struct version */
1e53537f 1554 for (n = 0; n < ARRAY_SIZE(smart_attributes); n++) {
6ef2ba5e 1555 s->io_buffer[2+0+(n*12)] = smart_attributes[n][0];
b93af93d 1556 s->io_buffer[2+1+(n*12)] = smart_attributes[n][11];
e8b54394
BW		 1557 }
1558 for (n=0; n<511; n++) /* checksum */
6ef2ba5e 1559 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1560 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1561 s->status = READY_STAT | SEEK_STAT;
1562 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1563 ide_set_irq(s->bus);
e8b54394 1564 break;
6ef2ba5e 1565 case SMART_READ_DATA:
e8b54394
BW		 1566 memset(s->io_buffer, 0, 0x200);
1567 s->io_buffer[0] = 0x01; /* smart struct version */
1e53537f 1568 for (n = 0; n < ARRAY_SIZE(smart_attributes); n++) {
b93af93d
BW		 1569 int i;
1570 for(i = 0; i < 11; i++) {
1571 s->io_buffer[2+i+(n*12)] = smart_attributes[n][i];
1572 }
e8b54394
BW		 1573 }
1574 s->io_buffer[362] = 0x02 | (s->smart_autosave?0x80:0x00);
1575 if (s->smart_selftest_count == 0) {
6ef2ba5e 1576 s->io_buffer[363] = 0;
e8b54394 1577 } else {
6ef2ba5e 1578 s->io_buffer[363] =
e8b54394 1579 s->smart_selftest_data[3 +
6ef2ba5e
AG		 1580 (s->smart_selftest_count - 1) *
1581 24];
e8b54394
BW		 1582 }
1583 s->io_buffer[364] = 0x20;
1584 s->io_buffer[365] = 0x01;
1585 /* offline data collection capacity: execute + self-test*/
1586 s->io_buffer[367] = (1<<4 | 1<<3 | 1);
1587 s->io_buffer[368] = 0x03; /* smart capability (1) */
1588 s->io_buffer[369] = 0x00; /* smart capability (2) */
1589 s->io_buffer[370] = 0x01; /* error logging supported */
1590 s->io_buffer[372] = 0x02; /* minutes for poll short test */
1591 s->io_buffer[373] = 0x36; /* minutes for poll ext test */
1592 s->io_buffer[374] = 0x01; /* minutes for poll conveyance */
1593
1594 for (n=0; n<511; n++)
6ef2ba5e 1595 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1596 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1597 s->status = READY_STAT | SEEK_STAT;
1598 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1599 ide_set_irq(s->bus);
e8b54394 1600 break;
6ef2ba5e 1601 case SMART_READ_LOG:
e8b54394
BW		 1602 switch (s->sector) {
1603 case 0x01: /* summary smart error log */
6ef2ba5e
AG		 1604 memset(s->io_buffer, 0, 0x200);
1605 s->io_buffer[0] = 0x01;
1606 s->io_buffer[1] = 0x00; /* no error entries */
1607 s->io_buffer[452] = s->smart_errors & 0xff;
1608 s->io_buffer[453] = (s->smart_errors & 0xff00) >> 8;
e8b54394 1609
6ef2ba5e 1610 for (n=0; n<511; n++)
e8b54394 1611 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1612 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1613 break;
e8b54394 1614 case 0x06: /* smart self test log */
6ef2ba5e
AG		 1615 memset(s->io_buffer, 0, 0x200);
1616 s->io_buffer[0] = 0x01;
1617 if (s->smart_selftest_count == 0) {
e8b54394 1618 s->io_buffer[508] = 0;
6ef2ba5e 1619 } else {
e8b54394
BW		 1620 s->io_buffer[508] = s->smart_selftest_count;
1621 for (n=2; n<506; n++)
6ef2ba5e
AG		 1622 s->io_buffer[n] = s->smart_selftest_data[n];
1623 }
1624 for (n=0; n<511; n++)
e8b54394 1625 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1626 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1627 break;
e8b54394 1628 default:
6ef2ba5e 1629 goto abort_cmd;
e8b54394
BW		 1630 }
1631 s->status = READY_STAT | SEEK_STAT;
1632 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1633 ide_set_irq(s->bus);
e8b54394 1634 break;
6ef2ba5e 1635 case SMART_EXECUTE_OFFLINE:
e8b54394
BW		 1636 switch (s->sector) {
1637 case 0: /* off-line routine */
1638 case 1: /* short self test */
1639 case 2: /* extended self test */
6ef2ba5e
AG		 1640 s->smart_selftest_count++;
1641 if(s->smart_selftest_count > 21)
e8b54394 1642 s->smart_selftest_count = 0;
6ef2ba5e
AG		 1643 n = 2 + (s->smart_selftest_count - 1) * 24;
1644 s->smart_selftest_data[n] = s->sector;
1645 s->smart_selftest_data[n+1] = 0x00; /* OK and finished */
1646 s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */
1647 s->smart_selftest_data[n+3] = 0x12; /* hour count msb */
1648 s->status = READY_STAT | SEEK_STAT;
1649 ide_set_irq(s->bus);
1650 break;
e8b54394 1651 default:
6ef2ba5e 1652 goto abort_cmd;
e8b54394
BW		 1653 }
1654 break;
6ef2ba5e 1655 default:
e8b54394 1656 goto abort_cmd;
6ef2ba5e
AG		 1657 }
1658 break;
1659 default:
844505b1 1660 /* should not be reachable */
6ef2ba5e
AG		 1661 abort_cmd:
1662 ide_abort_command(s);
1663 ide_set_irq(s->bus);
1664 break;
1665 }
5391d806
FB		 1666}
1667
356721ae 1668uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
5391d806 1669{
bcbdc4d3
GH		 1670 IDEBus *bus = opaque;
1671 IDEState *s = idebus_active_if(bus);
5391d806 1672 uint32_t addr;
c2ff060f 1673 int ret, hob;
5391d806
FB		 1674
1675 addr = addr1 & 7;
c2ff060f
FB		 1676 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1677 //hob = s->select & (1 << 7);
1678 hob = 0;
5391d806
FB		 1679 switch(addr) {
1680 case 0:
1681 ret = 0xff;
1682 break;
1683 case 1:
bcbdc4d3
GH		 1684 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1685 (s != bus->ifs && !s->bs))
c45c3d00 1686 ret = 0;
c2ff060f 1687 else if (!hob)
c45c3d00 1688 ret = s->error;
c2ff060f
FB		 1689 else
1690 ret = s->hob_feature;
5391d806
FB		 1691 break;
1692 case 2:
bcbdc4d3 1693 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1694 ret = 0;
c2ff060f 1695 else if (!hob)
c45c3d00 1696 ret = s->nsector & 0xff;
c2ff060f
FB		 1697 else
1698 ret = s->hob_nsector;
5391d806
FB		 1699 break;
1700 case 3:
bcbdc4d3 1701 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1702 ret = 0;
c2ff060f 1703 else if (!hob)
c45c3d00 1704 ret = s->sector;
c2ff060f
FB		 1705 else
1706 ret = s->hob_sector;
5391d806
FB		 1707 break;
1708 case 4:
bcbdc4d3 1709 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1710 ret = 0;
c2ff060f 1711 else if (!hob)
c45c3d00 1712 ret = s->lcyl;
c2ff060f
FB		 1713 else
1714 ret = s->hob_lcyl;
5391d806
FB		 1715 break;
1716 case 5:
bcbdc4d3 1717 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1718 ret = 0;
c2ff060f 1719 else if (!hob)
c45c3d00 1720 ret = s->hcyl;
c2ff060f
FB		 1721 else
1722 ret = s->hob_hcyl;
5391d806
FB		 1723 break;
1724 case 6:
bcbdc4d3 1725 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00
FB		 1726 ret = 0;
1727 else
7ae98627 1728 ret = s->select;
5391d806
FB		 1729 break;
1730 default:
1731 case 7:
bcbdc4d3
GH		 1732 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1733 (s != bus->ifs && !s->bs))
c45c3d00
FB		 1734 ret = 0;
1735 else
1736 ret = s->status;
9cdd03a7 1737 qemu_irq_lower(bus->irq);
5391d806
FB		 1738 break;
1739 }
1740#ifdef DEBUG_IDE
1741 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1742#endif
1743 return ret;
1744}
1745
356721ae 1746uint32_t ide_status_read(void *opaque, uint32_t addr)
5391d806 1747{
bcbdc4d3
GH		 1748 IDEBus *bus = opaque;
1749 IDEState *s = idebus_active_if(bus);
5391d806 1750 int ret;
7ae98627 1751
bcbdc4d3
GH		 1752 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1753 (s != bus->ifs && !s->bs))
7ae98627
FB		 1754 ret = 0;
1755 else
1756 ret = s->status;
5391d806
FB		 1757#ifdef DEBUG_IDE
1758 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1759#endif
1760 return ret;
1761}
1762
356721ae 1763void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
5391d806 1764{
bcbdc4d3 1765 IDEBus *bus = opaque;
5391d806
FB		 1766 IDEState *s;
1767 int i;
1768
1769#ifdef DEBUG_IDE
1770 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1771#endif
1772 /* common for both drives */
9cdd03a7 1773 if (!(bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1774 (val & IDE_CMD_RESET)) {
1775 /* reset low to high */
1776 for(i = 0;i < 2; i++) {
bcbdc4d3 1777 s = &bus->ifs[i];
5391d806
FB		 1778 s->status = BUSY_STAT | SEEK_STAT;
1779 s->error = 0x01;
1780 }
9cdd03a7 1781 } else if ((bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1782 !(val & IDE_CMD_RESET)) {
1783 /* high to low */
1784 for(i = 0;i < 2; i++) {
bcbdc4d3 1785 s = &bus->ifs[i];
cd8722bb 1786 if (s->drive_kind == IDE_CD)
6b136f9e
FB		 1787 s->status = 0x00; /* NOTE: READY is _not_ set */
1788 else
56bf1d37 1789 s->status = READY_STAT | SEEK_STAT;
5391d806
FB		 1790 ide_set_signature(s);
1791 }
1792 }
1793
9cdd03a7 1794 bus->cmd = val;
5391d806
FB		 1795}
1796
40c4ed3f
KW		 1797/*
1798 * Returns true if the running PIO transfer is a PIO out (i.e. data is
1799 * transferred from the device to the guest), false if it's a PIO in
1800 */
1801static bool ide_is_pio_out(IDEState *s)
1802{
1803 if (s->end_transfer_func == ide_sector_write ||
1804 s->end_transfer_func == ide_atapi_cmd) {
1805 return false;
1806 } else if (s->end_transfer_func == ide_sector_read ||
1807 s->end_transfer_func == ide_transfer_stop ||
1808 s->end_transfer_func == ide_atapi_cmd_reply_end ||
1809 s->end_transfer_func == ide_dummy_transfer_stop) {
1810 return true;
1811 }
1812
1813 abort();
1814}
1815
356721ae 1816void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
5391d806 1817{
bcbdc4d3
GH		 1818 IDEBus *bus = opaque;
1819 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1820 uint8_t *p;
1821
40c4ed3f
KW		 1822 /* PIO data access allowed only when DRQ bit is set. The result of a write
1823 * during PIO out is indeterminate, just ignore it. */
1824 if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
fcdd25ab 1825 return;
40c4ed3f 1826 }
fcdd25ab 1827
5391d806 1828 p = s->data_ptr;
0c4ad8dc 1829 *(uint16_t *)p = le16_to_cpu(val);
5391d806
FB		 1830 p += 2;
1831 s->data_ptr = p;
1832 if (p >= s->data_end)
1833 s->end_transfer_func(s);
1834}
1835
356721ae 1836uint32_t ide_data_readw(void *opaque, uint32_t addr)
5391d806 1837{
bcbdc4d3
GH		 1838 IDEBus *bus = opaque;
1839 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1840 uint8_t *p;
1841 int ret;
fcdd25ab 1842
40c4ed3f
KW		 1843 /* PIO data access allowed only when DRQ bit is set. The result of a read
1844 * during PIO in is indeterminate, return 0 and don't move forward. */
1845 if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
fcdd25ab 1846 return 0;
40c4ed3f 1847 }
fcdd25ab 1848
5391d806 1849 p = s->data_ptr;
0c4ad8dc 1850 ret = cpu_to_le16(*(uint16_t *)p);
5391d806
FB		 1851 p += 2;
1852 s->data_ptr = p;
1853 if (p >= s->data_end)
1854 s->end_transfer_func(s);
1855 return ret;
1856}
1857
356721ae 1858void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
5391d806 1859{
bcbdc4d3
GH		 1860 IDEBus *bus = opaque;
1861 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1862 uint8_t *p;
1863
40c4ed3f
KW		 1864 /* PIO data access allowed only when DRQ bit is set. The result of a write
1865 * during PIO out is indeterminate, just ignore it. */
1866 if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
fcdd25ab 1867 return;
40c4ed3f 1868 }
fcdd25ab 1869
5391d806 1870 p = s->data_ptr;
0c4ad8dc 1871 *(uint32_t *)p = le32_to_cpu(val);
5391d806
FB		 1872 p += 4;
1873 s->data_ptr = p;
1874 if (p >= s->data_end)
1875 s->end_transfer_func(s);
1876}
1877
356721ae 1878uint32_t ide_data_readl(void *opaque, uint32_t addr)
5391d806 1879{
bcbdc4d3
GH		 1880 IDEBus *bus = opaque;
1881 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1882 uint8_t *p;
1883 int ret;
3b46e624 1884
40c4ed3f
KW		 1885 /* PIO data access allowed only when DRQ bit is set. The result of a read
1886 * during PIO in is indeterminate, return 0 and don't move forward. */
1887 if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
fcdd25ab 1888 return 0;
40c4ed3f 1889 }
fcdd25ab 1890
5391d806 1891 p = s->data_ptr;
0c4ad8dc 1892 ret = cpu_to_le32(*(uint32_t *)p);
5391d806
FB		 1893 p += 4;
1894 s->data_ptr = p;
1895 if (p >= s->data_end)
1896 s->end_transfer_func(s);
1897 return ret;
1898}
1899
a7dfe172
FB		 1900static void ide_dummy_transfer_stop(IDEState *s)
1901{
1902 s->data_ptr = s->io_buffer;
1903 s->data_end = s->io_buffer;
1904 s->io_buffer[0] = 0xff;
1905 s->io_buffer[1] = 0xff;
1906 s->io_buffer[2] = 0xff;
1907 s->io_buffer[3] = 0xff;
1908}
1909
4a643563 1910static void ide_reset(IDEState *s)
5391d806 1911{
4a643563
BS		 1912#ifdef DEBUG_IDE
1913 printf("ide: reset\n");
1914#endif
bef0fd59
SH		 1915
1916 if (s->pio_aiocb) {
1917 bdrv_aio_cancel(s->pio_aiocb);
1918 s->pio_aiocb = NULL;
1919 }
1920
cd8722bb 1921 if (s->drive_kind == IDE_CFATA)
201a51fc
AZ		 1922 s->mult_sectors = 0;
1923 else
1924 s->mult_sectors = MAX_MULT_SECTORS;
4a643563
BS		 1925 /* ide regs */
1926 s->feature = 0;
1927 s->error = 0;
1928 s->nsector = 0;
1929 s->sector = 0;
1930 s->lcyl = 0;
1931 s->hcyl = 0;
1932
1933 /* lba48 */
1934 s->hob_feature = 0;
1935 s->hob_sector = 0;
1936 s->hob_nsector = 0;
1937 s->hob_lcyl = 0;
1938 s->hob_hcyl = 0;
1939
5391d806 1940 s->select = 0xa0;
41a2b959 1941 s->status = READY_STAT | SEEK_STAT;
4a643563
BS		 1942
1943 s->lba48 = 0;
1944
1945 /* ATAPI specific */
1946 s->sense_key = 0;
1947 s->asc = 0;
1948 s->cdrom_changed = 0;
1949 s->packet_transfer_size = 0;
1950 s->elementary_transfer_size = 0;
1951 s->io_buffer_index = 0;
1952 s->cd_sector_size = 0;
1953 s->atapi_dma = 0;
a7f3d65b
PH		 1954 s->tray_locked = 0;
1955 s->tray_open = 0;
4a643563
BS		 1956 /* ATA DMA state */
1957 s->io_buffer_size = 0;
1958 s->req_nb_sectors = 0;
1959
5391d806 1960 ide_set_signature(s);
a7dfe172
FB		 1961 /* init the transfer handler so that 0xffff is returned on data
1962 accesses */
1963 s->end_transfer_func = ide_dummy_transfer_stop;
1964 ide_dummy_transfer_stop(s);
201a51fc 1965 s->media_changed = 0;
5391d806
FB		 1966}
1967
4a643563
BS		 1968void ide_bus_reset(IDEBus *bus)
1969{
1970 bus->unit = 0;
1971 bus->cmd = 0;
1972 ide_reset(&bus->ifs[0]);
1973 ide_reset(&bus->ifs[1]);
1974 ide_clear_hob(bus);
40a6238a
AG		 1975
1976 /* pending async DMA */
1977 if (bus->dma->aiocb) {
1978#ifdef DEBUG_AIO
1979 printf("aio_cancel\n");
1980#endif
1981 bdrv_aio_cancel(bus->dma->aiocb);
1982 bus->dma->aiocb = NULL;
1983 }
1984
1985 /* reset dma provider too */
1986 bus->dma->ops->reset(bus->dma);
4a643563
BS		 1987}
1988
e4def80b
MA		 1989static bool ide_cd_is_tray_open(void *opaque)
1990{
1991 return ((IDEState *)opaque)->tray_open;
1992}
1993
f107639a
MA		 1994static bool ide_cd_is_medium_locked(void *opaque)
1995{
1996 return ((IDEState *)opaque)->tray_locked;
1997}
1998
0e49de52 1999static const BlockDevOps ide_cd_block_ops = {
145feb17 2000 .change_media_cb = ide_cd_change_cb,
2df0a3a3 2001 .eject_request_cb = ide_cd_eject_request_cb,
e4def80b 2002 .is_tray_open = ide_cd_is_tray_open,
f107639a 2003 .is_medium_locked = ide_cd_is_medium_locked,
0e49de52
MA		 2004};
2005
1f56e32a 2006int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind,
95ebda85 2007 const char *version, const char *serial, const char *model,
ba801960
MA		 2008 uint64_t wwn,
2009 uint32_t cylinders, uint32_t heads, uint32_t secs,
2010 int chs_trans)
88804180 2011{
88804180
GH		 2012 uint64_t nb_sectors;
2013
f8b6cc00 2014 s->bs = bs;
1f56e32a
MA		 2015 s->drive_kind = kind;
2016
f8b6cc00 2017 bdrv_get_geometry(bs, &nb_sectors);
870111c8
MA		 2018 s->cylinders = cylinders;
2019 s->heads = heads;
2020 s->sectors = secs;
ba801960 2021 s->chs_trans = chs_trans;
870111c8 2022 s->nb_sectors = nb_sectors;
95ebda85 2023 s->wwn = wwn;
870111c8
MA		 2024 /* The SMART values should be preserved across power cycles
2025 but they aren't. */
2026 s->smart_enabled = 1;
2027 s->smart_autosave = 1;
2028 s->smart_errors = 0;
2029 s->smart_selftest_count = 0;
1f56e32a 2030 if (kind == IDE_CD) {
0e49de52 2031 bdrv_set_dev_ops(bs, &ide_cd_block_ops, s);
7b6f9300 2032 bdrv_set_buffer_alignment(bs, 2048);
7aa9c811 2033 } else {
98f28ad7
MA		 2034 if (!bdrv_is_inserted(s->bs)) {
2035 error_report("Device needs media, but drive is empty");
2036 return -1;
2037 }
7aa9c811
MA		 2038 if (bdrv_is_read_only(bs)) {
2039 error_report("Can't use a read-only drive");
2040 return -1;
2041 }
88804180 2042 }
f8b6cc00 2043 if (serial) {
aa2c91bd 2044 pstrcpy(s->drive_serial_str, sizeof(s->drive_serial_str), serial);
6ced55a5 2045 } else {
88804180
GH		 2046 snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
2047 "QM%05d", s->drive_serial);
870111c8 2048 }
27e0c9a1
FB		 2049 if (model) {
2050 pstrcpy(s->drive_model_str, sizeof(s->drive_model_str), model);
2051 } else {
2052 switch (kind) {
2053 case IDE_CD:
2054 strcpy(s->drive_model_str, "QEMU DVD-ROM");
2055 break;
2056 case IDE_CFATA:
2057 strcpy(s->drive_model_str, "QEMU MICRODRIVE");
2058 break;
2059 default:
2060 strcpy(s->drive_model_str, "QEMU HARDDISK");
2061 break;
2062 }
2063 }
2064
47c06340
GH		 2065 if (version) {
2066 pstrcpy(s->version, sizeof(s->version), version);
2067 } else {
93bfef4c 2068 pstrcpy(s->version, sizeof(s->version), qemu_get_version());
47c06340 2069 }
40a6238a 2070
88804180 2071 ide_reset(s);
50fb1900 2072 bdrv_iostatus_enable(bs);
c4d74df7 2073 return 0;
88804180
GH		 2074}
2075
57234ee4 2076static void ide_init1(IDEBus *bus, int unit)
d459da0e
MA		 2077{
2078 static int drive_serial = 1;
2079 IDEState *s = &bus->ifs[unit];
2080
2081 s->bus = bus;
2082 s->unit = unit;
2083 s->drive_serial = drive_serial++;
1b2adf28 2084 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
50641c5c 2085 s->io_buffer_total_len = IDE_DMA_BUF_SECTORS*512 + 4;
c925400b
KW		 2086 s->io_buffer = qemu_memalign(2048, s->io_buffer_total_len);
2087 memset(s->io_buffer, 0, s->io_buffer_total_len);
2088
d459da0e 2089 s->smart_selftest_data = qemu_blockalign(s->bs, 512);
c925400b
KW		 2090 memset(s->smart_selftest_data, 0, 512);
2091
74475455 2092 s->sector_write_timer = qemu_new_timer_ns(vm_clock,
d459da0e 2093 ide_sector_write_timer_cb, s);
57234ee4
MA		 2094}
2095
40a6238a
AG		 2096static void ide_nop_start(IDEDMA *dma, IDEState *s,
2097 BlockDriverCompletionFunc *cb)
2098{
2099}
2100
2101static int ide_nop(IDEDMA *dma)
2102{
2103 return 0;
2104}
2105
2106static int ide_nop_int(IDEDMA *dma, int x)
2107{
2108 return 0;
2109}
2110
1dfb4dd9 2111static void ide_nop_restart(void *opaque, int x, RunState y)
40a6238a
AG		 2112{
2113}
2114
2115static const IDEDMAOps ide_dma_nop_ops = {
2116 .start_dma = ide_nop_start,
2117 .start_transfer = ide_nop,
2118 .prepare_buf = ide_nop_int,
2119 .rw_buf = ide_nop_int,
2120 .set_unit = ide_nop_int,
2121 .add_status = ide_nop_int,
2122 .set_inactive = ide_nop,
2123 .restart_cb = ide_nop_restart,
2124 .reset = ide_nop,
2125};
2126
2127static IDEDMA ide_dma_nop = {
2128 .ops = &ide_dma_nop_ops,
2129 .aiocb = NULL,
2130};
2131
57234ee4
MA		 2132void ide_init2(IDEBus *bus, qemu_irq irq)
2133{
2134 int i;
2135
2136 for(i = 0; i < 2; i++) {
2137 ide_init1(bus, i);
2138 ide_reset(&bus->ifs[i]);
870111c8 2139 }
57234ee4 2140 bus->irq = irq;
40a6238a 2141 bus->dma = &ide_dma_nop;
d459da0e
MA		 2142}
2143
57234ee4
MA		 2144/* TODO convert users to qdev and remove */
2145void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
2146 DriveInfo *hd1, qemu_irq irq)
5391d806 2147{
ba801960 2148 int i, trans;
57234ee4 2149 DriveInfo *dinfo;
ba801960 2150 uint32_t cyls, heads, secs;
5391d806 2151
caed8802 2152 for(i = 0; i < 2; i++) {
57234ee4
MA		 2153 dinfo = i == 0 ? hd0 : hd1;
2154 ide_init1(bus, i);
2155 if (dinfo) {
ba801960
MA		 2156 cyls = dinfo->cyls;
2157 heads = dinfo->heads;
2158 secs = dinfo->secs;
2159 trans = dinfo->trans;
2160 if (!cyls && !heads && !secs) {
2161 hd_geometry_guess(dinfo->bdrv, &cyls, &heads, &secs, &trans);
2adc99b2
MA		 2162 } else if (trans == BIOS_ATA_TRANSLATION_AUTO) {
2163 trans = hd_bios_chs_auto_trans(cyls, heads, secs);
ba801960 2164 }
b7eb0c9f
MA		 2165 if (cyls < 1 || cyls > 65535) {
2166 error_report("cyls must be between 1 and 65535");
2167 exit(1);
2168 }
2169 if (heads < 1 || heads > 16) {
2170 error_report("heads must be between 1 and 16");
2171 exit(1);
2172 }
2173 if (secs < 1 || secs > 255) {
2174 error_report("secs must be between 1 and 255");
2175 exit(1);
2176 }
1f56e32a 2177 if (ide_init_drive(&bus->ifs[i], dinfo->bdrv,
577d0a38
MA		 2178 dinfo->media_cd ? IDE_CD : IDE_HD,
2179 NULL, dinfo->serial, NULL, 0,
2180 cyls, heads, secs, trans) < 0) {
c4d74df7
MA		 2181 error_report("Can't set up IDE drive %s", dinfo->id);
2182 exit(1);
2183 }
fa879d62 2184 bdrv_attach_dev_nofail(dinfo->bdrv, &bus->ifs[i]);
57234ee4
MA		 2185 } else {
2186 ide_reset(&bus->ifs[i]);
2187 }
5391d806 2188 }
9cdd03a7 2189 bus->irq = irq;
40a6238a 2190 bus->dma = &ide_dma_nop;
69b91039
FB		 2191}
2192
4a91d3b3
RH		 2193static const MemoryRegionPortio ide_portio_list[] = {
2194 { 0, 8, 1, .read = ide_ioport_read, .write = ide_ioport_write },
2195 { 0, 2, 2, .read = ide_data_readw, .write = ide_data_writew },
2196 { 0, 4, 4, .read = ide_data_readl, .write = ide_data_writel },
2197 PORTIO_END_OF_LIST(),
2198};
2199
2200static const MemoryRegionPortio ide_portio2_list[] = {
2201 { 0, 1, 1, .read = ide_status_read, .write = ide_cmd_write },
2202 PORTIO_END_OF_LIST(),
2203};
2204
2205void ide_init_ioport(IDEBus *bus, ISADevice *dev, int iobase, int iobase2)
69b91039 2206{
4a91d3b3
RH		 2207 /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA
2208 bridge has been setup properly to always register with ISA. */
2209 isa_register_portio_list(dev, iobase, ide_portio_list, bus, "ide");
2210
caed8802 2211 if (iobase2) {
4a91d3b3 2212 isa_register_portio_list(dev, iobase2, ide_portio2_list, bus, "ide");
5391d806 2213 }
5391d806 2214}
69b91039 2215
37159f13 2216static bool is_identify_set(void *opaque, int version_id)
aa941b94 2217{
37159f13
JQ		 2218 IDEState *s = opaque;
2219
2220 return s->identify_set != 0;
2221}
2222
50641c5c
JQ		 2223static EndTransferFunc* transfer_end_table[] = {
2224 ide_sector_read,
2225 ide_sector_write,
2226 ide_transfer_stop,
2227 ide_atapi_cmd_reply_end,
2228 ide_atapi_cmd,
2229 ide_dummy_transfer_stop,
2230};
2231
2232static int transfer_end_table_idx(EndTransferFunc *fn)
2233{
2234 int i;
2235
2236 for (i = 0; i < ARRAY_SIZE(transfer_end_table); i++)
2237 if (transfer_end_table[i] == fn)
2238 return i;
2239
2240 return -1;
2241}
2242
37159f13 2243static int ide_drive_post_load(void *opaque, int version_id)
aa941b94 2244{
37159f13
JQ		 2245 IDEState *s = opaque;
2246
7cdd481c
PB		 2247 if (s->identify_set) {
2248 bdrv_set_enable_write_cache(s->bs, !!(s->identify_data[85] & (1 << 5)));
2249 }
37159f13 2250 return 0;
aa941b94
AZ		 2251}
2252
50641c5c
JQ		 2253static int ide_drive_pio_post_load(void *opaque, int version_id)
2254{
2255 IDEState *s = opaque;
2256
fb60105d 2257 if (s->end_transfer_fn_idx >= ARRAY_SIZE(transfer_end_table)) {
50641c5c
JQ		 2258 return -EINVAL;
2259 }
2260 s->end_transfer_func = transfer_end_table[s->end_transfer_fn_idx];
2261 s->data_ptr = s->io_buffer + s->cur_io_buffer_offset;
2262 s->data_end = s->data_ptr + s->cur_io_buffer_len;
2263
2264 return 0;
2265}
2266
2267static void ide_drive_pio_pre_save(void *opaque)
2268{
2269 IDEState *s = opaque;
2270 int idx;
2271
2272 s->cur_io_buffer_offset = s->data_ptr - s->io_buffer;
2273 s->cur_io_buffer_len = s->data_end - s->data_ptr;
2274
2275 idx = transfer_end_table_idx(s->end_transfer_func);
2276 if (idx == -1) {
2277 fprintf(stderr, "%s: invalid end_transfer_func for DRQ_STAT\n",
2278 __func__);
2279 s->end_transfer_fn_idx = 2;
2280 } else {
2281 s->end_transfer_fn_idx = idx;
2282 }
2283}
2284
2285static bool ide_drive_pio_state_needed(void *opaque)
2286{
2287 IDEState *s = opaque;
2288
fdc650d7
KW		 2289 return ((s->status & DRQ_STAT) != 0)
2290 || (s->bus->error_status & BM_STATUS_PIO_RETRY);
50641c5c
JQ		 2291}
2292
db118fe7
MA		 2293static bool ide_tray_state_needed(void *opaque)
2294{
2295 IDEState *s = opaque;
2296
2297 return s->tray_open || s->tray_locked;
2298}
2299
996faf1a
AS		 2300static bool ide_atapi_gesn_needed(void *opaque)
2301{
2302 IDEState *s = opaque;
2303
2304 return s->events.new_media || s->events.eject_request;
2305}
2306
def93791
KW		 2307static bool ide_error_needed(void *opaque)
2308{
2309 IDEBus *bus = opaque;
2310
2311 return (bus->error_status != 0);
2312}
2313
996faf1a 2314/* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
656fbeff 2315static const VMStateDescription vmstate_ide_atapi_gesn_state = {
996faf1a
AS		 2316 .name ="ide_drive/atapi/gesn_state",
2317 .version_id = 1,
2318 .minimum_version_id = 1,
2319 .minimum_version_id_old = 1,
2320 .fields = (VMStateField []) {
2321 VMSTATE_BOOL(events.new_media, IDEState),
2322 VMSTATE_BOOL(events.eject_request, IDEState),
0754f9ec 2323 VMSTATE_END_OF_LIST()
996faf1a
AS		 2324 }
2325};
2326
db118fe7
MA		 2327static const VMStateDescription vmstate_ide_tray_state = {
2328 .name = "ide_drive/tray_state",
2329 .version_id = 1,
2330 .minimum_version_id = 1,
2331 .minimum_version_id_old = 1,
db118fe7
MA		 2332 .fields = (VMStateField[]) {
2333 VMSTATE_BOOL(tray_open, IDEState),
2334 VMSTATE_BOOL(tray_locked, IDEState),
2335 VMSTATE_END_OF_LIST()
2336 }
2337};
2338
656fbeff 2339static const VMStateDescription vmstate_ide_drive_pio_state = {
50641c5c
JQ		 2340 .name = "ide_drive/pio_state",
2341 .version_id = 1,
2342 .minimum_version_id = 1,
2343 .minimum_version_id_old = 1,
2344 .pre_save = ide_drive_pio_pre_save,
2345 .post_load = ide_drive_pio_post_load,
2346 .fields = (VMStateField []) {
2347 VMSTATE_INT32(req_nb_sectors, IDEState),
2348 VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1,
2349 vmstate_info_uint8, uint8_t),
2350 VMSTATE_INT32(cur_io_buffer_offset, IDEState),
2351 VMSTATE_INT32(cur_io_buffer_len, IDEState),
2352 VMSTATE_UINT8(end_transfer_fn_idx, IDEState),
2353 VMSTATE_INT32(elementary_transfer_size, IDEState),
2354 VMSTATE_INT32(packet_transfer_size, IDEState),
2355 VMSTATE_END_OF_LIST()
2356 }
2357};
2358
37159f13
JQ		 2359const VMStateDescription vmstate_ide_drive = {
2360 .name = "ide_drive",
3abb6260 2361 .version_id = 3,
37159f13
JQ		 2362 .minimum_version_id = 0,
2363 .minimum_version_id_old = 0,
2364 .post_load = ide_drive_post_load,
2365 .fields = (VMStateField []) {
2366 VMSTATE_INT32(mult_sectors, IDEState),
2367 VMSTATE_INT32(identify_set, IDEState),
2368 VMSTATE_BUFFER_TEST(identify_data, IDEState, is_identify_set),
2369 VMSTATE_UINT8(feature, IDEState),
2370 VMSTATE_UINT8(error, IDEState),
2371 VMSTATE_UINT32(nsector, IDEState),
2372 VMSTATE_UINT8(sector, IDEState),
2373 VMSTATE_UINT8(lcyl, IDEState),
2374 VMSTATE_UINT8(hcyl, IDEState),
2375 VMSTATE_UINT8(hob_feature, IDEState),
2376 VMSTATE_UINT8(hob_sector, IDEState),
2377 VMSTATE_UINT8(hob_nsector, IDEState),
2378 VMSTATE_UINT8(hob_lcyl, IDEState),
2379 VMSTATE_UINT8(hob_hcyl, IDEState),
2380 VMSTATE_UINT8(select, IDEState),
2381 VMSTATE_UINT8(status, IDEState),
2382 VMSTATE_UINT8(lba48, IDEState),
2383 VMSTATE_UINT8(sense_key, IDEState),
2384 VMSTATE_UINT8(asc, IDEState),
2385 VMSTATE_UINT8_V(cdrom_changed, IDEState, 3),
37159f13 2386 VMSTATE_END_OF_LIST()
50641c5c
JQ		 2387 },
2388 .subsections = (VMStateSubsection []) {
2389 {
2390 .vmsd = &vmstate_ide_drive_pio_state,
2391 .needed = ide_drive_pio_state_needed,
db118fe7
MA		 2392 }, {
2393 .vmsd = &vmstate_ide_tray_state,
2394 .needed = ide_tray_state_needed,
996faf1a
AS		 2395 }, {
2396 .vmsd = &vmstate_ide_atapi_gesn_state,
2397 .needed = ide_atapi_gesn_needed,
50641c5c
JQ		 2398 }, {
2399 /* empty */
2400 }
37159f13
JQ		 2401 }
2402};
2403
656fbeff 2404static const VMStateDescription vmstate_ide_error_status = {
def93791
KW		 2405 .name ="ide_bus/error",
2406 .version_id = 1,
2407 .minimum_version_id = 1,
2408 .minimum_version_id_old = 1,
2409 .fields = (VMStateField []) {
2410 VMSTATE_INT32(error_status, IDEBus),
2411 VMSTATE_END_OF_LIST()
2412 }
2413};
2414
6521dc62
JQ		 2415const VMStateDescription vmstate_ide_bus = {
2416 .name = "ide_bus",
2417 .version_id = 1,
2418 .minimum_version_id = 1,
2419 .minimum_version_id_old = 1,
2420 .fields = (VMStateField []) {
2421 VMSTATE_UINT8(cmd, IDEBus),
2422 VMSTATE_UINT8(unit, IDEBus),
2423 VMSTATE_END_OF_LIST()
def93791
KW		 2424 },
2425 .subsections = (VMStateSubsection []) {
2426 {
2427 .vmsd = &vmstate_ide_error_status,
2428 .needed = ide_error_needed,
2429 }, {
2430 /* empty */
2431 }
6521dc62
JQ		 2432 }
2433};
75717903
IY		 2434
2435void ide_drive_get(DriveInfo **hd, int max_bus)
2436{
2437 int i;
2438
2439 if (drive_get_max_bus(IF_IDE) >= max_bus) {
2440 fprintf(stderr, "qemu: too many IDE bus: %d\n", max_bus);
2441 exit(1);
2442 }
2443
2444 for(i = 0; i < max_bus * MAX_IDE_DEVS; i++) {
2445 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
2446 }
2447}
Empty description
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