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1ddda5cd AG |
1 | /* |
2 | * Apple SMC controller | |
3 | * | |
4 | * Copyright (c) 2007 Alexander Graf | |
5 | * | |
6 | * Authors: Alexander Graf <[email protected]> | |
7 | * Susanne Graf <[email protected]> | |
8 | * | |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
21 | * | |
22 | * ***************************************************************** | |
23 | * | |
24 | * In all Intel-based Apple hardware there is an SMC chip to control the | |
25 | * backlight, fans and several other generic device parameters. It also | |
26 | * contains the magic keys used to dongle Mac OS X to the device. | |
27 | * | |
28 | * This driver was mostly created by looking at the Linux AppleSMC driver | |
29 | * implementation and does not support IRQ. | |
30 | * | |
31 | */ | |
32 | ||
83c9f4ca | 33 | #include "hw/hw.h" |
0d09e41a | 34 | #include "hw/isa/isa.h" |
28ecbaee | 35 | #include "ui/console.h" |
1de7afc9 | 36 | #include "qemu/timer.h" |
1ddda5cd AG |
37 | |
38 | /* #define DEBUG_SMC */ | |
39 | ||
40 | #define APPLESMC_DEFAULT_IOBASE 0x300 | |
41 | /* data port used by Apple SMC */ | |
42 | #define APPLESMC_DATA_PORT 0x0 | |
43 | /* command/status port used by Apple SMC */ | |
44 | #define APPLESMC_CMD_PORT 0x4 | |
45 | #define APPLESMC_NR_PORTS 32 | |
46 | #define APPLESMC_MAX_DATA_LENGTH 32 | |
47 | ||
48 | #define APPLESMC_READ_CMD 0x10 | |
49 | #define APPLESMC_WRITE_CMD 0x11 | |
50 | #define APPLESMC_GET_KEY_BY_INDEX_CMD 0x12 | |
51 | #define APPLESMC_GET_KEY_TYPE_CMD 0x13 | |
52 | ||
53 | #ifdef DEBUG_SMC | |
54 | #define smc_debug(...) fprintf(stderr, "AppleSMC: " __VA_ARGS__) | |
55 | #else | |
56 | #define smc_debug(...) do { } while(0) | |
57 | #endif | |
58 | ||
59 | static char default_osk[64] = "This is a dummy key. Enter the real key " | |
60 | "using the -osk parameter"; | |
61 | ||
62 | struct AppleSMCData { | |
63 | uint8_t len; | |
64 | const char *key; | |
65 | const char *data; | |
66 | QLIST_ENTRY(AppleSMCData) node; | |
67 | }; | |
68 | ||
82407b6c AF |
69 | #define TYPE_APPLE_SMC "isa-applesmc" |
70 | #define APPLE_SMC(obj) OBJECT_CHECK(AppleSMCState, (obj), TYPE_APPLE_SMC) | |
71 | ||
72 | typedef struct AppleSMCState AppleSMCState; | |
73 | struct AppleSMCState { | |
74 | ISADevice parent_obj; | |
75 | ||
1ddda5cd AG |
76 | uint32_t iobase; |
77 | uint8_t cmd; | |
78 | uint8_t status; | |
79 | uint8_t key[4]; | |
80 | uint8_t read_pos; | |
81 | uint8_t data_len; | |
82 | uint8_t data_pos; | |
83 | uint8_t data[255]; | |
84 | uint8_t charactic[4]; | |
85 | char *osk; | |
86 | QLIST_HEAD(, AppleSMCData) data_def; | |
87 | }; | |
88 | ||
89 | static void applesmc_io_cmd_writeb(void *opaque, uint32_t addr, uint32_t val) | |
90 | { | |
82407b6c | 91 | AppleSMCState *s = opaque; |
1ddda5cd AG |
92 | |
93 | smc_debug("CMD Write B: %#x = %#x\n", addr, val); | |
94 | switch(val) { | |
95 | case APPLESMC_READ_CMD: | |
96 | s->status = 0x0c; | |
97 | break; | |
98 | } | |
99 | s->cmd = val; | |
100 | s->read_pos = 0; | |
101 | s->data_pos = 0; | |
102 | } | |
103 | ||
82407b6c | 104 | static void applesmc_fill_data(AppleSMCState *s) |
1ddda5cd AG |
105 | { |
106 | struct AppleSMCData *d; | |
107 | ||
108 | QLIST_FOREACH(d, &s->data_def, node) { | |
109 | if (!memcmp(d->key, s->key, 4)) { | |
110 | smc_debug("Key matched (%s Len=%d Data=%s)\n", d->key, | |
111 | d->len, d->data); | |
112 | memcpy(s->data, d->data, d->len); | |
113 | return; | |
114 | } | |
115 | } | |
116 | } | |
117 | ||
118 | static void applesmc_io_data_writeb(void *opaque, uint32_t addr, uint32_t val) | |
119 | { | |
82407b6c | 120 | AppleSMCState *s = opaque; |
1ddda5cd AG |
121 | |
122 | smc_debug("DATA Write B: %#x = %#x\n", addr, val); | |
123 | switch(s->cmd) { | |
124 | case APPLESMC_READ_CMD: | |
125 | if(s->read_pos < 4) { | |
126 | s->key[s->read_pos] = val; | |
127 | s->status = 0x04; | |
128 | } else if(s->read_pos == 4) { | |
129 | s->data_len = val; | |
130 | s->status = 0x05; | |
131 | s->data_pos = 0; | |
132 | smc_debug("Key = %c%c%c%c Len = %d\n", s->key[0], | |
133 | s->key[1], s->key[2], s->key[3], val); | |
134 | applesmc_fill_data(s); | |
135 | } | |
136 | s->read_pos++; | |
137 | break; | |
138 | } | |
139 | } | |
140 | ||
141 | static uint32_t applesmc_io_data_readb(void *opaque, uint32_t addr1) | |
142 | { | |
82407b6c | 143 | AppleSMCState *s = opaque; |
1ddda5cd AG |
144 | uint8_t retval = 0; |
145 | ||
146 | switch(s->cmd) { | |
147 | case APPLESMC_READ_CMD: | |
148 | if(s->data_pos < s->data_len) { | |
149 | retval = s->data[s->data_pos]; | |
150 | smc_debug("READ_DATA[%d] = %#hhx\n", s->data_pos, | |
151 | retval); | |
152 | s->data_pos++; | |
153 | if(s->data_pos == s->data_len) { | |
154 | s->status = 0x00; | |
155 | smc_debug("EOF\n"); | |
156 | } else | |
157 | s->status = 0x05; | |
158 | } | |
159 | } | |
160 | smc_debug("DATA Read b: %#x = %#x\n", addr1, retval); | |
161 | ||
162 | return retval; | |
163 | } | |
164 | ||
165 | static uint32_t applesmc_io_cmd_readb(void *opaque, uint32_t addr1) | |
166 | { | |
82407b6c | 167 | AppleSMCState *s = opaque; |
1ddda5cd AG |
168 | |
169 | smc_debug("CMD Read B: %#x\n", addr1); | |
170 | return s->status; | |
171 | } | |
172 | ||
82407b6c | 173 | static void applesmc_add_key(AppleSMCState *s, const char *key, |
1ddda5cd AG |
174 | int len, const char *data) |
175 | { | |
176 | struct AppleSMCData *def; | |
177 | ||
7267c094 | 178 | def = g_malloc0(sizeof(struct AppleSMCData)); |
1ddda5cd AG |
179 | def->key = key; |
180 | def->len = len; | |
181 | def->data = data; | |
182 | ||
183 | QLIST_INSERT_HEAD(&s->data_def, def, node); | |
184 | } | |
185 | ||
186 | static void qdev_applesmc_isa_reset(DeviceState *dev) | |
187 | { | |
82407b6c | 188 | AppleSMCState *s = APPLE_SMC(dev); |
1ddda5cd AG |
189 | struct AppleSMCData *d, *next; |
190 | ||
191 | /* Remove existing entries */ | |
192 | QLIST_FOREACH_SAFE(d, &s->data_def, node, next) { | |
193 | QLIST_REMOVE(d, node); | |
194 | } | |
195 | ||
7f90fa77 | 196 | applesmc_add_key(s, "REV ", 6, "\x01\x13\x0f\x00\x00\x03"); |
1ddda5cd AG |
197 | applesmc_add_key(s, "OSK0", 32, s->osk); |
198 | applesmc_add_key(s, "OSK1", 32, s->osk + 32); | |
199 | applesmc_add_key(s, "NATJ", 1, "\0"); | |
200 | applesmc_add_key(s, "MSSP", 1, "\0"); | |
201 | applesmc_add_key(s, "MSSD", 1, "\0x3"); | |
202 | } | |
203 | ||
204 | static int applesmc_isa_init(ISADevice *dev) | |
205 | { | |
82407b6c | 206 | AppleSMCState *s = APPLE_SMC(dev); |
1ddda5cd AG |
207 | |
208 | register_ioport_read(s->iobase + APPLESMC_DATA_PORT, 4, 1, | |
209 | applesmc_io_data_readb, s); | |
210 | register_ioport_read(s->iobase + APPLESMC_CMD_PORT, 4, 1, | |
211 | applesmc_io_cmd_readb, s); | |
212 | register_ioport_write(s->iobase + APPLESMC_DATA_PORT, 4, 1, | |
213 | applesmc_io_data_writeb, s); | |
214 | register_ioport_write(s->iobase + APPLESMC_CMD_PORT, 4, 1, | |
215 | applesmc_io_cmd_writeb, s); | |
216 | ||
217 | if (!s->osk || (strlen(s->osk) != 64)) { | |
218 | fprintf(stderr, "WARNING: Using AppleSMC with invalid key\n"); | |
219 | s->osk = default_osk; | |
220 | } | |
221 | ||
222 | QLIST_INIT(&s->data_def); | |
223 | qdev_applesmc_isa_reset(&dev->qdev); | |
224 | ||
225 | return 0; | |
226 | } | |
227 | ||
39bffca2 | 228 | static Property applesmc_isa_properties[] = { |
82407b6c | 229 | DEFINE_PROP_HEX32("iobase", AppleSMCState, iobase, |
39bffca2 | 230 | APPLESMC_DEFAULT_IOBASE), |
82407b6c | 231 | DEFINE_PROP_STRING("osk", AppleSMCState, osk), |
39bffca2 AL |
232 | DEFINE_PROP_END_OF_LIST(), |
233 | }; | |
234 | ||
8f04ee08 AL |
235 | static void qdev_applesmc_class_init(ObjectClass *klass, void *data) |
236 | { | |
39bffca2 | 237 | DeviceClass *dc = DEVICE_CLASS(klass); |
8f04ee08 AL |
238 | ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); |
239 | ic->init = applesmc_isa_init; | |
39bffca2 AL |
240 | dc->reset = qdev_applesmc_isa_reset; |
241 | dc->props = applesmc_isa_properties; | |
8f04ee08 AL |
242 | } |
243 | ||
8c43a6f0 | 244 | static const TypeInfo applesmc_isa_info = { |
82407b6c | 245 | .name = TYPE_APPLE_SMC, |
39bffca2 | 246 | .parent = TYPE_ISA_DEVICE, |
82407b6c | 247 | .instance_size = sizeof(AppleSMCState), |
39bffca2 | 248 | .class_init = qdev_applesmc_class_init, |
1ddda5cd AG |
249 | }; |
250 | ||
83f7d43a | 251 | static void applesmc_register_types(void) |
1ddda5cd | 252 | { |
39bffca2 | 253 | type_register_static(&applesmc_isa_info); |
1ddda5cd AG |
254 | } |
255 | ||
83f7d43a | 256 | type_init(applesmc_register_types) |