]> Git Repo - qemu.git/blame - target/s390x/cc_helper.c
disas: Enable capstone disassembly for s390x
[qemu.git] / target / s390x / cc_helper.c
CommitLineData
a78b0504
BS
1/*
2 * S/390 condition code helper routines
3 *
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2009 Alexander Graf
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
41c6a6dd 10 * version 2.1 of the License, or (at your option) any later version.
a78b0504
BS
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
9615495a 21#include "qemu/osdep.h"
a78b0504 22#include "cpu.h"
4e58b838 23#include "internal.h"
1e36aee6 24#include "tcg_s390x.h"
63c91552 25#include "exec/exec-all.h"
2ef6175a 26#include "exec/helper-proto.h"
00d2dc19 27#include "qemu/host-utils.h"
a78b0504
BS
28
29/* #define DEBUG_HELPER */
30#ifdef DEBUG_HELPER
31#define HELPER_LOG(x...) qemu_log(x)
32#else
33#define HELPER_LOG(x...)
34#endif
35
443aaeb8 36static uint32_t cc_calc_ltgt_32(int32_t src, int32_t dst)
a78b0504
BS
37{
38 if (src == dst) {
39 return 0;
40 } else if (src < dst) {
41 return 1;
42 } else {
43 return 2;
44 }
45}
46
443aaeb8 47static uint32_t cc_calc_ltgt0_32(int32_t dst)
a78b0504 48{
443aaeb8 49 return cc_calc_ltgt_32(dst, 0);
a78b0504
BS
50}
51
443aaeb8 52static uint32_t cc_calc_ltgt_64(int64_t src, int64_t dst)
a78b0504
BS
53{
54 if (src == dst) {
55 return 0;
56 } else if (src < dst) {
57 return 1;
58 } else {
59 return 2;
60 }
61}
62
443aaeb8 63static uint32_t cc_calc_ltgt0_64(int64_t dst)
a78b0504 64{
443aaeb8 65 return cc_calc_ltgt_64(dst, 0);
a78b0504
BS
66}
67
443aaeb8 68static uint32_t cc_calc_ltugtu_32(uint32_t src, uint32_t dst)
a78b0504
BS
69{
70 if (src == dst) {
71 return 0;
72 } else if (src < dst) {
73 return 1;
74 } else {
75 return 2;
76 }
77}
78
443aaeb8 79static uint32_t cc_calc_ltugtu_64(uint64_t src, uint64_t dst)
a78b0504
BS
80{
81 if (src == dst) {
82 return 0;
83 } else if (src < dst) {
84 return 1;
85 } else {
86 return 2;
87 }
88}
89
443aaeb8 90static uint32_t cc_calc_tm_32(uint32_t val, uint32_t mask)
a78b0504 91{
00d2dc19 92 uint32_t r = val & mask;
a78b0504 93
00d2dc19 94 if (r == 0) {
a78b0504
BS
95 return 0;
96 } else if (r == mask) {
97 return 3;
98 } else {
99 return 1;
100 }
101}
102
443aaeb8 103static uint32_t cc_calc_tm_64(uint64_t val, uint64_t mask)
a78b0504 104{
00d2dc19 105 uint64_t r = val & mask;
a78b0504 106
00d2dc19 107 if (r == 0) {
a78b0504
BS
108 return 0;
109 } else if (r == mask) {
110 return 3;
111 } else {
00d2dc19
RH
112 int top = clz64(mask);
113 if ((int64_t)(val << top) < 0) {
a78b0504
BS
114 return 2;
115 } else {
116 return 1;
117 }
118 }
119}
120
443aaeb8 121static uint32_t cc_calc_nz(uint64_t dst)
a78b0504
BS
122{
123 return !!dst;
124}
125
443aaeb8 126static uint32_t cc_calc_add_64(int64_t a1, int64_t a2, int64_t ar)
a78b0504
BS
127{
128 if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
129 return 3; /* overflow */
130 } else {
131 if (ar < 0) {
132 return 1;
133 } else if (ar > 0) {
134 return 2;
135 } else {
136 return 0;
137 }
138 }
139}
140
443aaeb8 141static uint32_t cc_calc_addu_64(uint64_t a1, uint64_t a2, uint64_t ar)
a78b0504 142{
4e4bb438
RH
143 return (ar != 0) + 2 * (ar < a1);
144}
145
443aaeb8 146static uint32_t cc_calc_addc_64(uint64_t a1, uint64_t a2, uint64_t ar)
4e4bb438
RH
147{
148 /* Recover a2 + carry_in. */
149 uint64_t a2c = ar - a1;
150 /* Check for a2+carry_in overflow, then a1+a2c overflow. */
151 int carry_out = (a2c < a2) || (ar < a1);
152
153 return (ar != 0) + 2 * carry_out;
a78b0504
BS
154}
155
443aaeb8 156static uint32_t cc_calc_sub_64(int64_t a1, int64_t a2, int64_t ar)
a78b0504
BS
157{
158 if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
159 return 3; /* overflow */
160 } else {
161 if (ar < 0) {
162 return 1;
163 } else if (ar > 0) {
164 return 2;
165 } else {
166 return 0;
167 }
168 }
169}
170
443aaeb8 171static uint32_t cc_calc_subu_64(uint64_t a1, uint64_t a2, uint64_t ar)
a78b0504
BS
172{
173 if (ar == 0) {
174 return 2;
175 } else {
176 if (a2 > a1) {
177 return 1;
178 } else {
179 return 3;
180 }
181 }
182}
183
443aaeb8 184static uint32_t cc_calc_subb_64(uint64_t a1, uint64_t a2, uint64_t ar)
4e4bb438 185{
4e4bb438
RH
186 int borrow_out;
187
9ef14736
TG
188 if (ar != a1 - a2) { /* difference means borrow-in */
189 borrow_out = (a2 >= a1);
4e4bb438 190 } else {
4e4bb438
RH
191 borrow_out = (a2 > a1);
192 }
193
194 return (ar != 0) + 2 * !borrow_out;
195}
196
443aaeb8 197static uint32_t cc_calc_abs_64(int64_t dst)
a78b0504
BS
198{
199 if ((uint64_t)dst == 0x8000000000000000ULL) {
200 return 3;
201 } else if (dst) {
2aaa1940 202 return 2;
a78b0504
BS
203 } else {
204 return 0;
205 }
206}
207
443aaeb8 208static uint32_t cc_calc_nabs_64(int64_t dst)
a78b0504
BS
209{
210 return !!dst;
211}
212
443aaeb8 213static uint32_t cc_calc_comp_64(int64_t dst)
a78b0504
BS
214{
215 if ((uint64_t)dst == 0x8000000000000000ULL) {
216 return 3;
217 } else if (dst < 0) {
218 return 1;
219 } else if (dst > 0) {
220 return 2;
221 } else {
222 return 0;
223 }
224}
225
226
443aaeb8 227static uint32_t cc_calc_add_32(int32_t a1, int32_t a2, int32_t ar)
a78b0504
BS
228{
229 if ((a1 > 0 && a2 > 0 && ar < 0) || (a1 < 0 && a2 < 0 && ar > 0)) {
230 return 3; /* overflow */
231 } else {
232 if (ar < 0) {
233 return 1;
234 } else if (ar > 0) {
235 return 2;
236 } else {
237 return 0;
238 }
239 }
240}
241
443aaeb8 242static uint32_t cc_calc_addu_32(uint32_t a1, uint32_t a2, uint32_t ar)
a78b0504 243{
4e4bb438
RH
244 return (ar != 0) + 2 * (ar < a1);
245}
246
443aaeb8 247static uint32_t cc_calc_addc_32(uint32_t a1, uint32_t a2, uint32_t ar)
4e4bb438
RH
248{
249 /* Recover a2 + carry_in. */
250 uint32_t a2c = ar - a1;
251 /* Check for a2+carry_in overflow, then a1+a2c overflow. */
252 int carry_out = (a2c < a2) || (ar < a1);
253
254 return (ar != 0) + 2 * carry_out;
a78b0504
BS
255}
256
443aaeb8 257static uint32_t cc_calc_sub_32(int32_t a1, int32_t a2, int32_t ar)
a78b0504
BS
258{
259 if ((a1 > 0 && a2 < 0 && ar < 0) || (a1 < 0 && a2 > 0 && ar > 0)) {
260 return 3; /* overflow */
261 } else {
262 if (ar < 0) {
263 return 1;
264 } else if (ar > 0) {
265 return 2;
266 } else {
267 return 0;
268 }
269 }
270}
271
443aaeb8 272static uint32_t cc_calc_subu_32(uint32_t a1, uint32_t a2, uint32_t ar)
a78b0504
BS
273{
274 if (ar == 0) {
275 return 2;
276 } else {
277 if (a2 > a1) {
278 return 1;
279 } else {
280 return 3;
281 }
282 }
283}
284
443aaeb8 285static uint32_t cc_calc_subb_32(uint32_t a1, uint32_t a2, uint32_t ar)
4e4bb438 286{
4e4bb438
RH
287 int borrow_out;
288
9ef14736
TG
289 if (ar != a1 - a2) { /* difference means borrow-in */
290 borrow_out = (a2 >= a1);
4e4bb438 291 } else {
4e4bb438
RH
292 borrow_out = (a2 > a1);
293 }
294
295 return (ar != 0) + 2 * !borrow_out;
296}
297
443aaeb8 298static uint32_t cc_calc_abs_32(int32_t dst)
a78b0504
BS
299{
300 if ((uint32_t)dst == 0x80000000UL) {
301 return 3;
302 } else if (dst) {
2aaa1940 303 return 2;
a78b0504
BS
304 } else {
305 return 0;
306 }
307}
308
443aaeb8 309static uint32_t cc_calc_nabs_32(int32_t dst)
a78b0504
BS
310{
311 return !!dst;
312}
313
443aaeb8 314static uint32_t cc_calc_comp_32(int32_t dst)
a78b0504
BS
315{
316 if ((uint32_t)dst == 0x80000000UL) {
317 return 3;
318 } else if (dst < 0) {
319 return 1;
320 } else if (dst > 0) {
321 return 2;
322 } else {
323 return 0;
324 }
325}
326
327/* calculate condition code for insert character under mask insn */
58a9e35b 328static uint32_t cc_calc_icm(uint64_t mask, uint64_t val)
a78b0504 329{
58a9e35b
RH
330 if ((val & mask) == 0) {
331 return 0;
332 } else {
333 int top = clz64(mask);
334 if ((int64_t)(val << top) < 0) {
a78b0504
BS
335 return 1;
336 } else {
337 return 2;
338 }
339 }
a78b0504
BS
340}
341
cbe24bfa 342static uint32_t cc_calc_sla_32(uint32_t src, int shift)
a78b0504 343{
cbe24bfa
RH
344 uint32_t mask = ((1U << shift) - 1U) << (32 - shift);
345 uint32_t sign = 1U << 31;
346 uint32_t match;
347 int32_t r;
a78b0504 348
cbe24bfa
RH
349 /* Check if the sign bit stays the same. */
350 if (src & sign) {
a78b0504
BS
351 match = mask;
352 } else {
353 match = 0;
354 }
a78b0504 355 if ((src & mask) != match) {
cbe24bfa 356 /* Overflow. */
a78b0504
BS
357 return 3;
358 }
359
cbe24bfa
RH
360 r = ((src << shift) & ~sign) | (src & sign);
361 if (r == 0) {
a78b0504 362 return 0;
cbe24bfa 363 } else if (r < 0) {
a78b0504
BS
364 return 1;
365 }
a78b0504
BS
366 return 2;
367}
368
cbe24bfa
RH
369static uint32_t cc_calc_sla_64(uint64_t src, int shift)
370{
371 uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
372 uint64_t sign = 1ULL << 63;
373 uint64_t match;
374 int64_t r;
375
376 /* Check if the sign bit stays the same. */
377 if (src & sign) {
378 match = mask;
379 } else {
380 match = 0;
381 }
382 if ((src & mask) != match) {
383 /* Overflow. */
384 return 3;
385 }
386
387 r = ((src << shift) & ~sign) | (src & sign);
388 if (r == 0) {
389 return 0;
390 } else if (r < 0) {
391 return 1;
392 }
393 return 2;
394}
a78b0504 395
102bf2c6
RH
396static uint32_t cc_calc_flogr(uint64_t dst)
397{
398 return dst ? 2 : 0;
399}
400
6d930332
DH
401static uint32_t cc_calc_lcbb(uint64_t dst)
402{
403 return dst == 16 ? 0 : 3;
404}
405
ff825c6d
DH
406static uint32_t cc_calc_vc(uint64_t low, uint64_t high)
407{
408 if (high == -1ull && low == -1ull) {
409 /* all elements match */
410 return 0;
411 } else if (high == 0 && low == 0) {
412 /* no elements match */
413 return 3;
414 } else {
415 /* some elements but not all match */
416 return 1;
417 }
418}
419
b1feeb87
DH
420static uint32_t cc_calc_muls_32(int64_t res)
421{
422 const int64_t tmp = res >> 31;
423
424 if (!res) {
425 return 0;
426 } else if (tmp && tmp != -1) {
427 return 3;
428 } else if (res < 0) {
429 return 1;
430 }
431 return 2;
432}
433
434static uint64_t cc_calc_muls_64(int64_t res_high, uint64_t res_low)
435{
436 if (!res_high && !res_low) {
437 return 0;
438 } else if (res_high + (res_low >> 63) != 0) {
439 return 3;
440 } else if (res_high < 0) {
441 return 1;
442 }
443 return 2;
444}
445
443aaeb8 446static uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
a78b0504
BS
447 uint64_t src, uint64_t dst, uint64_t vr)
448{
449 uint32_t r = 0;
450
451 switch (cc_op) {
452 case CC_OP_CONST0:
453 case CC_OP_CONST1:
454 case CC_OP_CONST2:
455 case CC_OP_CONST3:
456 /* cc_op value _is_ cc */
457 r = cc_op;
458 break;
459 case CC_OP_LTGT0_32:
443aaeb8 460 r = cc_calc_ltgt0_32(dst);
a78b0504
BS
461 break;
462 case CC_OP_LTGT0_64:
443aaeb8 463 r = cc_calc_ltgt0_64(dst);
a78b0504
BS
464 break;
465 case CC_OP_LTGT_32:
443aaeb8 466 r = cc_calc_ltgt_32(src, dst);
a78b0504
BS
467 break;
468 case CC_OP_LTGT_64:
443aaeb8 469 r = cc_calc_ltgt_64(src, dst);
a78b0504
BS
470 break;
471 case CC_OP_LTUGTU_32:
443aaeb8 472 r = cc_calc_ltugtu_32(src, dst);
a78b0504
BS
473 break;
474 case CC_OP_LTUGTU_64:
443aaeb8 475 r = cc_calc_ltugtu_64(src, dst);
a78b0504
BS
476 break;
477 case CC_OP_TM_32:
443aaeb8 478 r = cc_calc_tm_32(src, dst);
a78b0504
BS
479 break;
480 case CC_OP_TM_64:
443aaeb8 481 r = cc_calc_tm_64(src, dst);
a78b0504
BS
482 break;
483 case CC_OP_NZ:
443aaeb8 484 r = cc_calc_nz(dst);
a78b0504
BS
485 break;
486 case CC_OP_ADD_64:
443aaeb8 487 r = cc_calc_add_64(src, dst, vr);
a78b0504
BS
488 break;
489 case CC_OP_ADDU_64:
443aaeb8 490 r = cc_calc_addu_64(src, dst, vr);
a78b0504 491 break;
4e4bb438 492 case CC_OP_ADDC_64:
443aaeb8 493 r = cc_calc_addc_64(src, dst, vr);
4e4bb438 494 break;
a78b0504 495 case CC_OP_SUB_64:
443aaeb8 496 r = cc_calc_sub_64(src, dst, vr);
a78b0504
BS
497 break;
498 case CC_OP_SUBU_64:
443aaeb8 499 r = cc_calc_subu_64(src, dst, vr);
a78b0504 500 break;
4e4bb438 501 case CC_OP_SUBB_64:
443aaeb8 502 r = cc_calc_subb_64(src, dst, vr);
4e4bb438 503 break;
a78b0504 504 case CC_OP_ABS_64:
443aaeb8 505 r = cc_calc_abs_64(dst);
a78b0504
BS
506 break;
507 case CC_OP_NABS_64:
443aaeb8 508 r = cc_calc_nabs_64(dst);
a78b0504
BS
509 break;
510 case CC_OP_COMP_64:
443aaeb8 511 r = cc_calc_comp_64(dst);
a78b0504 512 break;
b1feeb87
DH
513 case CC_OP_MULS_64:
514 r = cc_calc_muls_64(src, dst);
515 break;
a78b0504
BS
516
517 case CC_OP_ADD_32:
443aaeb8 518 r = cc_calc_add_32(src, dst, vr);
a78b0504
BS
519 break;
520 case CC_OP_ADDU_32:
443aaeb8 521 r = cc_calc_addu_32(src, dst, vr);
a78b0504 522 break;
4e4bb438 523 case CC_OP_ADDC_32:
443aaeb8 524 r = cc_calc_addc_32(src, dst, vr);
4e4bb438 525 break;
a78b0504 526 case CC_OP_SUB_32:
443aaeb8 527 r = cc_calc_sub_32(src, dst, vr);
a78b0504
BS
528 break;
529 case CC_OP_SUBU_32:
443aaeb8 530 r = cc_calc_subu_32(src, dst, vr);
a78b0504 531 break;
4e4bb438 532 case CC_OP_SUBB_32:
443aaeb8 533 r = cc_calc_subb_32(src, dst, vr);
4e4bb438 534 break;
a78b0504 535 case CC_OP_ABS_32:
443aaeb8 536 r = cc_calc_abs_32(dst);
a78b0504
BS
537 break;
538 case CC_OP_NABS_32:
443aaeb8 539 r = cc_calc_nabs_32(dst);
a78b0504
BS
540 break;
541 case CC_OP_COMP_32:
443aaeb8 542 r = cc_calc_comp_32(dst);
a78b0504 543 break;
b1feeb87
DH
544 case CC_OP_MULS_32:
545 r = cc_calc_muls_32(dst);
546 break;
a78b0504
BS
547
548 case CC_OP_ICM:
58a9e35b 549 r = cc_calc_icm(src, dst);
a78b0504 550 break;
cbe24bfa
RH
551 case CC_OP_SLA_32:
552 r = cc_calc_sla_32(src, dst);
553 break;
554 case CC_OP_SLA_64:
555 r = cc_calc_sla_64(src, dst);
a78b0504 556 break;
102bf2c6
RH
557 case CC_OP_FLOGR:
558 r = cc_calc_flogr(dst);
559 break;
6d930332
DH
560 case CC_OP_LCBB:
561 r = cc_calc_lcbb(dst);
562 break;
ff825c6d
DH
563 case CC_OP_VC:
564 r = cc_calc_vc(src, dst);
565 break;
a78b0504 566
a78b0504
BS
567 case CC_OP_NZ_F32:
568 r = set_cc_nz_f32(dst);
569 break;
570 case CC_OP_NZ_F64:
571 r = set_cc_nz_f64(dst);
572 break;
587626f8
RH
573 case CC_OP_NZ_F128:
574 r = set_cc_nz_f128(make_float128(src, dst));
575 break;
a78b0504
BS
576
577 default:
dc79e928 578 cpu_abort(env_cpu(env), "Unknown CC operation: %s\n", cc_name(cc_op));
a78b0504
BS
579 }
580
581 HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
582 cc_name(cc_op), src, dst, vr, r);
583 return r;
584}
585
586uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
587 uint64_t vr)
588{
589 return do_calc_cc(env, cc_op, src, dst, vr);
590}
591
932385a3
BS
592uint32_t HELPER(calc_cc)(CPUS390XState *env, uint32_t cc_op, uint64_t src,
593 uint64_t dst, uint64_t vr)
a78b0504
BS
594{
595 return do_calc_cc(env, cc_op, src, dst, vr);
596}
597
a78b0504 598#ifndef CONFIG_USER_ONLY
932385a3 599void HELPER(load_psw)(CPUS390XState *env, uint64_t mask, uint64_t addr)
a78b0504
BS
600{
601 load_psw(env, mask, addr);
dc79e928 602 cpu_loop_exit(env_cpu(env));
a78b0504
BS
603}
604
932385a3 605void HELPER(sacf)(CPUS390XState *env, uint64_t a1)
a78b0504
BS
606{
607 HELPER_LOG("%s: %16" PRIx64 "\n", __func__, a1);
608
609 switch (a1 & 0xf00) {
610 case 0x000:
611 env->psw.mask &= ~PSW_MASK_ASC;
612 env->psw.mask |= PSW_ASC_PRIMARY;
613 break;
614 case 0x100:
615 env->psw.mask &= ~PSW_MASK_ASC;
616 env->psw.mask |= PSW_ASC_SECONDARY;
617 break;
618 case 0x300:
619 env->psw.mask &= ~PSW_MASK_ASC;
620 env->psw.mask |= PSW_ASC_HOME;
621 break;
622 default:
aafcf80e 623 HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1);
1e36aee6 624 tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC());
a78b0504
BS
625 }
626}
627#endif
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