]>
Commit | Line | Data |
---|---|---|
f91005e1 MA |
1 | #ifndef TARGET_CRIS_MMU_H |
2 | #define TARGET_CRIS_MMU_H | |
3 | ||
94cff60a TS |
4 | #define CRIS_MMU_ERR_EXEC 0 |
5 | #define CRIS_MMU_ERR_READ 1 | |
6 | #define CRIS_MMU_ERR_WRITE 2 | |
7 | #define CRIS_MMU_ERR_FLUSH 3 | |
8 | ||
2fa73ec8 | 9 | struct cris_mmu_result |
94cff60a | 10 | { |
7d37435b PB |
11 | uint32_t phy; |
12 | int prot; | |
13 | int bf_vec; | |
94cff60a TS |
14 | }; |
15 | ||
a1170bfd AF |
16 | void cris_mmu_init(CPUCRISState *env); |
17 | void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid); | |
2fa73ec8 | 18 | int cris_mmu_translate(struct cris_mmu_result *res, |
7d37435b PB |
19 | CPUCRISState *env, uint32_t vaddr, |
20 | int rw, int mmu_idx, int debug); | |
f91005e1 MA |
21 | |
22 | #endif |