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3ead03bd AZ |
1 | /* |
2 | * Bit-Bang i2c emulation extracted from | |
3 | * Marvell MV88W8618 / Freecom MusicPal emulation. | |
4 | * | |
5 | * Copyright (c) 2008 Jan Kiszka | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GNU GPL v2. |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
3ead03bd AZ |
11 | */ |
12 | #include "hw.h" | |
3cd035d8 | 13 | #include "bitbang_i2c.h" |
3ead03bd AZ |
14 | #include "sysbus.h" |
15 | ||
3cd035d8 PB |
16 | //#define DEBUG_BITBANG_I2C |
17 | ||
18 | #ifdef DEBUG_BITBANG_I2C | |
19 | #define DPRINTF(fmt, ...) \ | |
20 | do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) | |
21 | #else | |
22 | #define DPRINTF(fmt, ...) do {} while(0) | |
23 | #endif | |
24 | ||
3ead03bd AZ |
25 | typedef enum bitbang_i2c_state { |
26 | STOPPED = 0, | |
3ead03bd AZ |
27 | SENDING_BIT7, |
28 | SENDING_BIT6, | |
29 | SENDING_BIT5, | |
30 | SENDING_BIT4, | |
31 | SENDING_BIT3, | |
32 | SENDING_BIT2, | |
33 | SENDING_BIT1, | |
34 | SENDING_BIT0, | |
35 | WAITING_FOR_ACK, | |
36 | RECEIVING_BIT7, | |
37 | RECEIVING_BIT6, | |
38 | RECEIVING_BIT5, | |
39 | RECEIVING_BIT4, | |
40 | RECEIVING_BIT3, | |
41 | RECEIVING_BIT2, | |
42 | RECEIVING_BIT1, | |
43 | RECEIVING_BIT0, | |
2eb9f241 MC |
44 | SENDING_ACK, |
45 | SENT_NACK | |
3ead03bd AZ |
46 | } bitbang_i2c_state; |
47 | ||
3cd035d8 | 48 | struct bitbang_i2c_interface { |
3ead03bd AZ |
49 | i2c_bus *bus; |
50 | bitbang_i2c_state state; | |
51 | int last_data; | |
52 | int last_clock; | |
3cd035d8 | 53 | int device_out; |
3ead03bd AZ |
54 | uint8_t buffer; |
55 | int current_addr; | |
3cd035d8 | 56 | }; |
3ead03bd AZ |
57 | |
58 | static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) | |
59 | { | |
3cd035d8 | 60 | DPRINTF("STOP\n"); |
3ead03bd AZ |
61 | if (i2c->current_addr >= 0) |
62 | i2c_end_transfer(i2c->bus); | |
63 | i2c->current_addr = -1; | |
64 | i2c->state = STOPPED; | |
65 | } | |
66 | ||
3cd035d8 PB |
67 | /* Set device data pin. */ |
68 | static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) | |
69 | { | |
70 | i2c->device_out = level; | |
71 | //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); | |
72 | return level & i2c->last_data; | |
73 | } | |
74 | ||
75 | /* Leave device data pin unodified. */ | |
76 | static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) | |
77 | { | |
78 | return bitbang_i2c_ret(i2c, i2c->device_out); | |
79 | } | |
80 | ||
81 | /* Returns data line level. */ | |
82 | int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) | |
3ead03bd | 83 | { |
3ead03bd | 84 | int data; |
3ead03bd | 85 | |
3cd035d8 PB |
86 | if (level != 0 && level != 1) { |
87 | abort(); | |
88 | } | |
3ead03bd | 89 | |
3cd035d8 PB |
90 | if (line == BITBANG_I2C_SDA) { |
91 | if (level == i2c->last_data) { | |
92 | return bitbang_i2c_nop(i2c); | |
93 | } | |
94 | i2c->last_data = level; | |
95 | if (i2c->last_clock == 0) { | |
96 | return bitbang_i2c_nop(i2c); | |
97 | } | |
98 | if (level == 0) { | |
99 | DPRINTF("START\n"); | |
100 | /* START condition. */ | |
3ead03bd | 101 | i2c->state = SENDING_BIT7; |
3cd035d8 PB |
102 | i2c->current_addr = -1; |
103 | } else { | |
104 | /* STOP condition. */ | |
3ead03bd | 105 | bitbang_i2c_enter_stop(i2c); |
3cd035d8 PB |
106 | } |
107 | return bitbang_i2c_ret(i2c, 1); | |
108 | } | |
109 | ||
110 | data = i2c->last_data; | |
111 | if (i2c->last_clock == level) { | |
112 | return bitbang_i2c_nop(i2c); | |
113 | } | |
114 | i2c->last_clock = level; | |
115 | if (level == 0) { | |
116 | /* State is set/read at the start of the clock pulse. | |
117 | release the data line at the end. */ | |
118 | return bitbang_i2c_ret(i2c, 1); | |
119 | } | |
120 | switch (i2c->state) { | |
121 | case STOPPED: | |
2eb9f241 | 122 | case SENT_NACK: |
3cd035d8 | 123 | return bitbang_i2c_ret(i2c, 1); |
3ead03bd AZ |
124 | |
125 | case SENDING_BIT7 ... SENDING_BIT0: | |
3cd035d8 PB |
126 | i2c->buffer = (i2c->buffer << 1) | data; |
127 | /* will end up in WAITING_FOR_ACK */ | |
128 | i2c->state++; | |
129 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd AZ |
130 | |
131 | case WAITING_FOR_ACK: | |
3cd035d8 PB |
132 | if (i2c->current_addr < 0) { |
133 | i2c->current_addr = i2c->buffer; | |
134 | DPRINTF("Address 0x%02x\n", i2c->current_addr); | |
135 | i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, | |
136 | i2c->current_addr & 1); | |
137 | } else { | |
138 | DPRINTF("Sent 0x%02x\n", i2c->buffer); | |
139 | i2c_send(i2c->bus, i2c->buffer); | |
140 | } | |
141 | if (i2c->current_addr & 1) { | |
142 | i2c->state = RECEIVING_BIT7; | |
143 | } else { | |
144 | i2c->state = SENDING_BIT7; | |
145 | } | |
146 | return bitbang_i2c_ret(i2c, 0); | |
147 | ||
148 | case RECEIVING_BIT7: | |
149 | i2c->buffer = i2c_recv(i2c->bus); | |
150 | DPRINTF("RX byte 0x%02x\n", i2c->buffer); | |
151 | /* Fall through... */ | |
152 | case RECEIVING_BIT6 ... RECEIVING_BIT0: | |
153 | data = i2c->buffer >> 7; | |
154 | /* will end up in SENDING_ACK */ | |
155 | i2c->state++; | |
156 | i2c->buffer <<= 1; | |
157 | return bitbang_i2c_ret(i2c, data); | |
3ead03bd AZ |
158 | |
159 | case SENDING_ACK: | |
3cd035d8 PB |
160 | i2c->state = RECEIVING_BIT7; |
161 | if (data != 0) { | |
162 | DPRINTF("NACKED\n"); | |
2eb9f241 | 163 | i2c->state = SENT_NACK; |
3cd035d8 PB |
164 | i2c_nack(i2c->bus); |
165 | } else { | |
166 | DPRINTF("ACKED\n"); | |
167 | } | |
168 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd | 169 | } |
3cd035d8 PB |
170 | abort(); |
171 | } | |
172 | ||
173 | bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus) | |
174 | { | |
175 | bitbang_i2c_interface *s; | |
176 | ||
7267c094 | 177 | s = g_malloc0(sizeof(bitbang_i2c_interface)); |
3cd035d8 PB |
178 | |
179 | s->bus = bus; | |
180 | s->last_data = 1; | |
181 | s->last_clock = 1; | |
182 | s->device_out = 1; | |
183 | ||
184 | return s; | |
185 | } | |
3ead03bd | 186 | |
3cd035d8 PB |
187 | /* GPIO interface. */ |
188 | typedef struct { | |
189 | SysBusDevice busdev; | |
cffac71b | 190 | MemoryRegion dummy_iomem; |
3cd035d8 PB |
191 | bitbang_i2c_interface *bitbang; |
192 | int last_level; | |
193 | qemu_irq out; | |
194 | } GPIOI2CState; | |
195 | ||
196 | static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) | |
197 | { | |
198 | GPIOI2CState *s = opaque; | |
199 | ||
200 | level = bitbang_i2c_set(s->bitbang, irq, level); | |
201 | if (level != s->last_level) { | |
202 | s->last_level = level; | |
203 | qemu_set_irq(s->out, level); | |
204 | } | |
3ead03bd AZ |
205 | } |
206 | ||
3cd035d8 | 207 | static int gpio_i2c_init(SysBusDevice *dev) |
3ead03bd | 208 | { |
3cd035d8 | 209 | GPIOI2CState *s = FROM_SYSBUS(GPIOI2CState, dev); |
3ead03bd AZ |
210 | i2c_bus *bus; |
211 | ||
cffac71b | 212 | memory_region_init(&s->dummy_iomem, "gpio_i2c", 0); |
750ecd44 | 213 | sysbus_init_mmio(dev, &s->dummy_iomem); |
3ead03bd AZ |
214 | |
215 | bus = i2c_init_bus(&dev->qdev, "i2c"); | |
3cd035d8 | 216 | s->bitbang = bitbang_i2c_init(bus); |
3ead03bd AZ |
217 | |
218 | qdev_init_gpio_in(&dev->qdev, bitbang_i2c_gpio_set, 2); | |
219 | qdev_init_gpio_out(&dev->qdev, &s->out, 1); | |
81a322d4 GH |
220 | |
221 | return 0; | |
3ead03bd AZ |
222 | } |
223 | ||
999e12bb AL |
224 | static void gpio_i2c_class_init(ObjectClass *klass, void *data) |
225 | { | |
39bffca2 | 226 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb AL |
227 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
228 | ||
229 | k->init = gpio_i2c_init; | |
39bffca2 | 230 | dc->desc = "Virtual GPIO to I2C bridge"; |
999e12bb AL |
231 | } |
232 | ||
39bffca2 AL |
233 | static TypeInfo gpio_i2c_info = { |
234 | .name = "gpio_i2c", | |
235 | .parent = TYPE_SYS_BUS_DEVICE, | |
236 | .instance_size = sizeof(GPIOI2CState), | |
237 | .class_init = gpio_i2c_class_init, | |
3cd035d8 PB |
238 | }; |
239 | ||
3ead03bd AZ |
240 | static void bitbang_i2c_register(void) |
241 | { | |
39bffca2 | 242 | type_register_static(&gpio_i2c_info); |
3ead03bd AZ |
243 | } |
244 | ||
245 | device_init(bitbang_i2c_register) |