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9fdf0c29 DG |
1 | #if !defined(__HW_SPAPR_H__) |
2 | #define __HW_SPAPR_H__ | |
3 | ||
4040ab72 DG |
4 | struct VIOsPAPRBus; |
5 | ||
9fdf0c29 | 6 | typedef struct sPAPREnvironment { |
4040ab72 | 7 | struct VIOsPAPRBus *vio_bus; |
9fdf0c29 DG |
8 | } sPAPREnvironment; |
9 | ||
10 | #define H_SUCCESS 0 | |
11 | #define H_BUSY 1 /* Hardware busy -- retry later */ | |
12 | #define H_CLOSED 2 /* Resource closed */ | |
13 | #define H_NOT_AVAILABLE 3 | |
14 | #define H_CONSTRAINED 4 /* Resource request constrained to max allowed */ | |
15 | #define H_PARTIAL 5 | |
16 | #define H_IN_PROGRESS 14 /* Kind of like busy */ | |
17 | #define H_PAGE_REGISTERED 15 | |
18 | #define H_PARTIAL_STORE 16 | |
19 | #define H_PENDING 17 /* returned from H_POLL_PENDING */ | |
20 | #define H_CONTINUE 18 /* Returned from H_Join on success */ | |
21 | #define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */ | |
22 | #define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \ | |
23 | is a good time to retry */ | |
24 | #define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \ | |
25 | is a good time to retry */ | |
26 | #define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \ | |
27 | is a good time to retry */ | |
28 | #define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \ | |
29 | is a good time to retry */ | |
30 | #define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \ | |
31 | is a good time to retry */ | |
32 | #define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \ | |
33 | is a good time to retry */ | |
34 | #define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */ | |
35 | #define H_HARDWARE -1 /* Hardware error */ | |
36 | #define H_FUNCTION -2 /* Function not supported */ | |
37 | #define H_PRIVILEGE -3 /* Caller not privileged */ | |
38 | #define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */ | |
39 | #define H_BAD_MODE -5 /* Illegal msr value */ | |
40 | #define H_PTEG_FULL -6 /* PTEG is full */ | |
41 | #define H_NOT_FOUND -7 /* PTE was not found" */ | |
42 | #define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */ | |
43 | #define H_NO_MEM -9 | |
44 | #define H_AUTHORITY -10 | |
45 | #define H_PERMISSION -11 | |
46 | #define H_DROPPED -12 | |
47 | #define H_SOURCE_PARM -13 | |
48 | #define H_DEST_PARM -14 | |
49 | #define H_REMOTE_PARM -15 | |
50 | #define H_RESOURCE -16 | |
51 | #define H_ADAPTER_PARM -17 | |
52 | #define H_RH_PARM -18 | |
53 | #define H_RCQ_PARM -19 | |
54 | #define H_SCQ_PARM -20 | |
55 | #define H_EQ_PARM -21 | |
56 | #define H_RT_PARM -22 | |
57 | #define H_ST_PARM -23 | |
58 | #define H_SIGT_PARM -24 | |
59 | #define H_TOKEN_PARM -25 | |
60 | #define H_MLENGTH_PARM -27 | |
61 | #define H_MEM_PARM -28 | |
62 | #define H_MEM_ACCESS_PARM -29 | |
63 | #define H_ATTR_PARM -30 | |
64 | #define H_PORT_PARM -31 | |
65 | #define H_MCG_PARM -32 | |
66 | #define H_VL_PARM -33 | |
67 | #define H_TSIZE_PARM -34 | |
68 | #define H_TRACE_PARM -35 | |
69 | ||
70 | #define H_MASK_PARM -37 | |
71 | #define H_MCG_FULL -38 | |
72 | #define H_ALIAS_EXIST -39 | |
73 | #define H_P_COUNTER -40 | |
74 | #define H_TABLE_FULL -41 | |
75 | #define H_ALT_TABLE -42 | |
76 | #define H_MR_CONDITION -43 | |
77 | #define H_NOT_ENOUGH_RESOURCES -44 | |
78 | #define H_R_STATE -45 | |
79 | #define H_RESCINDEND -46 | |
80 | #define H_MULTI_THREADS_ACTIVE -9005 | |
81 | ||
82 | ||
83 | /* Long Busy is a condition that can be returned by the firmware | |
84 | * when a call cannot be completed now, but the identical call | |
85 | * should be retried later. This prevents calls blocking in the | |
86 | * firmware for long periods of time. Annoyingly the firmware can return | |
87 | * a range of return codes, hinting at how long we should wait before | |
88 | * retrying. If you don't care for the hint, the macro below is a good | |
89 | * way to check for the long_busy return codes | |
90 | */ | |
91 | #define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \ | |
92 | && (x <= H_LONG_BUSY_END_RANGE)) | |
93 | ||
94 | /* Flags */ | |
95 | #define H_LARGE_PAGE (1ULL<<(63-16)) | |
96 | #define H_EXACT (1ULL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ | |
97 | #define H_R_XLATE (1ULL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ | |
98 | #define H_READ_4 (1ULL<<(63-26)) /* Return 4 PTEs */ | |
99 | #define H_PAGE_STATE_CHANGE (1ULL<<(63-28)) | |
100 | #define H_PAGE_UNUSED ((1ULL<<(63-29)) | (1ULL<<(63-30))) | |
101 | #define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED) | |
102 | #define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1ULL<<(63-31))) | |
103 | #define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE | |
104 | #define H_AVPN (1ULL<<(63-32)) /* An avpn is provided as a sanity test */ | |
105 | #define H_ANDCOND (1ULL<<(63-33)) | |
106 | #define H_ICACHE_INVALIDATE (1ULL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ | |
107 | #define H_ICACHE_SYNCHRONIZE (1ULL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */ | |
108 | #define H_ZERO_PAGE (1ULL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */ | |
109 | #define H_COPY_PAGE (1ULL<<(63-49)) | |
110 | #define H_N (1ULL<<(63-61)) | |
111 | #define H_PP1 (1ULL<<(63-62)) | |
112 | #define H_PP2 (1ULL<<(63-63)) | |
113 | ||
114 | /* VASI States */ | |
115 | #define H_VASI_INVALID 0 | |
116 | #define H_VASI_ENABLED 1 | |
117 | #define H_VASI_ABORTED 2 | |
118 | #define H_VASI_SUSPENDING 3 | |
119 | #define H_VASI_SUSPENDED 4 | |
120 | #define H_VASI_RESUMED 5 | |
121 | #define H_VASI_COMPLETED 6 | |
122 | ||
123 | /* DABRX flags */ | |
124 | #define H_DABRX_HYPERVISOR (1ULL<<(63-61)) | |
125 | #define H_DABRX_KERNEL (1ULL<<(63-62)) | |
126 | #define H_DABRX_USER (1ULL<<(63-63)) | |
127 | ||
128 | /* Each control block has to be on a 4K bondary */ | |
129 | #define H_CB_ALIGNMENT 4096 | |
130 | ||
131 | /* pSeries hypervisor opcodes */ | |
132 | #define H_REMOVE 0x04 | |
133 | #define H_ENTER 0x08 | |
134 | #define H_READ 0x0c | |
135 | #define H_CLEAR_MOD 0x10 | |
136 | #define H_CLEAR_REF 0x14 | |
137 | #define H_PROTECT 0x18 | |
138 | #define H_GET_TCE 0x1c | |
139 | #define H_PUT_TCE 0x20 | |
140 | #define H_SET_SPRG0 0x24 | |
141 | #define H_SET_DABR 0x28 | |
142 | #define H_PAGE_INIT 0x2c | |
143 | #define H_SET_ASR 0x30 | |
144 | #define H_ASR_ON 0x34 | |
145 | #define H_ASR_OFF 0x38 | |
146 | #define H_LOGICAL_CI_LOAD 0x3c | |
147 | #define H_LOGICAL_CI_STORE 0x40 | |
148 | #define H_LOGICAL_CACHE_LOAD 0x44 | |
149 | #define H_LOGICAL_CACHE_STORE 0x48 | |
150 | #define H_LOGICAL_ICBI 0x4c | |
151 | #define H_LOGICAL_DCBF 0x50 | |
152 | #define H_GET_TERM_CHAR 0x54 | |
153 | #define H_PUT_TERM_CHAR 0x58 | |
154 | #define H_REAL_TO_LOGICAL 0x5c | |
155 | #define H_HYPERVISOR_DATA 0x60 | |
156 | #define H_EOI 0x64 | |
157 | #define H_CPPR 0x68 | |
158 | #define H_IPI 0x6c | |
159 | #define H_IPOLL 0x70 | |
160 | #define H_XIRR 0x74 | |
161 | #define H_PERFMON 0x7c | |
162 | #define H_MIGRATE_DMA 0x78 | |
163 | #define H_REGISTER_VPA 0xDC | |
164 | #define H_CEDE 0xE0 | |
165 | #define H_CONFER 0xE4 | |
166 | #define H_PROD 0xE8 | |
167 | #define H_GET_PPP 0xEC | |
168 | #define H_SET_PPP 0xF0 | |
169 | #define H_PURR 0xF4 | |
170 | #define H_PIC 0xF8 | |
171 | #define H_REG_CRQ 0xFC | |
172 | #define H_FREE_CRQ 0x100 | |
173 | #define H_VIO_SIGNAL 0x104 | |
174 | #define H_SEND_CRQ 0x108 | |
175 | #define H_COPY_RDMA 0x110 | |
176 | #define H_REGISTER_LOGICAL_LAN 0x114 | |
177 | #define H_FREE_LOGICAL_LAN 0x118 | |
178 | #define H_ADD_LOGICAL_LAN_BUFFER 0x11C | |
179 | #define H_SEND_LOGICAL_LAN 0x120 | |
180 | #define H_BULK_REMOVE 0x124 | |
181 | #define H_MULTICAST_CTRL 0x130 | |
182 | #define H_SET_XDABR 0x134 | |
183 | #define H_STUFF_TCE 0x138 | |
184 | #define H_PUT_TCE_INDIRECT 0x13C | |
185 | #define H_CHANGE_LOGICAL_LAN_MAC 0x14C | |
186 | #define H_VTERM_PARTNER_INFO 0x150 | |
187 | #define H_REGISTER_VTERM 0x154 | |
188 | #define H_FREE_VTERM 0x158 | |
189 | #define H_RESET_EVENTS 0x15C | |
190 | #define H_ALLOC_RESOURCE 0x160 | |
191 | #define H_FREE_RESOURCE 0x164 | |
192 | #define H_MODIFY_QP 0x168 | |
193 | #define H_QUERY_QP 0x16C | |
194 | #define H_REREGISTER_PMR 0x170 | |
195 | #define H_REGISTER_SMR 0x174 | |
196 | #define H_QUERY_MR 0x178 | |
197 | #define H_QUERY_MW 0x17C | |
198 | #define H_QUERY_HCA 0x180 | |
199 | #define H_QUERY_PORT 0x184 | |
200 | #define H_MODIFY_PORT 0x188 | |
201 | #define H_DEFINE_AQP1 0x18C | |
202 | #define H_GET_TRACE_BUFFER 0x190 | |
203 | #define H_DEFINE_AQP0 0x194 | |
204 | #define H_RESIZE_MR 0x198 | |
205 | #define H_ATTACH_MCQP 0x19C | |
206 | #define H_DETACH_MCQP 0x1A0 | |
207 | #define H_CREATE_RPT 0x1A4 | |
208 | #define H_REMOVE_RPT 0x1A8 | |
209 | #define H_REGISTER_RPAGES 0x1AC | |
210 | #define H_DISABLE_AND_GETC 0x1B0 | |
211 | #define H_ERROR_DATA 0x1B4 | |
212 | #define H_GET_HCA_INFO 0x1B8 | |
213 | #define H_GET_PERF_COUNT 0x1BC | |
214 | #define H_MANAGE_TRACE 0x1C0 | |
215 | #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 | |
216 | #define H_QUERY_INT_STATE 0x1E4 | |
217 | #define H_POLL_PENDING 0x1D8 | |
218 | #define H_ILLAN_ATTRIBUTES 0x244 | |
219 | #define H_MODIFY_HEA_QP 0x250 | |
220 | #define H_QUERY_HEA_QP 0x254 | |
221 | #define H_QUERY_HEA 0x258 | |
222 | #define H_QUERY_HEA_PORT 0x25C | |
223 | #define H_MODIFY_HEA_PORT 0x260 | |
224 | #define H_REG_BCMC 0x264 | |
225 | #define H_DEREG_BCMC 0x268 | |
226 | #define H_REGISTER_HEA_RPAGES 0x26C | |
227 | #define H_DISABLE_AND_GET_HEA 0x270 | |
228 | #define H_GET_HEA_INFO 0x274 | |
229 | #define H_ALLOC_HEA_RESOURCE 0x278 | |
230 | #define H_ADD_CONN 0x284 | |
231 | #define H_DEL_CONN 0x288 | |
232 | #define H_JOIN 0x298 | |
233 | #define H_VASI_STATE 0x2A4 | |
234 | #define H_ENABLE_CRQ 0x2B0 | |
235 | #define H_GET_EM_PARMS 0x2B8 | |
236 | #define H_SET_MPP 0x2D0 | |
237 | #define H_GET_MPP 0x2D4 | |
238 | #define MAX_HCALL_OPCODE H_GET_MPP | |
239 | ||
39ac8455 DG |
240 | /* The hcalls above are standardized in PAPR and implemented by pHyp |
241 | * as well. | |
242 | * | |
243 | * We also need some hcalls which are specific to qemu / KVM-on-POWER. | |
244 | * So far we just need one for H_RTAS, but in future we'll need more | |
245 | * for extensions like virtio. We put those into the 0xf000-0xfffc | |
246 | * range which is reserved by PAPR for "platform-specific" hcalls. | |
247 | */ | |
248 | #define KVMPPC_HCALL_BASE 0xf000 | |
249 | #define KVMPPC_H_RTAS (KVMPPC_HCALL_BASE + 0x0) | |
250 | #define KVMPPC_HCALL_MAX KVMPPC_H_RTAS | |
251 | ||
9fdf0c29 DG |
252 | extern sPAPREnvironment *spapr; |
253 | ||
254 | /*#define DEBUG_SPAPR_HCALLS*/ | |
255 | ||
256 | #ifdef DEBUG_SPAPR_HCALLS | |
257 | #define hcall_dprintf(fmt, ...) \ | |
258 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) | |
259 | #else | |
260 | #define hcall_dprintf(fmt, ...) \ | |
261 | do { } while (0) | |
262 | #endif | |
263 | ||
264 | typedef target_ulong (*spapr_hcall_fn)(CPUState *env, sPAPREnvironment *spapr, | |
265 | target_ulong opcode, | |
266 | target_ulong *args); | |
267 | ||
268 | void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn); | |
269 | target_ulong spapr_hypercall(CPUState *env, target_ulong opcode, | |
270 | target_ulong *args); | |
271 | ||
39ac8455 DG |
272 | static inline uint32_t rtas_ld(target_ulong phys, int n) |
273 | { | |
274 | return ldl_phys(phys + 4*n); | |
275 | } | |
276 | ||
277 | static inline void rtas_st(target_ulong phys, int n, uint32_t val) | |
278 | { | |
279 | stl_phys(phys + 4*n, val); | |
280 | } | |
281 | ||
282 | typedef void (*spapr_rtas_fn)(sPAPREnvironment *spapr, uint32_t token, | |
283 | uint32_t nargs, target_ulong args, | |
284 | uint32_t nret, target_ulong rets); | |
285 | void spapr_rtas_register(const char *name, spapr_rtas_fn fn); | |
286 | target_ulong spapr_rtas_call(sPAPREnvironment *spapr, | |
287 | uint32_t token, uint32_t nargs, target_ulong args, | |
288 | uint32_t nret, target_ulong rets); | |
289 | int spapr_rtas_device_tree_setup(void *fdt, target_phys_addr_t rtas_addr, | |
290 | target_phys_addr_t rtas_size); | |
291 | ||
9fdf0c29 | 292 | #endif /* !defined (__HW_SPAPR_H__) */ |