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0ff596d0 PB |
1 | #ifndef QEMU_I2C_H |
2 | #define QEMU_I2C_H | |
3 | ||
83c9f4ca | 4 | #include "hw/qdev.h" |
fe8de492 | 5 | |
0ff596d0 PB |
6 | /* The QEMU I2C implementation only supports simple transfers that complete |
7 | immediately. It does not support slave devices that need to be able to | |
8 | defer their response (eg. CPU slave interfaces where the data is supplied | |
9 | by the device driver in response to an interrupt). */ | |
10 | ||
11 | enum i2c_event { | |
12 | I2C_START_RECV, | |
13 | I2C_START_SEND, | |
14 | I2C_FINISH, | |
aa1f17c1 | 15 | I2C_NACK /* Masker NACKed a receive byte. */ |
0ff596d0 PB |
16 | }; |
17 | ||
9e07bdf8 AL |
18 | typedef struct I2CSlave I2CSlave; |
19 | ||
b5ea9327 AL |
20 | #define TYPE_I2C_SLAVE "i2c-slave" |
21 | #define I2C_SLAVE(obj) \ | |
22 | OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE) | |
23 | #define I2C_SLAVE_CLASS(klass) \ | |
24 | OBJECT_CLASS_CHECK(I2CSlaveClass, (klass), TYPE_I2C_SLAVE) | |
25 | #define I2C_SLAVE_GET_CLASS(obj) \ | |
26 | OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE) | |
0ff596d0 | 27 | |
373b8ac7 | 28 | typedef struct I2CSlaveClass { |
b5ea9327 | 29 | DeviceClass parent_class; |
02e2da45 | 30 | |
d307c28c | 31 | /* Master to slave. Returns non-zero for a NAK, 0 for success. */ |
b5ea9327 AL |
32 | int (*send)(I2CSlave *s, uint8_t data); |
33 | ||
d307c28c CM |
34 | /* |
35 | * Slave to master. This cannot fail, the device should always | |
36 | * return something here. Negative values probably result in 0xff | |
37 | * and a possible log from the driver, and shouldn't be used. | |
38 | */ | |
b5ea9327 AL |
39 | int (*recv)(I2CSlave *s); |
40 | ||
d307c28c CM |
41 | /* |
42 | * Notify the slave of a bus state change. For start event, | |
43 | * returns non-zero to NAK an operation. For other events the | |
44 | * return code is not used and should be zero. | |
45 | */ | |
46 | int (*event)(I2CSlave *s, enum i2c_event event); | |
b5ea9327 | 47 | } I2CSlaveClass; |
fe8de492 | 48 | |
373b8ac7 | 49 | struct I2CSlave { |
fe8de492 | 50 | DeviceState qdev; |
0ff596d0 PB |
51 | |
52 | /* Remaining fields for internal use by the I2C code. */ | |
5b7f5327 | 53 | uint8_t address; |
0ff596d0 PB |
54 | }; |
55 | ||
aa88d7ad CM |
56 | #define TYPE_I2C_BUS "i2c-bus" |
57 | #define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS) | |
58 | ||
59 | typedef struct I2CNode I2CNode; | |
60 | ||
61 | struct I2CNode { | |
62 | I2CSlave *elt; | |
63 | QLIST_ENTRY(I2CNode) next; | |
64 | }; | |
65 | ||
66 | struct I2CBus { | |
67 | BusState qbus; | |
68 | QLIST_HEAD(, I2CNode) current_devs; | |
69 | uint8_t saved_address; | |
70 | bool broadcast; | |
71 | }; | |
72 | ||
a5c82852 | 73 | I2CBus *i2c_init_bus(DeviceState *parent, const char *name); |
9e07bdf8 | 74 | void i2c_set_slave_address(I2CSlave *dev, uint8_t address); |
a5c82852 AF |
75 | int i2c_bus_busy(I2CBus *bus); |
76 | int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv); | |
77 | void i2c_end_transfer(I2CBus *bus); | |
78 | void i2c_nack(I2CBus *bus); | |
056fca7b | 79 | int i2c_send_recv(I2CBus *bus, uint8_t *data, bool send); |
a5c82852 AF |
80 | int i2c_send(I2CBus *bus, uint8_t data); |
81 | int i2c_recv(I2CBus *bus); | |
0ff596d0 | 82 | |
a5c82852 | 83 | DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr); |
fe8de492 | 84 | |
1d4e547b | 85 | /* lm832x.c */ |
c4f05c8c | 86 | void lm832x_key_event(DeviceState *dev, int key, int state); |
1d4e547b | 87 | |
701a8f76 PB |
88 | extern const VMStateDescription vmstate_i2c_slave; |
89 | ||
90 | #define VMSTATE_I2C_SLAVE(_field, _state) { \ | |
91 | .name = (stringify(_field)), \ | |
9e07bdf8 | 92 | .size = sizeof(I2CSlave), \ |
701a8f76 PB |
93 | .vmsd = &vmstate_i2c_slave, \ |
94 | .flags = VMS_STRUCT, \ | |
9e07bdf8 | 95 | .offset = vmstate_offset_value(_state, _field, I2CSlave), \ |
701a8f76 PB |
96 | } |
97 | ||
0ff596d0 | 98 | #endif |