[qemu.git] / target-i386 / arch_dump.c

/*
 * i386 memory mapping
 *
 * Copyright Fujitsu, Corp. 2011, 2012
 *
 * Authors:
 *     Wen Congyang <[email protected]>
 *
 * This work is licensed under the terms of the GNU GPL, version 2 or later.
 * See the COPYING file in the top-level directory.
 *
 */

#include "cpu.h"
#include "exec/cpu-all.h"
#include "sysemu/dump.h"
#include "elf.h"

#ifdef TARGET_X86_64
typedef struct {
    target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10;
    target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax;
    target_ulong rip, cs, eflags;
    target_ulong rsp, ss;
    target_ulong fs_base, gs_base;
    target_ulong ds, es, fs, gs;
} x86_64_user_regs_struct;

typedef struct {
    char pad1[32];
    uint32_t pid;
    char pad2[76];
    x86_64_user_regs_struct regs;
    char pad3[8];
} x86_64_elf_prstatus;

static int x86_64_write_elf64_note(WriteCoreDumpFunction f,
                                   CPUX86State *env, int id,
                                   void *opaque)
{
    x86_64_user_regs_struct regs;
    Elf64_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    regs.r15 = env->regs[15];
    regs.r14 = env->regs[14];
    regs.r13 = env->regs[13];
    regs.r12 = env->regs[12];
    regs.r11 = env->regs[11];
    regs.r10 = env->regs[10];
    regs.r9  = env->regs[9];
    regs.r8  = env->regs[8];
    regs.rbp = env->regs[R_EBP];
    regs.rsp = env->regs[R_ESP];
    regs.rdi = env->regs[R_EDI];
    regs.rsi = env->regs[R_ESI];
    regs.rdx = env->regs[R_EDX];
    regs.rcx = env->regs[R_ECX];
    regs.rbx = env->regs[R_EBX];
    regs.rax = env->regs[R_EAX];
    regs.rip = env->eip;
    regs.eflags = env->eflags;

    regs.orig_rax = 0; /* FIXME */
    regs.cs = env->segs[R_CS].selector;
    regs.ss = env->segs[R_SS].selector;
    regs.fs_base = env->segs[R_FS].base;
    regs.gs_base = env->segs[R_GS].base;
    regs.ds = env->segs[R_DS].selector;
    regs.es = env->segs[R_ES].selector;
    regs.fs = env->segs[R_FS].selector;
    regs.gs = env->segs[R_GS].selector;

    descsz = sizeof(x86_64_elf_prstatus);
    note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc(note_size);

    memset(note, 0, note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf + 32, &id, 4); /* pr_pid */
    buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong);
    memcpy(buf, &regs, sizeof(x86_64_user_regs_struct));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}
#endif

typedef struct {
    uint32_t ebx, ecx, edx, esi, edi, ebp, eax;
    unsigned short ds, __ds, es, __es;
    unsigned short fs, __fs, gs, __gs;
    uint32_t orig_eax, eip;
    unsigned short cs, __cs;
    uint32_t eflags, esp;
    unsigned short ss, __ss;
} x86_user_regs_struct;

typedef struct {
    char pad1[24];
    uint32_t pid;
    char pad2[44];
    x86_user_regs_struct regs;
    char pad3[4];
} x86_elf_prstatus;

static void x86_fill_elf_prstatus(x86_elf_prstatus *prstatus, CPUX86State *env,
                                  int id)
{
    memset(prstatus, 0, sizeof(x86_elf_prstatus));
    prstatus->regs.ebp = env->regs[R_EBP] & 0xffffffff;
    prstatus->regs.esp = env->regs[R_ESP] & 0xffffffff;
    prstatus->regs.edi = env->regs[R_EDI] & 0xffffffff;
    prstatus->regs.esi = env->regs[R_ESI] & 0xffffffff;
    prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff;
    prstatus->regs.ecx = env->regs[R_ECX] & 0xffffffff;
    prstatus->regs.ebx = env->regs[R_EBX] & 0xffffffff;
    prstatus->regs.eax = env->regs[R_EAX] & 0xffffffff;
    prstatus->regs.eip = env->eip & 0xffffffff;
    prstatus->regs.eflags = env->eflags & 0xffffffff;

    prstatus->regs.cs = env->segs[R_CS].selector;
    prstatus->regs.ss = env->segs[R_SS].selector;
    prstatus->regs.ds = env->segs[R_DS].selector;
    prstatus->regs.es = env->segs[R_ES].selector;
    prstatus->regs.fs = env->segs[R_FS].selector;
    prstatus->regs.gs = env->segs[R_GS].selector;

    prstatus->pid = id;
}

static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env,
                                int id, void *opaque)
{
    x86_elf_prstatus prstatus;
    Elf64_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    x86_fill_elf_prstatus(&prstatus, env, id);
    descsz = sizeof(x86_elf_prstatus);
    note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc(note_size);

    memset(note, 0, note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &prstatus, sizeof(prstatus));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
                             int cpuid, void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);
    int ret;
#ifdef TARGET_X86_64
    X86CPU *first_x86_cpu = X86_CPU(first_cpu);
    bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);

    if (lma) {
        ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque);
    } else {
#endif
        ret = x86_write_elf64_note(f, &cpu->env, cpuid, opaque);
#ifdef TARGET_X86_64
    }
#endif

    return ret;
}

int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
                             int cpuid, void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);
    x86_elf_prstatus prstatus;
    Elf32_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    x86_fill_elf_prstatus(&prstatus, &cpu->env, cpuid);
    descsz = sizeof(x86_elf_prstatus);
    note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc(note_size);

    memset(note, 0, note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &prstatus, sizeof(prstatus));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

/*
 * please count up QEMUCPUSTATE_VERSION if you have changed definition of
 * QEMUCPUState, and modify the tools using this information accordingly.
 */
#define QEMUCPUSTATE_VERSION (1)

struct QEMUCPUSegment {
    uint32_t selector;
    uint32_t limit;
    uint32_t flags;
    uint32_t pad;
    uint64_t base;
};

typedef struct QEMUCPUSegment QEMUCPUSegment;

struct QEMUCPUState {
    uint32_t version;
    uint32_t size;
    uint64_t rax, rbx, rcx, rdx, rsi, rdi, rsp, rbp;
    uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
    uint64_t rip, rflags;
    QEMUCPUSegment cs, ds, es, fs, gs, ss;
    QEMUCPUSegment ldt, tr, gdt, idt;
    uint64_t cr[5];
};

typedef struct QEMUCPUState QEMUCPUState;

static void copy_segment(QEMUCPUSegment *d, SegmentCache *s)
{
    d->pad = 0;
    d->selector = s->selector;
    d->limit = s->limit;
    d->flags = s->flags;
    d->base = s->base;
}

static void qemu_get_cpustate(QEMUCPUState *s, CPUX86State *env)
{
    memset(s, 0, sizeof(QEMUCPUState));

    s->version = QEMUCPUSTATE_VERSION;
    s->size = sizeof(QEMUCPUState);

    s->rax = env->regs[R_EAX];
    s->rbx = env->regs[R_EBX];
    s->rcx = env->regs[R_ECX];
    s->rdx = env->regs[R_EDX];
    s->rsi = env->regs[R_ESI];
    s->rdi = env->regs[R_EDI];
    s->rsp = env->regs[R_ESP];
    s->rbp = env->regs[R_EBP];
#ifdef TARGET_X86_64
    s->r8  = env->regs[8];
    s->r9  = env->regs[9];
    s->r10 = env->regs[10];
    s->r11 = env->regs[11];
    s->r12 = env->regs[12];
    s->r13 = env->regs[13];
    s->r14 = env->regs[14];
    s->r15 = env->regs[15];
#endif
    s->rip = env->eip;
    s->rflags = env->eflags;

    copy_segment(&s->cs, &env->segs[R_CS]);
    copy_segment(&s->ds, &env->segs[R_DS]);
    copy_segment(&s->es, &env->segs[R_ES]);
    copy_segment(&s->fs, &env->segs[R_FS]);
    copy_segment(&s->gs, &env->segs[R_GS]);
    copy_segment(&s->ss, &env->segs[R_SS]);
    copy_segment(&s->ldt, &env->ldt);
    copy_segment(&s->tr, &env->tr);
    copy_segment(&s->gdt, &env->gdt);
    copy_segment(&s->idt, &env->idt);

    s->cr[0] = env->cr[0];
    s->cr[1] = env->cr[1];
    s->cr[2] = env->cr[2];
    s->cr[3] = env->cr[3];
    s->cr[4] = env->cr[4];
}

static inline int cpu_write_qemu_note(WriteCoreDumpFunction f,
                                      CPUX86State *env,
                                      void *opaque,
                                      int type)
{
    QEMUCPUState state;
    Elf64_Nhdr *note64;
    Elf32_Nhdr *note32;
    void *note;
    char *buf;
    int descsz, note_size, name_size = 5, note_head_size;
    const char *name = "QEMU";
    int ret;

    qemu_get_cpustate(&state, env);

    descsz = sizeof(state);
    if (type == 0) {
        note_head_size = sizeof(Elf32_Nhdr);
    } else {
        note_head_size = sizeof(Elf64_Nhdr);
    }
    note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc(note_size);

    memset(note, 0, note_size);
    if (type == 0) {
        note32 = note;
        note32->n_namesz = cpu_to_le32(name_size);
        note32->n_descsz = cpu_to_le32(descsz);
        note32->n_type = 0;
    } else {
        note64 = note;
        note64->n_namesz = cpu_to_le32(name_size);
        note64->n_descsz = cpu_to_le32(descsz);
        note64->n_type = 0;
    }
    buf = note;
    buf += ((note_head_size + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &state, sizeof(state));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cs,
                                 void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);

    return cpu_write_qemu_note(f, &cpu->env, opaque, 1);
}

int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cs,
                                 void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);

    return cpu_write_qemu_note(f, &cpu->env, opaque, 0);
}

int cpu_get_dump_info(ArchDumpInfo *info)
{
    bool lma = false;
    RAMBlock *block;

#ifdef TARGET_X86_64
    X86CPU *first_x86_cpu = X86_CPU(first_cpu);

    lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
#endif

    if (lma) {
        info->d_machine = EM_X86_64;
    } else {
        info->d_machine = EM_386;
    }
    info->d_endian = ELFDATA2LSB;

    if (lma) {
        info->d_class = ELFCLASS64;
    } else {
        info->d_class = ELFCLASS32;

        QTAILQ_FOREACH(block, &ram_list.blocks, next) {
            if (block->offset + block->length > UINT_MAX) {
                /* The memory size is greater than 4G */
                info->d_class = ELFCLASS64;
                break;
            }
        }
    }

    return 0;
}

ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
{
    int name_size = 5; /* "CORE" or "QEMU" */
    size_t elf_note_size = 0;
    size_t qemu_note_size = 0;
    int elf_desc_size = 0;
    int qemu_desc_size = 0;
    int note_head_size;

    if (class == ELFCLASS32) {
        note_head_size = sizeof(Elf32_Nhdr);
    } else {
        note_head_size = sizeof(Elf64_Nhdr);
    }

    if (machine == EM_386) {
        elf_desc_size = sizeof(x86_elf_prstatus);
    }
#ifdef TARGET_X86_64
    else {
        elf_desc_size = sizeof(x86_64_elf_prstatus);
    }
#endif
    qemu_desc_size = sizeof(QEMUCPUState);

    elf_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                     (elf_desc_size + 3) / 4) * 4;
    qemu_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                      (qemu_desc_size + 3) / 4) * 4;

    return (elf_note_size + qemu_note_size) * nr_cpus;
}
Commit	Line	Data
9fecbed0 WC	1	/*
	2	* i386 memory mapping
	3	*
	4	* Copyright Fujitsu, Corp. 2011, 2012
	5	*
	6	* Authors:
	7	* Wen Congyang <[email protected]>
	8	*
fc0608ac SW	9	* This work is licensed under the terms of the GNU GPL, version 2 or later.
fc0608ac SW	10	* See the COPYING file in the top-level directory.
9fecbed0 WC	11	*
	12	*/
	13
	14	#include "cpu.h"
022c62cb	15	#include "exec/cpu-all.h"
9c17d615	16	#include "sysemu/dump.h"
9fecbed0 WC	17	#include "elf.h"
	18
	19	#ifdef TARGET_X86_64
	20	typedef struct {
	21	target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10;
	22	target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax;
	23	target_ulong rip, cs, eflags;
	24	target_ulong rsp, ss;
	25	target_ulong fs_base, gs_base;
	26	target_ulong ds, es, fs, gs;
	27	} x86_64_user_regs_struct;
	28
	29	typedef struct {
	30	char pad1[32];
	31	uint32_t pid;
	32	char pad2[76];
	33	x86_64_user_regs_struct regs;
	34	char pad3[8];
	35	} x86_64_elf_prstatus;
	36
c72bf468	37	static int x86_64_write_elf64_note(WriteCoreDumpFunction f,
369ff018	38	CPUX86State *env, int id,
9fecbed0 WC	39	void *opaque)
	40	{
	41	x86_64_user_regs_struct regs;
	42	Elf64_Nhdr *note;
	43	char *buf;
	44	int descsz, note_size, name_size = 5;
	45	const char *name = "CORE";
	46	int ret;
	47
	48	regs.r15 = env->regs[15];
	49	regs.r14 = env->regs[14];
	50	regs.r13 = env->regs[13];
	51	regs.r12 = env->regs[12];
	52	regs.r11 = env->regs[11];
	53	regs.r10 = env->regs[10];
	54	regs.r9 = env->regs[9];
	55	regs.r8 = env->regs[8];
	56	regs.rbp = env->regs[R_EBP];
	57	regs.rsp = env->regs[R_ESP];
	58	regs.rdi = env->regs[R_EDI];
	59	regs.rsi = env->regs[R_ESI];
	60	regs.rdx = env->regs[R_EDX];
	61	regs.rcx = env->regs[R_ECX];
	62	regs.rbx = env->regs[R_EBX];
	63	regs.rax = env->regs[R_EAX];
	64	regs.rip = env->eip;
	65	regs.eflags = env->eflags;
	66
	67	regs.orig_rax = 0; /* FIXME */
	68	regs.cs = env->segs[R_CS].selector;
	69	regs.ss = env->segs[R_SS].selector;
	70	regs.fs_base = env->segs[R_FS].base;
	71	regs.gs_base = env->segs[R_GS].base;
	72	regs.ds = env->segs[R_DS].selector;
	73	regs.es = env->segs[R_ES].selector;
	74	regs.fs = env->segs[R_FS].selector;
	75	regs.gs = env->segs[R_GS].selector;
	76
	77	descsz = sizeof(x86_64_elf_prstatus);
	78	note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	79	(descsz + 3) / 4) * 4;
	80	note = g_malloc(note_size);
	81
	82	memset(note, 0, note_size);
	83	note->n_namesz = cpu_to_le32(name_size);
	84	note->n_descsz = cpu_to_le32(descsz);
	85	note->n_type = cpu_to_le32(NT_PRSTATUS);
	86	buf = (char *)note;
	87	buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
	88	memcpy(buf, name, name_size);
	89	buf += ((name_size + 3) / 4) * 4;
	90	memcpy(buf + 32, &id, 4); /* pr_pid */
	91	buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong);
	92	memcpy(buf, &regs, sizeof(x86_64_user_regs_struct));
	93
	94	ret = f(note, note_size, opaque);
	95	g_free(note);
	96	if (ret < 0) {
	97	return -1;
	98	}
	99
	100	return 0;
	101	}
	102	#endif
103
104	typedef struct {
105	uint32_t ebx, ecx, edx, esi, edi, ebp, eax;
106	unsigned short ds, __ds, es, __es;
107	unsigned short fs, __fs, gs, __gs;
108	uint32_t orig_eax, eip;
109	unsigned short cs, __cs;
110	uint32_t eflags, esp;
111	unsigned short ss, __ss;
112	} x86_user_regs_struct;
113
114	typedef struct {
115	char pad1[24];
116	uint32_t pid;
117	char pad2[44];
118	x86_user_regs_struct regs;
119	char pad3[4];
120	} x86_elf_prstatus;
121
369ff018	122	static void x86_fill_elf_prstatus(x86_elf_prstatus prstatus, CPUX86State env,
9fecbed0 WC	123	int id)
	124	{
	125	memset(prstatus, 0, sizeof(x86_elf_prstatus));
	126	prstatus->regs.ebp = env->regs[R_EBP] & 0xffffffff;
	127	prstatus->regs.esp = env->regs[R_ESP] & 0xffffffff;
	128	prstatus->regs.edi = env->regs[R_EDI] & 0xffffffff;
	129	prstatus->regs.esi = env->regs[R_ESI] & 0xffffffff;
	130	prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff;
	131	prstatus->regs.ecx = env->regs[R_ECX] & 0xffffffff;
	132	prstatus->regs.ebx = env->regs[R_EBX] & 0xffffffff;
	133	prstatus->regs.eax = env->regs[R_EAX] & 0xffffffff;
	134	prstatus->regs.eip = env->eip & 0xffffffff;
	135	prstatus->regs.eflags = env->eflags & 0xffffffff;
	136
	137	prstatus->regs.cs = env->segs[R_CS].selector;
	138	prstatus->regs.ss = env->segs[R_SS].selector;
	139	prstatus->regs.ds = env->segs[R_DS].selector;
	140	prstatus->regs.es = env->segs[R_ES].selector;
	141	prstatus->regs.fs = env->segs[R_FS].selector;
	142	prstatus->regs.gs = env->segs[R_GS].selector;
	143
	144	prstatus->pid = id;
	145	}
	146
369ff018	147	static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env,
9fecbed0 WC	148	int id, void *opaque)
	149	{
	150	x86_elf_prstatus prstatus;
	151	Elf64_Nhdr *note;
	152	char *buf;
	153	int descsz, note_size, name_size = 5;
	154	const char *name = "CORE";
	155	int ret;
	156
	157	x86_fill_elf_prstatus(&prstatus, env, id);
	158	descsz = sizeof(x86_elf_prstatus);
	159	note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	160	(descsz + 3) / 4) * 4;
	161	note = g_malloc(note_size);
	162
	163	memset(note, 0, note_size);
	164	note->n_namesz = cpu_to_le32(name_size);
	165	note->n_descsz = cpu_to_le32(descsz);
	166	note->n_type = cpu_to_le32(NT_PRSTATUS);
	167	buf = (char *)note;
	168	buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
	169	memcpy(buf, name, name_size);
	170	buf += ((name_size + 3) / 4) * 4;
	171	memcpy(buf, &prstatus, sizeof(prstatus));
	172
	173	ret = f(note, note_size, opaque);
	174	g_free(note);
	175	if (ret < 0) {
	176	return -1;
	177	}
	178
	179	return 0;
	180	}
	181
c72bf468 JF	182	int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	183	int cpuid, void *opaque)
9fecbed0	184	{
c72bf468	185	X86CPU *cpu = X86_CPU(cs);
9fecbed0 WC	186	int ret;
9fecbed0 WC	187	#ifdef TARGET_X86_64
182735ef AF	188	X86CPU *first_x86_cpu = X86_CPU(first_cpu);
182735ef AF	189	bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
9fecbed0 WC	190
9fecbed0 WC	191	if (lma) {
c72bf468	192	ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque);
9fecbed0 WC	193	} else {
9fecbed0 WC	194	#endif
c72bf468	195	ret = x86_write_elf64_note(f, &cpu->env, cpuid, opaque);
9fecbed0 WC	196	#ifdef TARGET_X86_64
	197	}
	198	#endif
	199
	200	return ret;
	201	}
	202
c72bf468 JF	203	int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	204	int cpuid, void *opaque)
9fecbed0	205	{
c72bf468	206	X86CPU *cpu = X86_CPU(cs);
9fecbed0 WC	207	x86_elf_prstatus prstatus;
	208	Elf32_Nhdr *note;
	209	char *buf;
	210	int descsz, note_size, name_size = 5;
	211	const char *name = "CORE";
	212	int ret;
	213
c72bf468	214	x86_fill_elf_prstatus(&prstatus, &cpu->env, cpuid);
9fecbed0 WC	215	descsz = sizeof(x86_elf_prstatus);
	216	note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	217	(descsz + 3) / 4) * 4;
	218	note = g_malloc(note_size);
	219
	220	memset(note, 0, note_size);
	221	note->n_namesz = cpu_to_le32(name_size);
	222	note->n_descsz = cpu_to_le32(descsz);
	223	note->n_type = cpu_to_le32(NT_PRSTATUS);
	224	buf = (char *)note;
	225	buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4;
	226	memcpy(buf, name, name_size);
	227	buf += ((name_size + 3) / 4) * 4;
	228	memcpy(buf, &prstatus, sizeof(prstatus));
	229
	230	ret = f(note, note_size, opaque);
	231	g_free(note);
	232	if (ret < 0) {
	233	return -1;
	234	}
	235
	236	return 0;
	237	}
90166b71 WC	238
	239	/*
	240	* please count up QEMUCPUSTATE_VERSION if you have changed definition of
	241	* QEMUCPUState, and modify the tools using this information accordingly.
	242	*/
	243	#define QEMUCPUSTATE_VERSION (1)
	244
	245	struct QEMUCPUSegment {
	246	uint32_t selector;
	247	uint32_t limit;
	248	uint32_t flags;
	249	uint32_t pad;
	250	uint64_t base;
	251	};
	252
	253	typedef struct QEMUCPUSegment QEMUCPUSegment;
	254
	255	struct QEMUCPUState {
	256	uint32_t version;
	257	uint32_t size;
	258	uint64_t rax, rbx, rcx, rdx, rsi, rdi, rsp, rbp;
	259	uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
	260	uint64_t rip, rflags;
	261	QEMUCPUSegment cs, ds, es, fs, gs, ss;
	262	QEMUCPUSegment ldt, tr, gdt, idt;
	263	uint64_t cr[5];
	264	};
	265
	266	typedef struct QEMUCPUState QEMUCPUState;
	267
	268	static void copy_segment(QEMUCPUSegment d, SegmentCache s)
	269	{
	270	d->pad = 0;
	271	d->selector = s->selector;
	272	d->limit = s->limit;
	273	d->flags = s->flags;
	274	d->base = s->base;
	275	}
	276
369ff018	277	static void qemu_get_cpustate(QEMUCPUState s, CPUX86State env)
90166b71 WC	278	{
	279	memset(s, 0, sizeof(QEMUCPUState));
	280
	281	s->version = QEMUCPUSTATE_VERSION;
	282	s->size = sizeof(QEMUCPUState);
	283
	284	s->rax = env->regs[R_EAX];
	285	s->rbx = env->regs[R_EBX];
	286	s->rcx = env->regs[R_ECX];
	287	s->rdx = env->regs[R_EDX];
	288	s->rsi = env->regs[R_ESI];
	289	s->rdi = env->regs[R_EDI];
	290	s->rsp = env->regs[R_ESP];
	291	s->rbp = env->regs[R_EBP];
	292	#ifdef TARGET_X86_64
	293	s->r8 = env->regs[8];
	294	s->r9 = env->regs[9];
	295	s->r10 = env->regs[10];
	296	s->r11 = env->regs[11];
	297	s->r12 = env->regs[12];
	298	s->r13 = env->regs[13];
	299	s->r14 = env->regs[14];
	300	s->r15 = env->regs[15];
	301	#endif
	302	s->rip = env->eip;
	303	s->rflags = env->eflags;
	304
	305	copy_segment(&s->cs, &env->segs[R_CS]);
	306	copy_segment(&s->ds, &env->segs[R_DS]);
	307	copy_segment(&s->es, &env->segs[R_ES]);
	308	copy_segment(&s->fs, &env->segs[R_FS]);
	309	copy_segment(&s->gs, &env->segs[R_GS]);
	310	copy_segment(&s->ss, &env->segs[R_SS]);
	311	copy_segment(&s->ldt, &env->ldt);
	312	copy_segment(&s->tr, &env->tr);
	313	copy_segment(&s->gdt, &env->gdt);
	314	copy_segment(&s->idt, &env->idt);
	315
	316	s->cr[0] = env->cr[0];
	317	s->cr[1] = env->cr[1];
	318	s->cr[2] = env->cr[2];
	319	s->cr[3] = env->cr[3];
	320	s->cr[4] = env->cr[4];
	321	}
	322
c72bf468	323	static inline int cpu_write_qemu_note(WriteCoreDumpFunction f,
369ff018	324	CPUX86State *env,
90166b71 WC	325	void *opaque,
	326	int type)
	327	{
	328	QEMUCPUState state;
	329	Elf64_Nhdr *note64;
	330	Elf32_Nhdr *note32;
	331	void *note;
	332	char *buf;
	333	int descsz, note_size, name_size = 5, note_head_size;
	334	const char *name = "QEMU";
	335	int ret;
	336
	337	qemu_get_cpustate(&state, env);
	338
	339	descsz = sizeof(state);
	340	if (type == 0) {
	341	note_head_size = sizeof(Elf32_Nhdr);
	342	} else {
	343	note_head_size = sizeof(Elf64_Nhdr);
	344	}
	345	note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	346	(descsz + 3) / 4) * 4;
	347	note = g_malloc(note_size);
	348
	349	memset(note, 0, note_size);
	350	if (type == 0) {
	351	note32 = note;
	352	note32->n_namesz = cpu_to_le32(name_size);
	353	note32->n_descsz = cpu_to_le32(descsz);
	354	note32->n_type = 0;
	355	} else {
	356	note64 = note;
	357	note64->n_namesz = cpu_to_le32(name_size);
	358	note64->n_descsz = cpu_to_le32(descsz);
	359	note64->n_type = 0;
	360	}
	361	buf = note;
	362	buf += ((note_head_size + 3) / 4) * 4;
	363	memcpy(buf, name, name_size);
	364	buf += ((name_size + 3) / 4) * 4;
	365	memcpy(buf, &state, sizeof(state));
	366
	367	ret = f(note, note_size, opaque);
	368	g_free(note);
	369	if (ret < 0) {
	370	return -1;
	371	}
	372
	373	return 0;
	374	}
	375
c72bf468 JF	376	int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	377	void *opaque)
90166b71	378	{
c72bf468 JF	379	X86CPU *cpu = X86_CPU(cs);
	380
	381	return cpu_write_qemu_note(f, &cpu->env, opaque, 1);
90166b71 WC	382	}
90166b71 WC	383
c72bf468 JF	384	int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	385	void *opaque)
90166b71	386	{
c72bf468 JF	387	X86CPU *cpu = X86_CPU(cs);
	388
	389	return cpu_write_qemu_note(f, &cpu->env, opaque, 0);
90166b71	390	}
25ae9c1d WC	391
	392	int cpu_get_dump_info(ArchDumpInfo *info)
	393	{
	394	bool lma = false;
	395	RAMBlock *block;
	396
	397	#ifdef TARGET_X86_64
182735ef AF	398	X86CPU *first_x86_cpu = X86_CPU(first_cpu);
	399
	400	lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
25ae9c1d WC	401	#endif
	402
	403	if (lma) {
	404	info->d_machine = EM_X86_64;
	405	} else {
	406	info->d_machine = EM_386;
	407	}
	408	info->d_endian = ELFDATA2LSB;
	409
	410	if (lma) {
	411	info->d_class = ELFCLASS64;
	412	} else {
	413	info->d_class = ELFCLASS32;
	414
a3161038	415	QTAILQ_FOREACH(block, &ram_list.blocks, next) {
25ae9c1d WC	416	if (block->offset + block->length > UINT_MAX) {
	417	/* The memory size is greater than 4G */
	418	info->d_class = ELFCLASS64;
	419	break;
	420	}
	421	}
	422	}
	423
	424	return 0;
	425	}
0038ffb0	426
4720bd05	427	ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
0038ffb0 WC	428	{
	429	int name_size = 5; /* "CORE" or "QEMU" */
	430	size_t elf_note_size = 0;
	431	size_t qemu_note_size = 0;
	432	int elf_desc_size = 0;
	433	int qemu_desc_size = 0;
	434	int note_head_size;
	435
	436	if (class == ELFCLASS32) {
	437	note_head_size = sizeof(Elf32_Nhdr);
	438	} else {
	439	note_head_size = sizeof(Elf64_Nhdr);
	440	}
	441
	442	if (machine == EM_386) {
	443	elf_desc_size = sizeof(x86_elf_prstatus);
	444	}
	445	#ifdef TARGET_X86_64
	446	else {
	447	elf_desc_size = sizeof(x86_64_elf_prstatus);
	448	}
	449	#endif
	450	qemu_desc_size = sizeof(QEMUCPUState);
	451
	452	elf_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	453	(elf_desc_size + 3) / 4) * 4;
	454	qemu_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	455	(qemu_desc_size + 3) / 4) * 4;
	456
	457	return (elf_note_size + qemu_note_size) * nr_cpus;
	458	}