tcg: Add comments for all optional instructions not implemented.
[qemu.git] / tcg / s390 / tcg-target.h
CommitLineData
2827822e
AG
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#define TCG_TARGET_S390 1
25
26#define TCG_TARGET_REG_BITS 64
27#define TCG_TARGET_WORDS_BIGENDIAN
28
29enum {
30 TCG_REG_R0 = 0,
31 TCG_REG_R1,
32 TCG_REG_R2,
33 TCG_REG_R3,
34 TCG_REG_R4,
35 TCG_REG_R5,
36 TCG_REG_R6,
37 TCG_REG_R7,
38 TCG_REG_R8,
39 TCG_REG_R9,
40 TCG_REG_R10,
41 TCG_REG_R11,
42 TCG_REG_R12,
43 TCG_REG_R13,
44 TCG_REG_R14,
45 TCG_REG_R15
46};
47#define TCG_TARGET_NB_REGS 16
48
36828256
RH
49/* optional instructions */
50// #define TCG_TARGET_HAS_div_i32
51// #define TCG_TARGET_HAS_rot_i32
52// #define TCG_TARGET_HAS_ext8s_i32
53// #define TCG_TARGET_HAS_ext16s_i32
54// #define TCG_TARGET_HAS_ext8u_i32
55// #define TCG_TARGET_HAS_ext16u_i32
56// #define TCG_TARGET_HAS_bswap16_i32
57// #define TCG_TARGET_HAS_bswap32_i32
58// #define TCG_TARGET_HAS_not_i32
59// #define TCG_TARGET_HAS_neg_i32
60// #define TCG_TARGET_HAS_andc_i32
61// #define TCG_TARGET_HAS_orc_i32
62
63// #define TCG_TARGET_HAS_div_i64
64// #define TCG_TARGET_HAS_rot_i64
65// #define TCG_TARGET_HAS_ext8s_i64
66// #define TCG_TARGET_HAS_ext16s_i64
67// #define TCG_TARGET_HAS_ext32s_i64
68// #define TCG_TARGET_HAS_ext8u_i64
69// #define TCG_TARGET_HAS_ext16u_i64
70// #define TCG_TARGET_HAS_ext32u_i64
71// #define TCG_TARGET_HAS_bswap16_i64
72// #define TCG_TARGET_HAS_bswap32_i64
73// #define TCG_TARGET_HAS_bswap64_i64
74// #define TCG_TARGET_HAS_not_i64
75// #define TCG_TARGET_HAS_neg_i64
76// #define TCG_TARGET_HAS_andc_i64
77// #define TCG_TARGET_HAS_orc_i64
78
2827822e
AG
79/* used for function call generation */
80#define TCG_REG_CALL_STACK TCG_REG_R15
81#define TCG_TARGET_STACK_ALIGN 8
82#define TCG_TARGET_CALL_STACK_OFFSET 0
83
84enum {
85 /* Note: must be synced with dyngen-exec.h */
86 TCG_AREG0 = TCG_REG_R10,
87 TCG_AREG1 = TCG_REG_R7,
88 TCG_AREG2 = TCG_REG_R8,
89 TCG_AREG3 = TCG_REG_R9,
90};
91
92static inline void flush_icache_range(unsigned long start, unsigned long stop)
93{
94#if QEMU_GNUC_PREREQ(4, 1)
95 __builtin___clear_cache((char *) start, (char *) stop);
96#else
97#error not implemented
98#endif
99}
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