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30028739 AF |
1 | /* |
2 | * OpenRISC gdb server stub | |
3 | * | |
4 | * Copyright (c) 2003-2005 Fabrice Bellard | |
5 | * Copyright (c) 2013 SUSE LINUX Products GmbH | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
ed2decc6 | 20 | #include "qemu/osdep.h" |
5b50e790 | 21 | #include "qemu-common.h" |
33c11879 | 22 | #include "cpu.h" |
5b50e790 | 23 | #include "exec/gdbstub.h" |
30028739 | 24 | |
5b50e790 | 25 | int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) |
30028739 | 26 | { |
5b50e790 AF |
27 | OpenRISCCPU *cpu = OPENRISC_CPU(cs); |
28 | CPUOpenRISCState *env = &cpu->env; | |
29 | ||
30028739 | 30 | if (n < 32) { |
986a2998 | 31 | return gdb_get_reg32(mem_buf, env->gpr[n]); |
30028739 AF |
32 | } else { |
33 | switch (n) { | |
34 | case 32: /* PPC */ | |
986a2998 | 35 | return gdb_get_reg32(mem_buf, env->ppc); |
30028739 AF |
36 | |
37 | case 33: /* NPC */ | |
986a2998 | 38 | return gdb_get_reg32(mem_buf, env->npc); |
30028739 AF |
39 | |
40 | case 34: /* SR */ | |
986a2998 | 41 | return gdb_get_reg32(mem_buf, env->sr); |
30028739 AF |
42 | |
43 | default: | |
44 | break; | |
45 | } | |
46 | } | |
47 | return 0; | |
48 | } | |
49 | ||
5b50e790 | 50 | int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) |
30028739 | 51 | { |
5b50e790 AF |
52 | OpenRISCCPU *cpu = OPENRISC_CPU(cs); |
53 | CPUClass *cc = CPU_GET_CLASS(cs); | |
54 | CPUOpenRISCState *env = &cpu->env; | |
30028739 AF |
55 | uint32_t tmp; |
56 | ||
57 | if (n > cc->gdb_num_core_regs) { | |
58 | return 0; | |
59 | } | |
60 | ||
61 | tmp = ldl_p(mem_buf); | |
62 | ||
63 | if (n < 32) { | |
64 | env->gpr[n] = tmp; | |
65 | } else { | |
66 | switch (n) { | |
67 | case 32: /* PPC */ | |
68 | env->ppc = tmp; | |
69 | break; | |
70 | ||
71 | case 33: /* NPC */ | |
72 | env->npc = tmp; | |
73 | break; | |
74 | ||
75 | case 34: /* SR */ | |
76 | env->sr = tmp; | |
77 | break; | |
78 | ||
79 | default: | |
80 | break; | |
81 | } | |
82 | } | |
83 | return 4; | |
84 | } |