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qdev/prop: convert sparc32_dma.c to helper macros.
[qemu.git] / i386-dis.c
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88103cfe 1/* opcodes/i386-dis.c r1.126 */
dc99065b 2/* Print i386 instructions for GDB, the GNU debugger.
bc51c5c9 3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
88103cfe 4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
dc99065b 5
c2c73b42 6 This file is part of GDB.
dc99065b 7
c2c73b42
BS		 8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
dc99065b 12
c2c73b42
BS		 13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
dc99065b 17
c2c73b42 18 You should have received a copy of the GNU General Public License
8167ee88 19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
dc99065b 20
c2c73b42
BS		 21/* 80386 instruction printer by Pace Willisson ([email protected])
22 July 1988
23 modified by John Hassey ([email protected])
24 x86-64 support added by Jan Hubicka ([email protected])
25 VIA PadLock support by Michal Ludvig ([email protected]). */
dc99065b 26
c2c73b42
BS		 27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
dc99065b 33
bb0ebb1f 34#include <stdlib.h>
dc99065b 35#include "dis-asm.h"
88103cfe 36/* include/opcode/i386.h r1.78 */
dc99065b 37
88103cfe
BS		 38/* opcode/i386.h -- Intel 80386 opcode macros
39 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
40 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
41 Free Software Foundation, Inc.
dc99065b 42
88103cfe
BS		 43 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
44
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the GNU General Public License as published by
47 the Free Software Foundation; either version 2 of the License, or
48 (at your option) any later version.
49
50 This program is distributed in the hope that it will be useful,
51 but WITHOUT ANY WARRANTY; without even the implied warranty of
52 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 GNU General Public License for more details.
bc51c5c9 54
88103cfe 55 You should have received a copy of the GNU General Public License
8167ee88 56 along with this program; if not, see <http://www.gnu.org/licenses/>. */
88103cfe
BS		 57
58/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
59 ix86 Unix assemblers, generate floating point instructions with
60 reversed source and destination registers in certain cases.
61 Unfortunately, gcc and possibly many other programs use this
62 reversed syntax, so we're stuck with it.
63
64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
66 the expected st(3) = st(3) - st
67
68 This happens with all the non-commutative arithmetic floating point
69 operations with two register operands, where the source register is
70 %st, and destination register is %st(i).
71
72 The affected opcode map is dceX, dcfX, deeX, defX. */
73
74#ifndef SYSV386_COMPAT
bc51c5c9 75/* Set non-zero for broken, compatible instructions. Set to zero for
88103cfe
BS		 76 non-broken opcodes at your peril. gcc generates SystemV/386
77 compatible instructions. */
78#define SYSV386_COMPAT 1
79#endif
80#ifndef OLDGCC_COMPAT
81/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
82 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
83 reversed. */
84#define OLDGCC_COMPAT SYSV386_COMPAT
bc51c5c9
FB		 85#endif
86
88103cfe
BS		 87#define MOV_AX_DISP32 0xa0
88#define POP_SEG_SHORT 0x07
89#define JUMP_PC_RELATIVE 0xeb
90#define INT_OPCODE 0xcd
91#define INT3_OPCODE 0xcc
92/* The opcode for the fwait instruction, which disassembler treats as a
93 prefix when it can. */
94#define FWAIT_OPCODE 0x9b
95#define ADDR_PREFIX_OPCODE 0x67
96#define DATA_PREFIX_OPCODE 0x66
97#define LOCK_PREFIX_OPCODE 0xf0
98#define CS_PREFIX_OPCODE 0x2e
99#define DS_PREFIX_OPCODE 0x3e
100#define ES_PREFIX_OPCODE 0x26
101#define FS_PREFIX_OPCODE 0x64
102#define GS_PREFIX_OPCODE 0x65
103#define SS_PREFIX_OPCODE 0x36
104#define REPNE_PREFIX_OPCODE 0xf2
105#define REPE_PREFIX_OPCODE 0xf3
106
107#define TWO_BYTE_OPCODE_ESCAPE 0x0f
108#define NOP_OPCODE (char) 0x90
109
110/* register numbers */
111#define EBP_REG_NUM 5
112#define ESP_REG_NUM 4
113
114/* modrm_byte.regmem for twobyte escape */
115#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
116/* index_base_byte.index for no index register addressing */
117#define NO_INDEX_REGISTER ESP_REG_NUM
118/* index_base_byte.base for no base register addressing */
119#define NO_BASE_REGISTER EBP_REG_NUM
120#define NO_BASE_REGISTER_16 6
121
122/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
123#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
124#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
125
126/* x86-64 extension prefix. */
127#define REX_OPCODE 0x40
128
129/* Indicates 64 bit operand size. */
130#define REX_W 8
131/* High extension to reg field of modrm byte. */
132#define REX_R 4
133/* High extension to SIB index field. */
134#define REX_X 2
135/* High extension to base field of modrm or SIB, or reg field of opcode. */
136#define REX_B 1
137
138/* max operands per insn */
139#define MAX_OPERANDS 4
140
141/* max immediates per insn (lcall, ljmp, insertq, extrq) */
142#define MAX_IMMEDIATE_OPERANDS 2
143
144/* max memory refs per insn (string ops) */
145#define MAX_MEMORY_OPERANDS 2
146
147/* max size of insn mnemonics. */
148#define MAX_MNEM_SIZE 16
149
150/* max size of register name in insn mnemonics. */
151#define MAX_REG_NAME_SIZE 8
152
153/* opcodes/i386-dis.c r1.126 */
154#include "qemu-common.h"
155
156#include <setjmp.h>
157
c2c73b42
BS		 158static int fetch_data (struct disassemble_info *, bfd_byte *);
159static void ckprefix (void);
160static const char *prefix_name (int, int);
161static int print_insn (bfd_vma, disassemble_info *);
162static void dofloat (int);
163static void OP_ST (int, int);
164static void OP_STi (int, int);
165static int putop (const char *, int);
166static void oappend (const char *);
167static void append_seg (void);
168static void OP_indirE (int, int);
169static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
88103cfe 170static void print_displacement (char *, bfd_vma);
c2c73b42
BS		 171static void OP_E (int, int);
172static void OP_G (int, int);
173static bfd_vma get64 (void);
174static bfd_signed_vma get32 (void);
175static bfd_signed_vma get32s (void);
176static int get16 (void);
177static void set_op (bfd_vma, int);
178static void OP_REG (int, int);
179static void OP_IMREG (int, int);
180static void OP_I (int, int);
181static void OP_I64 (int, int);
182static void OP_sI (int, int);
183static void OP_J (int, int);
184static void OP_SEG (int, int);
185static void OP_DIR (int, int);
186static void OP_OFF (int, int);
187static void OP_OFF64 (int, int);
188static void ptr_reg (int, int);
189static void OP_ESreg (int, int);
190static void OP_DSreg (int, int);
191static void OP_C (int, int);
192static void OP_D (int, int);
193static void OP_T (int, int);
88103cfe 194static void OP_R (int, int);
c2c73b42
BS		 195static void OP_MMX (int, int);
196static void OP_XMM (int, int);
197static void OP_EM (int, int);
198static void OP_EX (int, int);
88103cfe
BS		 199static void OP_EMC (int,int);
200static void OP_MXC (int,int);
c2c73b42
BS		 201static void OP_MS (int, int);
202static void OP_XS (int, int);
203static void OP_M (int, int);
204static void OP_VMX (int, int);
205static void OP_0fae (int, int);
206static void OP_0f07 (int, int);
88103cfe
BS		 207static void NOP_Fixup1 (int, int);
208static void NOP_Fixup2 (int, int);
c2c73b42
BS		 209static void OP_3DNowSuffix (int, int);
210static void OP_SIMD_Suffix (int, int);
211static void SIMD_Fixup (int, int);
212static void PNI_Fixup (int, int);
213static void SVME_Fixup (int, int);
214static void INVLPG_Fixup (int, int);
215static void BadOp (void);
c2c73b42
BS		 216static void VMX_Fixup (int, int);
217static void REP_Fixup (int, int);
88103cfe
BS		 218static void CMPXCHG8B_Fixup (int, int);
219static void XMM_Fixup (int, int);
220static void CRC32_Fixup (int, int);
dc99065b 221
bc51c5c9 222struct dis_private {
dc99065b
FB		 223 /* Points to first byte not fetched. */
224 bfd_byte *max_fetched;
88103cfe 225 bfd_byte the_buffer[MAX_MNEM_SIZE];
dc99065b 226 bfd_vma insn_start;
bc51c5c9 227 int orig_sizeflag;
dc99065b
FB		 228 jmp_buf bailout;
229};
230
c2c73b42
BS		 231enum address_mode
232{
233 mode_16bit,
234 mode_32bit,
235 mode_64bit
236};
237
238static enum address_mode address_mode;
bc51c5c9
FB		 239
240/* Flags for the prefixes for the current instruction. See below. */
241static int prefixes;
242
243/* REX prefix the current instruction. See below. */
244static int rex;
245/* Bits of REX we've already used. */
246static int rex_used;
bc51c5c9
FB		 247/* Mark parts used in the REX prefix. When we are testing for
248 empty prefix (for 8bit register REX extension), just mask it
249 out. Otherwise test for REX bit is excuse for existence of REX
250 only in case value is nonzero. */
251#define USED_REX(value) \
252 { \
253 if (value) \
88103cfe
BS		 254 { \
255 if ((rex & value)) \
256 rex_used |= (value) | REX_OPCODE; \
257 } \
bc51c5c9 258 else \
88103cfe 259 rex_used |= REX_OPCODE; \
bc51c5c9
FB		 260 }
261
262/* Flags for prefixes which we somehow handled when printing the
263 current instruction. */
264static int used_prefixes;
265
266/* Flags stored in PREFIXES. */
267#define PREFIX_REPZ 1
268#define PREFIX_REPNZ 2
269#define PREFIX_LOCK 4
270#define PREFIX_CS 8
271#define PREFIX_SS 0x10
272#define PREFIX_DS 0x20
273#define PREFIX_ES 0x40
274#define PREFIX_FS 0x80
275#define PREFIX_GS 0x100
276#define PREFIX_DATA 0x200
277#define PREFIX_ADDR 0x400
278#define PREFIX_FWAIT 0x800
279
dc99065b
FB		 280/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
281 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
282 on error. */
283#define FETCH_DATA(info, addr) \
bc51c5c9 284 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
dc99065b
FB		 285 ? 1 : fetch_data ((info), (addr)))
286
287static int
c2c73b42 288fetch_data (struct disassemble_info *info, bfd_byte *addr)
dc99065b
FB		 289{
290 int status;
bc51c5c9 291 struct dis_private *priv = (struct dis_private *) info->private_data;
dc99065b
FB		 292 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
293
88103cfe 294 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
c2c73b42
BS		 295 status = (*info->read_memory_func) (start,
296 priv->max_fetched,
297 addr - priv->max_fetched,
298 info);
299 else
300 status = -1;
dc99065b
FB		 301 if (status != 0)
302 {
bc51c5c9 303 /* If we did manage to read at least one byte, then
c2c73b42
BS		 304 print_insn_i386 will do something sensible. Otherwise, print
305 an error. We do that here because this is where we know
306 STATUS. */
bc51c5c9
FB		 307 if (priv->max_fetched == priv->the_buffer)
308 (*info->memory_error_func) (status, start, info);
dc99065b
FB		 309 longjmp (priv->bailout, 1);
310 }
311 else
312 priv->max_fetched = addr;
313 return 1;
314}
315
88103cfe
BS		 316#define XX { NULL, 0 }
317
318#define Eb { OP_E, b_mode }
319#define Ev { OP_E, v_mode }
320#define Ed { OP_E, d_mode }
321#define Edq { OP_E, dq_mode }
322#define Edqw { OP_E, dqw_mode }
323#define Edqb { OP_E, dqb_mode }
324#define Edqd { OP_E, dqd_mode }
325#define indirEv { OP_indirE, stack_v_mode }
326#define indirEp { OP_indirE, f_mode }
327#define stackEv { OP_E, stack_v_mode }
328#define Em { OP_E, m_mode }
329#define Ew { OP_E, w_mode }
330#define M { OP_M, 0 } /* lea, lgdt, etc. */
331#define Ma { OP_M, v_mode }
332#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
333#define Mq { OP_M, q_mode }
334#define Gb { OP_G, b_mode }
335#define Gv { OP_G, v_mode }
336#define Gd { OP_G, d_mode }
337#define Gdq { OP_G, dq_mode }
338#define Gm { OP_G, m_mode }
339#define Gw { OP_G, w_mode }
340#define Rd { OP_R, d_mode }
341#define Rm { OP_R, m_mode }
342#define Ib { OP_I, b_mode }
343#define sIb { OP_sI, b_mode } /* sign extened byte */
344#define Iv { OP_I, v_mode }
345#define Iq { OP_I, q_mode }
346#define Iv64 { OP_I64, v_mode }
347#define Iw { OP_I, w_mode }
348#define I1 { OP_I, const_1_mode }
349#define Jb { OP_J, b_mode }
350#define Jv { OP_J, v_mode }
351#define Cm { OP_C, m_mode }
352#define Dm { OP_D, m_mode }
353#define Td { OP_T, d_mode }
354
355#define RMeAX { OP_REG, eAX_reg }
356#define RMeBX { OP_REG, eBX_reg }
357#define RMeCX { OP_REG, eCX_reg }
358#define RMeDX { OP_REG, eDX_reg }
359#define RMeSP { OP_REG, eSP_reg }
360#define RMeBP { OP_REG, eBP_reg }
361#define RMeSI { OP_REG, eSI_reg }
362#define RMeDI { OP_REG, eDI_reg }
363#define RMrAX { OP_REG, rAX_reg }
364#define RMrBX { OP_REG, rBX_reg }
365#define RMrCX { OP_REG, rCX_reg }
366#define RMrDX { OP_REG, rDX_reg }
367#define RMrSP { OP_REG, rSP_reg }
368#define RMrBP { OP_REG, rBP_reg }
369#define RMrSI { OP_REG, rSI_reg }
370#define RMrDI { OP_REG, rDI_reg }
371#define RMAL { OP_REG, al_reg }
372#define RMAL { OP_REG, al_reg }
373#define RMCL { OP_REG, cl_reg }
374#define RMDL { OP_REG, dl_reg }
375#define RMBL { OP_REG, bl_reg }
376#define RMAH { OP_REG, ah_reg }
377#define RMCH { OP_REG, ch_reg }
378#define RMDH { OP_REG, dh_reg }
379#define RMBH { OP_REG, bh_reg }
380#define RMAX { OP_REG, ax_reg }
381#define RMDX { OP_REG, dx_reg }
382
383#define eAX { OP_IMREG, eAX_reg }
384#define eBX { OP_IMREG, eBX_reg }
385#define eCX { OP_IMREG, eCX_reg }
386#define eDX { OP_IMREG, eDX_reg }
387#define eSP { OP_IMREG, eSP_reg }
388#define eBP { OP_IMREG, eBP_reg }
389#define eSI { OP_IMREG, eSI_reg }
390#define eDI { OP_IMREG, eDI_reg }
391#define AL { OP_IMREG, al_reg }
392#define CL { OP_IMREG, cl_reg }
393#define DL { OP_IMREG, dl_reg }
394#define BL { OP_IMREG, bl_reg }
395#define AH { OP_IMREG, ah_reg }
396#define CH { OP_IMREG, ch_reg }
397#define DH { OP_IMREG, dh_reg }
398#define BH { OP_IMREG, bh_reg }
399#define AX { OP_IMREG, ax_reg }
400#define DX { OP_IMREG, dx_reg }
401#define zAX { OP_IMREG, z_mode_ax_reg }
402#define indirDX { OP_IMREG, indir_dx_reg }
403
404#define Sw { OP_SEG, w_mode }
405#define Sv { OP_SEG, v_mode }
406#define Ap { OP_DIR, 0 }
407#define Ob { OP_OFF64, b_mode }
408#define Ov { OP_OFF64, v_mode }
409#define Xb { OP_DSreg, eSI_reg }
410#define Xv { OP_DSreg, eSI_reg }
411#define Xz { OP_DSreg, eSI_reg }
412#define Yb { OP_ESreg, eDI_reg }
413#define Yv { OP_ESreg, eDI_reg }
414#define DSBX { OP_DSreg, eBX_reg }
415
416#define es { OP_REG, es_reg }
417#define ss { OP_REG, ss_reg }
418#define cs { OP_REG, cs_reg }
419#define ds { OP_REG, ds_reg }
420#define fs { OP_REG, fs_reg }
421#define gs { OP_REG, gs_reg }
422
423#define MX { OP_MMX, 0 }
424#define XM { OP_XMM, 0 }
425#define EM { OP_EM, v_mode }
426#define EMd { OP_EM, d_mode }
427#define EMq { OP_EM, q_mode }
428#define EXd { OP_EX, d_mode }
429#define EXq { OP_EX, q_mode }
430#define EXx { OP_EX, x_mode }
431#define MS { OP_MS, v_mode }
432#define XS { OP_XS, v_mode }
433#define EMC { OP_EMC, v_mode }
434#define MXC { OP_MXC, 0 }
435#define VM { OP_VMX, q_mode }
436#define OPSUF { OP_3DNowSuffix, 0 }
437#define OPSIMD { OP_SIMD_Suffix, 0 }
438#define XMM0 { XMM_Fixup, 0 }
bc51c5c9 439
c2c73b42 440/* Used handle "rep" prefix for string instructions. */
88103cfe
BS		 441#define Xbr { REP_Fixup, eSI_reg }
442#define Xvr { REP_Fixup, eSI_reg }
443#define Ybr { REP_Fixup, eDI_reg }
444#define Yvr { REP_Fixup, eDI_reg }
445#define Yzr { REP_Fixup, eDI_reg }
446#define indirDXr { REP_Fixup, indir_dx_reg }
447#define ALr { REP_Fixup, al_reg }
448#define eAXr { REP_Fixup, eAX_reg }
449
450#define cond_jump_flag { NULL, cond_jump_mode }
451#define loop_jcxz_flag { NULL, loop_jcxz_mode }
bc51c5c9
FB		 452
453/* bits in sizeflag */
454#define SUFFIX_ALWAYS 4
455#define AFLAG 2
456#define DFLAG 1
dc99065b 457
bc51c5c9
FB		 458#define b_mode 1 /* byte operand */
459#define v_mode 2 /* operand size depends on prefixes */
460#define w_mode 3 /* word operand */
461#define d_mode 4 /* double word operand */
462#define q_mode 5 /* quad word operand */
c2c73b42
BS		 463#define t_mode 6 /* ten-byte operand */
464#define x_mode 7 /* 16-byte XMM operand */
465#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
466#define cond_jump_mode 9
467#define loop_jcxz_mode 10
468#define dq_mode 11 /* operand size depends on REX prefixes. */
469#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
470#define f_mode 13 /* 4- or 6-byte pointer operand */
471#define const_1_mode 14
472#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
88103cfe
BS		 473#define z_mode 16 /* non-quad operand size depends on prefixes */
474#define o_mode 17 /* 16-byte operand */
475#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
476#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
dc99065b
FB		 477
478#define es_reg 100
479#define cs_reg 101
480#define ss_reg 102
481#define ds_reg 103
482#define fs_reg 104
483#define gs_reg 105
dc99065b 484
bc51c5c9
FB		 485#define eAX_reg 108
486#define eCX_reg 109
487#define eDX_reg 110
488#define eBX_reg 111
489#define eSP_reg 112
490#define eBP_reg 113
491#define eSI_reg 114
492#define eDI_reg 115
dc99065b
FB		 493
494#define al_reg 116
495#define cl_reg 117
496#define dl_reg 118
497#define bl_reg 119
498#define ah_reg 120
499#define ch_reg 121
500#define dh_reg 122
501#define bh_reg 123
502
503#define ax_reg 124
504#define cx_reg 125
505#define dx_reg 126
506#define bx_reg 127
507#define sp_reg 128
508#define bp_reg 129
509#define si_reg 130
510#define di_reg 131
511
bc51c5c9
FB		 512#define rAX_reg 132
513#define rCX_reg 133
514#define rDX_reg 134
515#define rBX_reg 135
516#define rSP_reg 136
517#define rBP_reg 137
518#define rSI_reg 138
519#define rDI_reg 139
520
88103cfe 521#define z_mode_ax_reg 149
dc99065b
FB		 522#define indir_dx_reg 150
523
bc51c5c9
FB		 524#define FLOATCODE 1
525#define USE_GROUPS 2
526#define USE_PREFIX_USER_TABLE 3
527#define X86_64_SPECIAL 4
c2c73b42 528#define IS_3BYTE_OPCODE 5
bc51c5c9 529
88103cfe
BS		 530#define FLOAT NULL, { { NULL, FLOATCODE } }
531
532#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
533#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
534#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
535#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
536#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
537#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
538#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
539#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
540#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
541#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
542#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
543#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
544#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
545#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
546#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
547#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
548#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
549#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
550#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
551#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
552#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
553#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
554#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
555#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
556#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
557#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
558#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
559#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
560
561#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
562#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
563#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
564#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
565#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
566#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
567#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
568#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
569#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
570#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
571#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
572#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
573#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
574#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
575#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
576#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
577#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
578#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
579#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
580#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
581#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
582#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
583#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
584#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
585#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
586#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
587#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
588#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
589#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
590#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
591#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
592#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
593#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
594#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
595#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
596#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
597#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
598#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
599#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
600#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
601#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
602#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
603#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
604#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
605#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
606#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
607#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
608#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
609#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
610#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
611#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
612#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
613#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
614#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
615#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
616#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
617#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
618#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
619#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
620#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
621#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
622#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
623#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
624#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
625#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
626#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
627#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
628#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
629#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
630#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
631#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
632#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
633#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
634#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
635#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
636#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
637#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
638#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
639#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
640#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
641#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
642#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
643#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
644#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
645#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
646#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
647#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
648#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
649#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
650#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
651#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
652#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
653#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
654#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
655#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
656#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
657#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
658#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
659
660
661#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
662#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
663#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
664#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
665
666#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
667#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
c2c73b42
BS		 668
669typedef void (*op_rtn) (int bytemode, int sizeflag);
dc99065b
FB		 670
671struct dis386 {
bc51c5c9 672 const char *name;
88103cfe
BS		 673 struct
674 {
675 op_rtn rtn;
676 int bytemode;
677 } op[MAX_OPERANDS];
dc99065b
FB		 678};
679
bc51c5c9
FB		 680/* Upper case letters in the instruction names here are macros.
681 'A' => print 'b' if no register operands or suffix_always is true
682 'B' => print 'b' if suffix_always is true
c2c73b42
BS		 683 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
684 . size prefix
88103cfe
BS		 685 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
686 . suffix_always is true
bc51c5c9
FB		 687 'E' => print 'e' if 32-bit form of jcxz
688 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
88103cfe 689 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
bc51c5c9 690 'H' => print ",pt" or ",pn" branch hint
c2c73b42
BS		 691 'I' => honor following macro letter even in Intel mode (implemented only
692 . for some of the macro letters)
693 'J' => print 'l'
88103cfe 694 'K' => print 'd' or 'q' if rex prefix is present.
bc51c5c9
FB		 695 'L' => print 'l' if suffix_always is true
696 'N' => print 'n' if instruction has no wait "prefix"
88103cfe 697 'O' => print 'd' or 'o' (or 'q' in Intel mode)
bc51c5c9
FB		 698 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
699 . or suffix_always is true. print 'q' if rex prefix is present.
700 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
701 . is true
88103cfe 702 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
bc51c5c9
FB		 703 'S' => print 'w', 'l' or 'q' if suffix_always is true
704 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
705 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
c2c73b42 706 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
88103cfe 707 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
c2c73b42 708 'X' => print 's', 'd' depending on data16 prefix (for XMM)
bc51c5c9 709 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
c2c73b42 710 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
bc51c5c9
FB		 711
712 Many of the above letters print nothing in Intel mode. See "putop"
713 for the details.
714
715 Braces '{' and '}', and vertical bars '|', indicate alternative
716 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
717 modes. In cases where there are only two alternatives, the X86_64
718 instruction is reserved, and "(bad)" is printed.
719*/
720
721static const struct dis386 dis386[] = {
dc99065b 722 /* 00 */
88103cfe
BS		 723 { "addB", { Eb, Gb } },
724 { "addS", { Ev, Gv } },
725 { "addB", { Gb, Eb } },
726 { "addS", { Gv, Ev } },
727 { "addB", { AL, Ib } },
728 { "addS", { eAX, Iv } },
729 { "push{T|}", { es } },
730 { "pop{T|}", { es } },
dc99065b 731 /* 08 */
88103cfe
BS		 732 { "orB", { Eb, Gb } },
733 { "orS", { Ev, Gv } },
734 { "orB", { Gb, Eb } },
735 { "orS", { Gv, Ev } },
736 { "orB", { AL, Ib } },
737 { "orS", { eAX, Iv } },
738 { "push{T|}", { cs } },
739 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
dc99065b 740 /* 10 */
88103cfe
BS		 741 { "adcB", { Eb, Gb } },
742 { "adcS", { Ev, Gv } },
743 { "adcB", { Gb, Eb } },
744 { "adcS", { Gv, Ev } },
745 { "adcB", { AL, Ib } },
746 { "adcS", { eAX, Iv } },
747 { "push{T|}", { ss } },
748 { "pop{T|}", { ss } },
dc99065b 749 /* 18 */
88103cfe
BS		 750 { "sbbB", { Eb, Gb } },
751 { "sbbS", { Ev, Gv } },
752 { "sbbB", { Gb, Eb } },
753 { "sbbS", { Gv, Ev } },
754 { "sbbB", { AL, Ib } },
755 { "sbbS", { eAX, Iv } },
756 { "push{T|}", { ds } },
757 { "pop{T|}", { ds } },
dc99065b 758 /* 20 */
88103cfe
BS		 759 { "andB", { Eb, Gb } },
760 { "andS", { Ev, Gv } },
761 { "andB", { Gb, Eb } },
762 { "andS", { Gv, Ev } },
763 { "andB", { AL, Ib } },
764 { "andS", { eAX, Iv } },
765 { "(bad)", { XX } }, /* SEG ES prefix */
766 { "daa{|}", { XX } },
dc99065b 767 /* 28 */
88103cfe
BS		 768 { "subB", { Eb, Gb } },
769 { "subS", { Ev, Gv } },
770 { "subB", { Gb, Eb } },
771 { "subS", { Gv, Ev } },
772 { "subB", { AL, Ib } },
773 { "subS", { eAX, Iv } },
774 { "(bad)", { XX } }, /* SEG CS prefix */
775 { "das{|}", { XX } },
dc99065b 776 /* 30 */
88103cfe
BS		 777 { "xorB", { Eb, Gb } },
778 { "xorS", { Ev, Gv } },
779 { "xorB", { Gb, Eb } },
780 { "xorS", { Gv, Ev } },
781 { "xorB", { AL, Ib } },
782 { "xorS", { eAX, Iv } },
783 { "(bad)", { XX } }, /* SEG SS prefix */
784 { "aaa{|}", { XX } },
dc99065b 785 /* 38 */
88103cfe
BS		 786 { "cmpB", { Eb, Gb } },
787 { "cmpS", { Ev, Gv } },
788 { "cmpB", { Gb, Eb } },
789 { "cmpS", { Gv, Ev } },
790 { "cmpB", { AL, Ib } },
791 { "cmpS", { eAX, Iv } },
792 { "(bad)", { XX } }, /* SEG DS prefix */
793 { "aas{|}", { XX } },
dc99065b 794 /* 40 */
88103cfe
BS		 795 { "inc{S|}", { RMeAX } },
796 { "inc{S|}", { RMeCX } },
797 { "inc{S|}", { RMeDX } },
798 { "inc{S|}", { RMeBX } },
799 { "inc{S|}", { RMeSP } },
800 { "inc{S|}", { RMeBP } },
801 { "inc{S|}", { RMeSI } },
802 { "inc{S|}", { RMeDI } },
dc99065b 803 /* 48 */
88103cfe
BS		 804 { "dec{S|}", { RMeAX } },
805 { "dec{S|}", { RMeCX } },
806 { "dec{S|}", { RMeDX } },
807 { "dec{S|}", { RMeBX } },
808 { "dec{S|}", { RMeSP } },
809 { "dec{S|}", { RMeBP } },
810 { "dec{S|}", { RMeSI } },
811 { "dec{S|}", { RMeDI } },
dc99065b 812 /* 50 */
88103cfe
BS		 813 { "pushV", { RMrAX } },
814 { "pushV", { RMrCX } },
815 { "pushV", { RMrDX } },
816 { "pushV", { RMrBX } },
817 { "pushV", { RMrSP } },
818 { "pushV", { RMrBP } },
819 { "pushV", { RMrSI } },
820 { "pushV", { RMrDI } },
dc99065b 821 /* 58 */
88103cfe
BS		 822 { "popV", { RMrAX } },
823 { "popV", { RMrCX } },
824 { "popV", { RMrDX } },
825 { "popV", { RMrBX } },
826 { "popV", { RMrSP } },
827 { "popV", { RMrBP } },
828 { "popV", { RMrSI } },
829 { "popV", { RMrDI } },
dc99065b 830 /* 60 */
bc51c5c9 831 { X86_64_0 },
88103cfe
BS		 832 { X86_64_1 },
833 { X86_64_2 },
834 { X86_64_3 },
835 { "(bad)", { XX } }, /* seg fs */
836 { "(bad)", { XX } }, /* seg gs */
837 { "(bad)", { XX } }, /* op size prefix */
838 { "(bad)", { XX } }, /* adr size prefix */
dc99065b 839 /* 68 */
88103cfe
BS		 840 { "pushT", { Iq } },
841 { "imulS", { Gv, Ev, Iv } },
842 { "pushT", { sIb } },
843 { "imulS", { Gv, Ev, sIb } },
844 { "ins{b||b|}", { Ybr, indirDX } },
845 { "ins{R||G|}", { Yzr, indirDX } },
846 { "outs{b||b|}", { indirDXr, Xb } },
847 { "outs{R||G|}", { indirDXr, Xz } },
dc99065b 848 /* 70 */
88103cfe
BS		 849 { "joH", { Jb, XX, cond_jump_flag } },
850 { "jnoH", { Jb, XX, cond_jump_flag } },
851 { "jbH", { Jb, XX, cond_jump_flag } },
852 { "jaeH", { Jb, XX, cond_jump_flag } },
853 { "jeH", { Jb, XX, cond_jump_flag } },
854 { "jneH", { Jb, XX, cond_jump_flag } },
855 { "jbeH", { Jb, XX, cond_jump_flag } },
856 { "jaH", { Jb, XX, cond_jump_flag } },
dc99065b 857 /* 78 */
88103cfe
BS		 858 { "jsH", { Jb, XX, cond_jump_flag } },
859 { "jnsH", { Jb, XX, cond_jump_flag } },
860 { "jpH", { Jb, XX, cond_jump_flag } },
861 { "jnpH", { Jb, XX, cond_jump_flag } },
862 { "jlH", { Jb, XX, cond_jump_flag } },
863 { "jgeH", { Jb, XX, cond_jump_flag } },
864 { "jleH", { Jb, XX, cond_jump_flag } },
865 { "jgH", { Jb, XX, cond_jump_flag } },
dc99065b
FB		 866 /* 80 */
867 { GRP1b },
868 { GRP1S },
88103cfe 869 { "(bad)", { XX } },
dc99065b 870 { GRP1Ss },
88103cfe
BS		 871 { "testB", { Eb, Gb } },
872 { "testS", { Ev, Gv } },
873 { "xchgB", { Eb, Gb } },
874 { "xchgS", { Ev, Gv } },
dc99065b 875 /* 88 */
88103cfe
BS		 876 { "movB", { Eb, Gb } },
877 { "movS", { Ev, Gv } },
878 { "movB", { Gb, Eb } },
879 { "movS", { Gv, Ev } },
880 { "movD", { Sv, Sw } },
881 { "leaS", { Gv, M } },
882 { "movD", { Sw, Sv } },
883 { GRP1a },
dc99065b 884 /* 90 */
88103cfe
BS		 885 { PREGRP38 },
886 { "xchgS", { RMeCX, eAX } },
887 { "xchgS", { RMeDX, eAX } },
888 { "xchgS", { RMeBX, eAX } },
889 { "xchgS", { RMeSP, eAX } },
890 { "xchgS", { RMeBP, eAX } },
891 { "xchgS", { RMeSI, eAX } },
892 { "xchgS", { RMeDI, eAX } },
dc99065b 893 /* 98 */
88103cfe
BS		 894 { "cW{t||t|}R", { XX } },
895 { "cR{t||t|}O", { XX } },
896 { "Jcall{T|}", { Ap } },
897 { "(bad)", { XX } }, /* fwait */
898 { "pushfT", { XX } },
899 { "popfT", { XX } },
900 { "sahf{|}", { XX } },
901 { "lahf{|}", { XX } },
dc99065b 902 /* a0 */
88103cfe
BS		 903 { "movB", { AL, Ob } },
904 { "movS", { eAX, Ov } },
905 { "movB", { Ob, AL } },
906 { "movS", { Ov, eAX } },
907 { "movs{b||b|}", { Ybr, Xb } },
908 { "movs{R||R|}", { Yvr, Xv } },
909 { "cmps{b||b|}", { Xb, Yb } },
910 { "cmps{R||R|}", { Xv, Yv } },
dc99065b 911 /* a8 */
88103cfe
BS		 912 { "testB", { AL, Ib } },
913 { "testS", { eAX, Iv } },
914 { "stosB", { Ybr, AL } },
915 { "stosS", { Yvr, eAX } },
916 { "lodsB", { ALr, Xb } },
917 { "lodsS", { eAXr, Xv } },
918 { "scasB", { AL, Yb } },
919 { "scasS", { eAX, Yv } },
dc99065b 920 /* b0 */
88103cfe
BS		 921 { "movB", { RMAL, Ib } },
922 { "movB", { RMCL, Ib } },
923 { "movB", { RMDL, Ib } },
924 { "movB", { RMBL, Ib } },
925 { "movB", { RMAH, Ib } },
926 { "movB", { RMCH, Ib } },
927 { "movB", { RMDH, Ib } },
928 { "movB", { RMBH, Ib } },
dc99065b 929 /* b8 */
88103cfe
BS		 930 { "movS", { RMeAX, Iv64 } },
931 { "movS", { RMeCX, Iv64 } },
932 { "movS", { RMeDX, Iv64 } },
933 { "movS", { RMeBX, Iv64 } },
934 { "movS", { RMeSP, Iv64 } },
935 { "movS", { RMeBP, Iv64 } },
936 { "movS", { RMeSI, Iv64 } },
937 { "movS", { RMeDI, Iv64 } },
dc99065b
FB		 938 /* c0 */
939 { GRP2b },
940 { GRP2S },
88103cfe
BS		 941 { "retT", { Iw } },
942 { "retT", { XX } },
943 { "les{S|}", { Gv, Mp } },
944 { "ldsS", { Gv, Mp } },
945 { GRP11_C6 },
946 { GRP11_C7 },
dc99065b 947 /* c8 */
88103cfe
BS		 948 { "enterT", { Iw, Ib } },
949 { "leaveT", { XX } },
950 { "lretP", { Iw } },
951 { "lretP", { XX } },
952 { "int3", { XX } },
953 { "int", { Ib } },
954 { "into{|}", { XX } },
955 { "iretP", { XX } },
dc99065b
FB		 956 /* d0 */
957 { GRP2b_one },
958 { GRP2S_one },
959 { GRP2b_cl },
960 { GRP2S_cl },
88103cfe
BS		 961 { "aam{|}", { sIb } },
962 { "aad{|}", { sIb } },
963 { "(bad)", { XX } },
964 { "xlat", { DSBX } },
dc99065b
FB		 965 /* d8 */
966 { FLOAT },
967 { FLOAT },
968 { FLOAT },
969 { FLOAT },
970 { FLOAT },
971 { FLOAT },
972 { FLOAT },
973 { FLOAT },
974 /* e0 */
88103cfe
BS		 975 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
976 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
977 { "loopFH", { Jb, XX, loop_jcxz_flag } },
978 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
979 { "inB", { AL, Ib } },
980 { "inG", { zAX, Ib } },
981 { "outB", { Ib, AL } },
982 { "outG", { Ib, zAX } },
dc99065b 983 /* e8 */
88103cfe
BS		 984 { "callT", { Jv } },
985 { "jmpT", { Jv } },
986 { "Jjmp{T|}", { Ap } },
987 { "jmp", { Jb } },
988 { "inB", { AL, indirDX } },
989 { "inG", { zAX, indirDX } },
990 { "outB", { indirDX, AL } },
991 { "outG", { indirDX, zAX } },
dc99065b 992 /* f0 */
88103cfe
BS		 993 { "(bad)", { XX } }, /* lock prefix */
994 { "icebp", { XX } },
995 { "(bad)", { XX } }, /* repne */
996 { "(bad)", { XX } }, /* repz */
997 { "hlt", { XX } },
998 { "cmc", { XX } },
dc99065b
FB		 999 { GRP3b },
1000 { GRP3S },
1001 /* f8 */
88103cfe
BS		 1002 { "clc", { XX } },
1003 { "stc", { XX } },
1004 { "cli", { XX } },
1005 { "sti", { XX } },
1006 { "cld", { XX } },
1007 { "std", { XX } },
dc99065b
FB		 1008 { GRP4 },
1009 { GRP5 },
1010};
1011
bc51c5c9 1012static const struct dis386 dis386_twobyte[] = {
dc99065b
FB		 1013 /* 00 */
1014 { GRP6 },
1015 { GRP7 },
88103cfe
BS		 1016 { "larS", { Gv, Ew } },
1017 { "lslS", { Gv, Ew } },
1018 { "(bad)", { XX } },
1019 { "syscall", { XX } },
1020 { "clts", { XX } },
1021 { "sysretP", { XX } },
dc99065b 1022 /* 08 */
88103cfe
BS		 1023 { "invd", { XX } },
1024 { "wbinvd", { XX } },
1025 { "(bad)", { XX } },
1026 { "ud2a", { XX } },
1027 { "(bad)", { XX } },
bc51c5c9 1028 { GRPAMD },
88103cfe
BS		 1029 { "femms", { XX } },
1030 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
dc99065b 1031 /* 10 */
bc51c5c9
FB		 1032 { PREGRP8 },
1033 { PREGRP9 },
c2c73b42 1034 { PREGRP30 },
88103cfe
BS		 1035 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
1036 { "unpcklpX", { XM, EXq } },
1037 { "unpckhpX", { XM, EXq } },
c2c73b42 1038 { PREGRP31 },
88103cfe 1039 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
dc99065b 1040 /* 18 */
88103cfe
BS		 1041 { GRP16 },
1042 { "(bad)", { XX } },
1043 { "(bad)", { XX } },
1044 { "(bad)", { XX } },
1045 { "(bad)", { XX } },
1046 { "(bad)", { XX } },
1047 { "(bad)", { XX } },
1048 { "nopQ", { Ev } },
dc99065b 1049 /* 20 */
88103cfe
BS		 1050 { "movZ", { Rm, Cm } },
1051 { "movZ", { Rm, Dm } },
1052 { "movZ", { Cm, Rm } },
1053 { "movZ", { Dm, Rm } },
1054 { "movL", { Rd, Td } },
1055 { "(bad)", { XX } },
1056 { "movL", { Td, Rd } },
1057 { "(bad)", { XX } },
dc99065b 1058 /* 28 */
88103cfe
BS		 1059 { "movapX", { XM, EXx } },
1060 { "movapX", { EXx, XM } },
bc51c5c9 1061 { PREGRP2 },
88103cfe 1062 { PREGRP33 },
bc51c5c9
FB		 1063 { PREGRP4 },
1064 { PREGRP3 },
88103cfe
BS		 1065 { PREGRP93 },
1066 { PREGRP94 },
dc99065b 1067 /* 30 */
88103cfe
BS		 1068 { "wrmsr", { XX } },
1069 { "rdtsc", { XX } },
1070 { "rdmsr", { XX } },
1071 { "rdpmc", { XX } },
1072 { "sysenter", { XX } },
1073 { "sysexit", { XX } },
1074 { "(bad)", { XX } },
1075 { "(bad)", { XX } },
dc99065b 1076 /* 38 */
c2c73b42 1077 { THREE_BYTE_0 },
88103cfe 1078 { "(bad)", { XX } },
c2c73b42 1079 { THREE_BYTE_1 },
88103cfe
BS		 1080 { "(bad)", { XX } },
1081 { "(bad)", { XX } },
1082 { "(bad)", { XX } },
1083 { "(bad)", { XX } },
1084 { "(bad)", { XX } },
dc99065b 1085 /* 40 */
88103cfe
BS		 1086 { "cmovo", { Gv, Ev } },
1087 { "cmovno", { Gv, Ev } },
1088 { "cmovb", { Gv, Ev } },
1089 { "cmovae", { Gv, Ev } },
1090 { "cmove", { Gv, Ev } },
1091 { "cmovne", { Gv, Ev } },
1092 { "cmovbe", { Gv, Ev } },
1093 { "cmova", { Gv, Ev } },
dc99065b 1094 /* 48 */
88103cfe
BS		 1095 { "cmovs", { Gv, Ev } },
1096 { "cmovns", { Gv, Ev } },
1097 { "cmovp", { Gv, Ev } },
1098 { "cmovnp", { Gv, Ev } },
1099 { "cmovl", { Gv, Ev } },
1100 { "cmovge", { Gv, Ev } },
1101 { "cmovle", { Gv, Ev } },
1102 { "cmovg", { Gv, Ev } },
dc99065b 1103 /* 50 */
88103cfe 1104 { "movmskpX", { Gdq, XS } },
bc51c5c9
FB		 1105 { PREGRP13 },
1106 { PREGRP12 },
1107 { PREGRP11 },
88103cfe
BS		 1108 { "andpX", { XM, EXx } },
1109 { "andnpX", { XM, EXx } },
1110 { "orpX", { XM, EXx } },
1111 { "xorpX", { XM, EXx } },
dc99065b 1112 /* 58 */
bc51c5c9
FB		 1113 { PREGRP0 },
1114 { PREGRP10 },
1115 { PREGRP17 },
1116 { PREGRP16 },
1117 { PREGRP14 },
1118 { PREGRP7 },
1119 { PREGRP5 },
1120 { PREGRP6 },
dc99065b 1121 /* 60 */
88103cfe
BS		 1122 { PREGRP95 },
1123 { PREGRP96 },
1124 { PREGRP97 },
1125 { "packsswb", { MX, EM } },
1126 { "pcmpgtb", { MX, EM } },
1127 { "pcmpgtw", { MX, EM } },
1128 { "pcmpgtd", { MX, EM } },
1129 { "packuswb", { MX, EM } },
dc99065b 1130 /* 68 */
88103cfe
BS		 1131 { "punpckhbw", { MX, EM } },
1132 { "punpckhwd", { MX, EM } },
1133 { "punpckhdq", { MX, EM } },
1134 { "packssdw", { MX, EM } },
bc51c5c9
FB		 1135 { PREGRP26 },
1136 { PREGRP24 },
88103cfe 1137 { "movd", { MX, Edq } },
bc51c5c9 1138 { PREGRP19 },
dc99065b 1139 /* 70 */
bc51c5c9 1140 { PREGRP22 },
dc99065b 1141 { GRP12 },
88103cfe
BS		 1142 { GRP13 },
1143 { GRP14 },
1144 { "pcmpeqb", { MX, EM } },
1145 { "pcmpeqw", { MX, EM } },
1146 { "pcmpeqd", { MX, EM } },
1147 { "emms", { XX } },
dc99065b 1148 /* 78 */
88103cfe
BS		 1149 { PREGRP34 },
1150 { PREGRP35 },
1151 { "(bad)", { XX } },
1152 { "(bad)", { XX } },
c2c73b42
BS		 1153 { PREGRP28 },
1154 { PREGRP29 },
bc51c5c9
FB		 1155 { PREGRP23 },
1156 { PREGRP20 },
dc99065b 1157 /* 80 */
88103cfe
BS		 1158 { "joH", { Jv, XX, cond_jump_flag } },
1159 { "jnoH", { Jv, XX, cond_jump_flag } },
1160 { "jbH", { Jv, XX, cond_jump_flag } },
1161 { "jaeH", { Jv, XX, cond_jump_flag } },
1162 { "jeH", { Jv, XX, cond_jump_flag } },
1163 { "jneH", { Jv, XX, cond_jump_flag } },
1164 { "jbeH", { Jv, XX, cond_jump_flag } },
1165 { "jaH", { Jv, XX, cond_jump_flag } },
dc99065b 1166 /* 88 */
88103cfe
BS		 1167 { "jsH", { Jv, XX, cond_jump_flag } },
1168 { "jnsH", { Jv, XX, cond_jump_flag } },
1169 { "jpH", { Jv, XX, cond_jump_flag } },
1170 { "jnpH", { Jv, XX, cond_jump_flag } },
1171 { "jlH", { Jv, XX, cond_jump_flag } },
1172 { "jgeH", { Jv, XX, cond_jump_flag } },
1173 { "jleH", { Jv, XX, cond_jump_flag } },
1174 { "jgH", { Jv, XX, cond_jump_flag } },
dc99065b 1175 /* 90 */
88103cfe
BS		 1176 { "seto", { Eb } },
1177 { "setno", { Eb } },
1178 { "setb", { Eb } },
1179 { "setae", { Eb } },
1180 { "sete", { Eb } },
1181 { "setne", { Eb } },
1182 { "setbe", { Eb } },
1183 { "seta", { Eb } },
dc99065b 1184 /* 98 */
88103cfe
BS		 1185 { "sets", { Eb } },
1186 { "setns", { Eb } },
1187 { "setp", { Eb } },
1188 { "setnp", { Eb } },
1189 { "setl", { Eb } },
1190 { "setge", { Eb } },
1191 { "setle", { Eb } },
1192 { "setg", { Eb } },
dc99065b 1193 /* a0 */
88103cfe
BS		 1194 { "pushT", { fs } },
1195 { "popT", { fs } },
1196 { "cpuid", { XX } },
1197 { "btS", { Ev, Gv } },
1198 { "shldS", { Ev, Gv, Ib } },
1199 { "shldS", { Ev, Gv, CL } },
c2c73b42
BS		 1200 { GRPPADLCK2 },
1201 { GRPPADLCK1 },
dc99065b 1202 /* a8 */
88103cfe
BS		 1203 { "pushT", { gs } },
1204 { "popT", { gs } },
1205 { "rsm", { XX } },
1206 { "btsS", { Ev, Gv } },
1207 { "shrdS", { Ev, Gv, Ib } },
1208 { "shrdS", { Ev, Gv, CL } },
1209 { GRP15 },
1210 { "imulS", { Gv, Ev } },
dc99065b 1211 /* b0 */
88103cfe
BS		 1212 { "cmpxchgB", { Eb, Gb } },
1213 { "cmpxchgS", { Ev, Gv } },
1214 { "lssS", { Gv, Mp } },
1215 { "btrS", { Ev, Gv } },
1216 { "lfsS", { Gv, Mp } },
1217 { "lgsS", { Gv, Mp } },
1218 { "movz{bR|x|bR|x}", { Gv, Eb } },
1219 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
dc99065b 1220 /* b8 */
88103cfe
BS		 1221 { PREGRP37 },
1222 { "ud2b", { XX } },
dc99065b 1223 { GRP8 },
88103cfe
BS		 1224 { "btcS", { Ev, Gv } },
1225 { "bsfS", { Gv, Ev } },
1226 { PREGRP36 },
1227 { "movs{bR|x|bR|x}", { Gv, Eb } },
1228 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
dc99065b 1229 /* c0 */
88103cfe
BS		 1230 { "xaddB", { Eb, Gb } },
1231 { "xaddS", { Ev, Gv } },
bc51c5c9 1232 { PREGRP1 },
88103cfe
BS		 1233 { "movntiS", { Ev, Gv } },
1234 { "pinsrw", { MX, Edqw, Ib } },
1235 { "pextrw", { Gdq, MS, Ib } },
1236 { "shufpX", { XM, EXx, Ib } },
bc51c5c9 1237 { GRP9 },
dc99065b 1238 /* c8 */
88103cfe
BS		 1239 { "bswap", { RMeAX } },
1240 { "bswap", { RMeCX } },
1241 { "bswap", { RMeDX } },
1242 { "bswap", { RMeBX } },
1243 { "bswap", { RMeSP } },
1244 { "bswap", { RMeBP } },
1245 { "bswap", { RMeSI } },
1246 { "bswap", { RMeDI } },
dc99065b 1247 /* d0 */
c2c73b42 1248 { PREGRP27 },
88103cfe
BS		 1249 { "psrlw", { MX, EM } },
1250 { "psrld", { MX, EM } },
1251 { "psrlq", { MX, EM } },
1252 { "paddq", { MX, EM } },
1253 { "pmullw", { MX, EM } },
bc51c5c9 1254 { PREGRP21 },
88103cfe 1255 { "pmovmskb", { Gdq, MS } },
dc99065b 1256 /* d8 */
88103cfe
BS		 1257 { "psubusb", { MX, EM } },
1258 { "psubusw", { MX, EM } },
1259 { "pminub", { MX, EM } },
1260 { "pand", { MX, EM } },
1261 { "paddusb", { MX, EM } },
1262 { "paddusw", { MX, EM } },
1263 { "pmaxub", { MX, EM } },
1264 { "pandn", { MX, EM } },
dc99065b 1265 /* e0 */
88103cfe
BS		 1266 { "pavgb", { MX, EM } },
1267 { "psraw", { MX, EM } },
1268 { "psrad", { MX, EM } },
1269 { "pavgw", { MX, EM } },
1270 { "pmulhuw", { MX, EM } },
1271 { "pmulhw", { MX, EM } },
bc51c5c9
FB		 1272 { PREGRP15 },
1273 { PREGRP25 },
dc99065b 1274 /* e8 */
88103cfe
BS		 1275 { "psubsb", { MX, EM } },
1276 { "psubsw", { MX, EM } },
1277 { "pminsw", { MX, EM } },
1278 { "por", { MX, EM } },
1279 { "paddsb", { MX, EM } },
1280 { "paddsw", { MX, EM } },
1281 { "pmaxsw", { MX, EM } },
1282 { "pxor", { MX, EM } },
dc99065b 1283 /* f0 */
c2c73b42 1284 { PREGRP32 },
88103cfe
BS		 1285 { "psllw", { MX, EM } },
1286 { "pslld", { MX, EM } },
1287 { "psllq", { MX, EM } },
1288 { "pmuludq", { MX, EM } },
1289 { "pmaddwd", { MX, EM } },
1290 { "psadbw", { MX, EM } },
bc51c5c9 1291 { PREGRP18 },
dc99065b 1292 /* f8 */
88103cfe
BS		 1293 { "psubb", { MX, EM } },
1294 { "psubw", { MX, EM } },
1295 { "psubd", { MX, EM } },
1296 { "psubq", { MX, EM } },
1297 { "paddb", { MX, EM } },
1298 { "paddw", { MX, EM } },
1299 { "paddd", { MX, EM } },
1300 { "(bad)", { XX } },
dc99065b
FB		 1301};
1302
1303static const unsigned char onebyte_has_modrm[256] = {
bc51c5c9
FB		 1304 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1305 /* ------------------------------- */
1306 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1307 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1308 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1309 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1310 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1311 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1312 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1313 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1314 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1315 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1316 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1317 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1318 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1319 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1320 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1321 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1322 /* ------------------------------- */
1323 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
dc99065b
FB		 1324};
1325
1326static const unsigned char twobyte_has_modrm[256] = {
bc51c5c9
FB		 1327 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1328 /* ------------------------------- */
1329 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
88103cfe 1330 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
bc51c5c9 1331 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
c2c73b42 1332 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
dc99065b 1333 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
bc51c5c9
FB		 1334 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1335 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
c2c73b42 1336 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
dc99065b
FB		 1337 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1338 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
c2c73b42 1339 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
88103cfe 1340 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
dc99065b 1341 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
c2c73b42 1342 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
bc51c5c9 1343 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
c2c73b42 1344 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
bc51c5c9
FB		 1345 /* ------------------------------- */
1346 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1347};
1348
88103cfe 1349static const unsigned char twobyte_uses_DATA_prefix[256] = {
bc51c5c9
FB		 1350 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1351 /* ------------------------------- */
1352 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
c2c73b42 1353 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
88103cfe 1354 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
c2c73b42 1355 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
bc51c5c9
FB		 1356 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1357 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1358 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
88103cfe 1359 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
bc51c5c9
FB		 1360 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1361 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1362 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1363 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1364 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
c2c73b42 1365 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
bc51c5c9 1366 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
c2c73b42 1367 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
bc51c5c9
FB		 1368 /* ------------------------------- */
1369 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
dc99065b
FB		 1370};
1371
88103cfe
BS		 1372static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1373 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1374 /* ------------------------------- */
1375 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1376 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1377 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1378 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1379 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1380 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1381 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1382 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1383 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1384 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1385 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1386 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1387 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1388 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1389 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1390 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1391 /* ------------------------------- */
1392 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1393};
1394
1395static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1396 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1397 /* ------------------------------- */
1398 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1399 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1400 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1401 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1402 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1403 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1404 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1405 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1406 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1407 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1408 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1409 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1410 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1411 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1412 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1413 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1414 /* ------------------------------- */
1415 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1416};
1417
1418/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1419static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1420 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1421 /* ------------------------------- */
1422 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1423 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1424 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1425 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1426 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1427 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1428 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1429 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1430 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1431 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1432 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1433 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1434 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1435 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1436 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1437 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1438 /* ------------------------------- */
1439 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1440};
1441
1442/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1443static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1444 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1445 /* ------------------------------- */
1446 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1447 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1448 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1449 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1450 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1451 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1452 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1453 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1454 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1455 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1456 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1457 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1458 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1459 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1460 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1461 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1462 /* ------------------------------- */
1463 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1464};
1465
1466/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1467static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1468 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1469 /* ------------------------------- */
1470 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1471 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1472 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1473 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1474 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1475 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1476 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1477 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1478 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1479 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1480 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1481 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1482 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1483 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1484 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1485 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1486 /* ------------------------------- */
1487 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1488};
1489
1490/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1491static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1492 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1493 /* ------------------------------- */
1494 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1495 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1496 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1497 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1498 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1499 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1500 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1501 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1502 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1503 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1504 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1505 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1506 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1507 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1508 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1509 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1510 /* ------------------------------- */
1511 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1512};
1513
1514/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1515static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1516 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1517 /* ------------------------------- */
1518 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1519 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1520 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1521 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1522 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1523 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1524 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1525 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1526 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1527 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1528 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1529 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1530 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1531 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1532 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1533 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1534 /* ------------------------------- */
1535 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1536};
1537
1538/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1539static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1540 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1541 /* ------------------------------- */
1542 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1543 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1544 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1545 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1546 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1547 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1548 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1549 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1550 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1551 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1552 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1553 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1554 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1555 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1556 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1557 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1558 /* ------------------------------- */
1559 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1560};
1561
dc99065b
FB		 1562static char obuf[100];
1563static char *obufp;
1564static char scratchbuf[100];
1565static unsigned char *start_codep;
bc51c5c9 1566static unsigned char *insn_codep;
dc99065b
FB		 1567static unsigned char *codep;
1568static disassemble_info *the_info;
88103cfe
BS		 1569static struct
1570 {
1571 int mod;
1572 int reg;
1573 int rm;
1574 }
1575modrm;
bc51c5c9
FB		 1576static unsigned char need_modrm;
1577
1578/* If we are accessing mod/rm/reg without need_modrm set, then the
1579 values are stale. Hitting this abort likely indicates that you
1580 need to update onebyte_has_modrm or twobyte_has_modrm. */
1581#define MODRM_CHECK if (!need_modrm) abort ()
1582
7a786a46
BS		 1583static const char * const *names64;
1584static const char * const *names32;
1585static const char * const *names16;
1586static const char * const *names8;
1587static const char * const *names8rex;
1588static const char * const *names_seg;
1589static const char * const *index16;
bc51c5c9 1590
7a786a46 1591static const char * const intel_names64[] = {
bc51c5c9
FB		 1592 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1593 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1594};
7a786a46 1595static const char * const intel_names32[] = {
bc51c5c9
FB		 1596 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1597 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1598};
7a786a46 1599static const char * const intel_names16[] = {
bc51c5c9
FB		 1600 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1601 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1602};
7a786a46 1603static const char * const intel_names8[] = {
bc51c5c9
FB		 1604 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1605};
7a786a46 1606static const char * const intel_names8rex[] = {
bc51c5c9
FB		 1607 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1608 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1609};
7a786a46 1610static const char * const intel_names_seg[] = {
bc51c5c9
FB		 1611 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1612};
7a786a46 1613static const char * const intel_index16[] = {
bc51c5c9
FB		 1614 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1615};
dc99065b 1616
7a786a46 1617static const char * const att_names64[] = {
bc51c5c9
FB		 1618 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1619 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1620};
7a786a46 1621static const char * const att_names32[] = {
bc51c5c9
FB		 1622 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1623 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
dc99065b 1624};
7a786a46 1625static const char * const att_names16[] = {
bc51c5c9
FB		 1626 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1627 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
dc99065b 1628};
7a786a46 1629static const char * const att_names8[] = {
bc51c5c9 1630 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
dc99065b 1631};
7a786a46 1632static const char * const att_names8rex[] = {
bc51c5c9
FB		 1633 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1634 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
dc99065b 1635};
7a786a46 1636static const char * const att_names_seg[] = {
bc51c5c9
FB		 1637 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1638};
7a786a46 1639static const char * const att_index16[] = {
bc51c5c9 1640 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
dc99065b
FB		 1641};
1642
bc51c5c9 1643static const struct dis386 grps[][8] = {
88103cfe
BS		 1644 /* GRP1a */
1645 {
1646 { "popU", { stackEv } },
1647 { "(bad)", { XX } },
1648 { "(bad)", { XX } },
1649 { "(bad)", { XX } },
1650 { "(bad)", { XX } },
1651 { "(bad)", { XX } },
1652 { "(bad)", { XX } },
1653 { "(bad)", { XX } },
1654 },
dc99065b
FB		 1655 /* GRP1b */
1656 {
88103cfe
BS		 1657 { "addA", { Eb, Ib } },
1658 { "orA", { Eb, Ib } },
1659 { "adcA", { Eb, Ib } },
1660 { "sbbA", { Eb, Ib } },
1661 { "andA", { Eb, Ib } },
1662 { "subA", { Eb, Ib } },
1663 { "xorA", { Eb, Ib } },
1664 { "cmpA", { Eb, Ib } },
dc99065b
FB		 1665 },
1666 /* GRP1S */
1667 {
88103cfe
BS		 1668 { "addQ", { Ev, Iv } },
1669 { "orQ", { Ev, Iv } },
1670 { "adcQ", { Ev, Iv } },
1671 { "sbbQ", { Ev, Iv } },
1672 { "andQ", { Ev, Iv } },
1673 { "subQ", { Ev, Iv } },
1674 { "xorQ", { Ev, Iv } },
1675 { "cmpQ", { Ev, Iv } },
dc99065b
FB		 1676 },
1677 /* GRP1Ss */
1678 {
88103cfe
BS		 1679 { "addQ", { Ev, sIb } },
1680 { "orQ", { Ev, sIb } },
1681 { "adcQ", { Ev, sIb } },
1682 { "sbbQ", { Ev, sIb } },
1683 { "andQ", { Ev, sIb } },
1684 { "subQ", { Ev, sIb } },
1685 { "xorQ", { Ev, sIb } },
1686 { "cmpQ", { Ev, sIb } },
dc99065b
FB		 1687 },
1688 /* GRP2b */
1689 {
88103cfe
BS		 1690 { "rolA", { Eb, Ib } },
1691 { "rorA", { Eb, Ib } },
1692 { "rclA", { Eb, Ib } },
1693 { "rcrA", { Eb, Ib } },
1694 { "shlA", { Eb, Ib } },
1695 { "shrA", { Eb, Ib } },
1696 { "(bad)", { XX } },
1697 { "sarA", { Eb, Ib } },
dc99065b
FB		 1698 },
1699 /* GRP2S */
1700 {
88103cfe
BS		 1701 { "rolQ", { Ev, Ib } },
1702 { "rorQ", { Ev, Ib } },
1703 { "rclQ", { Ev, Ib } },
1704 { "rcrQ", { Ev, Ib } },
1705 { "shlQ", { Ev, Ib } },
1706 { "shrQ", { Ev, Ib } },
1707 { "(bad)", { XX } },
1708 { "sarQ", { Ev, Ib } },
dc99065b
FB		 1709 },
1710 /* GRP2b_one */
1711 {
88103cfe
BS		 1712 { "rolA", { Eb, I1 } },
1713 { "rorA", { Eb, I1 } },
1714 { "rclA", { Eb, I1 } },
1715 { "rcrA", { Eb, I1 } },
1716 { "shlA", { Eb, I1 } },
1717 { "shrA", { Eb, I1 } },
1718 { "(bad)", { XX } },
1719 { "sarA", { Eb, I1 } },
dc99065b
FB		 1720 },
1721 /* GRP2S_one */
1722 {
88103cfe
BS		 1723 { "rolQ", { Ev, I1 } },
1724 { "rorQ", { Ev, I1 } },
1725 { "rclQ", { Ev, I1 } },
1726 { "rcrQ", { Ev, I1 } },
1727 { "shlQ", { Ev, I1 } },
1728 { "shrQ", { Ev, I1 } },
1729 { "(bad)", { XX } },
1730 { "sarQ", { Ev, I1 } },
dc99065b
FB		 1731 },
1732 /* GRP2b_cl */
1733 {
88103cfe
BS		 1734 { "rolA", { Eb, CL } },
1735 { "rorA", { Eb, CL } },
1736 { "rclA", { Eb, CL } },
1737 { "rcrA", { Eb, CL } },
1738 { "shlA", { Eb, CL } },
1739 { "shrA", { Eb, CL } },
1740 { "(bad)", { XX } },
1741 { "sarA", { Eb, CL } },
dc99065b
FB		 1742 },
1743 /* GRP2S_cl */
1744 {
88103cfe
BS		 1745 { "rolQ", { Ev, CL } },
1746 { "rorQ", { Ev, CL } },
1747 { "rclQ", { Ev, CL } },
1748 { "rcrQ", { Ev, CL } },
1749 { "shlQ", { Ev, CL } },
1750 { "shrQ", { Ev, CL } },
1751 { "(bad)", { XX } },
1752 { "sarQ", { Ev, CL } },
dc99065b
FB		 1753 },
1754 /* GRP3b */
1755 {
88103cfe
BS		 1756 { "testA", { Eb, Ib } },
1757 { "(bad)", { Eb } },
1758 { "notA", { Eb } },
1759 { "negA", { Eb } },
1760 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1761 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1762 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1763 { "idivA", { Eb } }, /* and idiv for consistency. */
dc99065b
FB		 1764 },
1765 /* GRP3S */
1766 {
88103cfe
BS		 1767 { "testQ", { Ev, Iv } },
1768 { "(bad)", { XX } },
1769 { "notQ", { Ev } },
1770 { "negQ", { Ev } },
1771 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1772 { "imulQ", { Ev } },
1773 { "divQ", { Ev } },
1774 { "idivQ", { Ev } },
dc99065b
FB		 1775 },
1776 /* GRP4 */
1777 {
88103cfe
BS		 1778 { "incA", { Eb } },
1779 { "decA", { Eb } },
1780 { "(bad)", { XX } },
1781 { "(bad)", { XX } },
1782 { "(bad)", { XX } },
1783 { "(bad)", { XX } },
1784 { "(bad)", { XX } },
1785 { "(bad)", { XX } },
dc99065b
FB		 1786 },
1787 /* GRP5 */
1788 {
88103cfe
BS		 1789 { "incQ", { Ev } },
1790 { "decQ", { Ev } },
1791 { "callT", { indirEv } },
1792 { "JcallT", { indirEp } },
1793 { "jmpT", { indirEv } },
1794 { "JjmpT", { indirEp } },
1795 { "pushU", { stackEv } },
1796 { "(bad)", { XX } },
dc99065b
FB		 1797 },
1798 /* GRP6 */
1799 {
88103cfe
BS		 1800 { "sldtD", { Sv } },
1801 { "strD", { Sv } },
1802 { "lldt", { Ew } },
1803 { "ltr", { Ew } },
1804 { "verr", { Ew } },
1805 { "verw", { Ew } },
1806 { "(bad)", { XX } },
1807 { "(bad)", { XX } },
dc99065b
FB		 1808 },
1809 /* GRP7 */
1810 {
88103cfe
BS		 1811 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1812 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1813 { "lgdt{Q|Q||}", { M } },
1814 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1815 { "smswD", { Sv } },
1816 { "(bad)", { XX } },
1817 { "lmsw", { Ew } },
1818 { "invlpg", { { INVLPG_Fixup, w_mode } } },
dc99065b
FB		 1819 },
1820 /* GRP8 */
1821 {
88103cfe
BS		 1822 { "(bad)", { XX } },
1823 { "(bad)", { XX } },
1824 { "(bad)", { XX } },
1825 { "(bad)", { XX } },
1826 { "btQ", { Ev, Ib } },
1827 { "btsQ", { Ev, Ib } },
1828 { "btrQ", { Ev, Ib } },
1829 { "btcQ", { Ev, Ib } },
dc99065b
FB		 1830 },
1831 /* GRP9 */
1832 {
88103cfe
BS		 1833 { "(bad)", { XX } },
1834 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1835 { "(bad)", { XX } },
1836 { "(bad)", { XX } },
1837 { "(bad)", { XX } },
1838 { "(bad)", { XX } },
1839 { "", { VM } }, /* See OP_VMX. */
1840 { "vmptrst", { Mq } },
1841 },
1842 /* GRP11_C6 */
1843 {
1844 { "movA", { Eb, Ib } },
1845 { "(bad)", { XX } },
1846 { "(bad)", { XX } },
1847 { "(bad)", { XX } },
1848 { "(bad)", { XX } },
1849 { "(bad)", { XX } },
1850 { "(bad)", { XX } },
1851 { "(bad)", { XX } },
1852 },
1853 /* GRP11_C7 */
1854 {
1855 { "movQ", { Ev, Iv } },
1856 { "(bad)", { XX } },
1857 { "(bad)", { XX } },
1858 { "(bad)", { XX } },
1859 { "(bad)", { XX } },
1860 { "(bad)", { XX } },
1861 { "(bad)", { XX } },
1862 { "(bad)", { XX } },
dc99065b
FB		 1863 },
1864 /* GRP12 */
1865 {
88103cfe
BS		 1866 { "(bad)", { XX } },
1867 { "(bad)", { XX } },
1868 { "psrlw", { MS, Ib } },
1869 { "(bad)", { XX } },
1870 { "psraw", { MS, Ib } },
1871 { "(bad)", { XX } },
1872 { "psllw", { MS, Ib } },
1873 { "(bad)", { XX } },
bc51c5c9
FB		 1874 },
1875 /* GRP13 */
1876 {
88103cfe
BS		 1877 { "(bad)", { XX } },
1878 { "(bad)", { XX } },
1879 { "psrld", { MS, Ib } },
1880 { "(bad)", { XX } },
1881 { "psrad", { MS, Ib } },
1882 { "(bad)", { XX } },
1883 { "pslld", { MS, Ib } },
1884 { "(bad)", { XX } },
bc51c5c9
FB		 1885 },
1886 /* GRP14 */
1887 {
88103cfe
BS		 1888 { "(bad)", { XX } },
1889 { "(bad)", { XX } },
1890 { "psrlq", { MS, Ib } },
1891 { "psrldq", { MS, Ib } },
1892 { "(bad)", { XX } },
1893 { "(bad)", { XX } },
1894 { "psllq", { MS, Ib } },
1895 { "pslldq", { MS, Ib } },
1896 },
1897 /* GRP15 */
1898 {
1899 { "fxsave", { Ev } },
1900 { "fxrstor", { Ev } },
1901 { "ldmxcsr", { Ev } },
1902 { "stmxcsr", { Ev } },
1903 { "(bad)", { XX } },
1904 { "lfence", { { OP_0fae, 0 } } },
1905 { "mfence", { { OP_0fae, 0 } } },
1906 { "clflush", { { OP_0fae, 0 } } },
1907 },
1908 /* GRP16 */
1909 {
1910 { "prefetchnta", { Ev } },
1911 { "prefetcht0", { Ev } },
1912 { "prefetcht1", { Ev } },
1913 { "prefetcht2", { Ev } },
1914 { "(bad)", { XX } },
1915 { "(bad)", { XX } },
1916 { "(bad)", { XX } },
1917 { "(bad)", { XX } },
bc51c5c9
FB		 1918 },
1919 /* GRPAMD */
1920 {
88103cfe
BS		 1921 { "prefetch", { Eb } },
1922 { "prefetchw", { Eb } },
1923 { "(bad)", { XX } },
1924 { "(bad)", { XX } },
1925 { "(bad)", { XX } },
1926 { "(bad)", { XX } },
1927 { "(bad)", { XX } },
1928 { "(bad)", { XX } },
c2c73b42
BS		 1929 },
1930 /* GRPPADLCK1 */
1931 {
88103cfe
BS		 1932 { "xstore-rng", { { OP_0f07, 0 } } },
1933 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1934 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1935 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1936 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1937 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1938 { "(bad)", { { OP_0f07, 0 } } },
1939 { "(bad)", { { OP_0f07, 0 } } },
c2c73b42
BS		 1940 },
1941 /* GRPPADLCK2 */
1942 {
88103cfe
BS		 1943 { "montmul", { { OP_0f07, 0 } } },
1944 { "xsha1", { { OP_0f07, 0 } } },
1945 { "xsha256", { { OP_0f07, 0 } } },
1946 { "(bad)", { { OP_0f07, 0 } } },
1947 { "(bad)", { { OP_0f07, 0 } } },
1948 { "(bad)", { { OP_0f07, 0 } } },
1949 { "(bad)", { { OP_0f07, 0 } } },
1950 { "(bad)", { { OP_0f07, 0 } } },
dc99065b
FB		 1951 }
1952};
1953
bc51c5c9
FB		 1954static const struct dis386 prefix_user_table[][4] = {
1955 /* PREGRP0 */
1956 {
88103cfe
BS		 1957 { "addps", { XM, EXx } },
1958 { "addss", { XM, EXd } },
1959 { "addpd", { XM, EXx } },
1960 { "addsd", { XM, EXq } },
bc51c5c9
FB		 1961 },
1962 /* PREGRP1 */
1963 {
88103cfe
BS		 1964 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1965 { "", { XM, EXx, OPSIMD } },
1966 { "", { XM, EXx, OPSIMD } },
1967 { "", { XM, EXx, OPSIMD } },
bc51c5c9
FB		 1968 },
1969 /* PREGRP2 */
1970 {
88103cfe
BS		 1971 { "cvtpi2ps", { XM, EMC } },
1972 { "cvtsi2ssY", { XM, Ev } },
1973 { "cvtpi2pd", { XM, EMC } },
1974 { "cvtsi2sdY", { XM, Ev } },
bc51c5c9
FB		 1975 },
1976 /* PREGRP3 */
1977 {
88103cfe
BS		 1978 { "cvtps2pi", { MXC, EXx } },
1979 { "cvtss2siY", { Gv, EXx } },
1980 { "cvtpd2pi", { MXC, EXx } },
1981 { "cvtsd2siY", { Gv, EXx } },
bc51c5c9
FB		 1982 },
1983 /* PREGRP4 */
1984 {
88103cfe
BS		 1985 { "cvttps2pi", { MXC, EXx } },
1986 { "cvttss2siY", { Gv, EXx } },
1987 { "cvttpd2pi", { MXC, EXx } },
1988 { "cvttsd2siY", { Gv, EXx } },
bc51c5c9
FB		 1989 },
1990 /* PREGRP5 */
1991 {
88103cfe
BS		 1992 { "divps", { XM, EXx } },
1993 { "divss", { XM, EXx } },
1994 { "divpd", { XM, EXx } },
1995 { "divsd", { XM, EXx } },
bc51c5c9
FB		 1996 },
1997 /* PREGRP6 */
1998 {
88103cfe
BS		 1999 { "maxps", { XM, EXx } },
2000 { "maxss", { XM, EXx } },
2001 { "maxpd", { XM, EXx } },
2002 { "maxsd", { XM, EXx } },
bc51c5c9
FB		 2003 },
2004 /* PREGRP7 */
2005 {
88103cfe
BS		 2006 { "minps", { XM, EXx } },
2007 { "minss", { XM, EXx } },
2008 { "minpd", { XM, EXx } },
2009 { "minsd", { XM, EXx } },
bc51c5c9
FB		 2010 },
2011 /* PREGRP8 */
2012 {
88103cfe
BS		 2013 { "movups", { XM, EXx } },
2014 { "movss", { XM, EXx } },
2015 { "movupd", { XM, EXx } },
2016 { "movsd", { XM, EXx } },
bc51c5c9
FB		 2017 },
2018 /* PREGRP9 */
2019 {
88103cfe
BS		 2020 { "movups", { EXx, XM } },
2021 { "movss", { EXx, XM } },
2022 { "movupd", { EXx, XM } },
2023 { "movsd", { EXx, XM } },
bc51c5c9
FB		 2024 },
2025 /* PREGRP10 */
2026 {
88103cfe
BS		 2027 { "mulps", { XM, EXx } },
2028 { "mulss", { XM, EXx } },
2029 { "mulpd", { XM, EXx } },
2030 { "mulsd", { XM, EXx } },
bc51c5c9
FB		 2031 },
2032 /* PREGRP11 */
2033 {
88103cfe
BS		 2034 { "rcpps", { XM, EXx } },
2035 { "rcpss", { XM, EXx } },
2036 { "(bad)", { XM, EXx } },
2037 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2038 },
2039 /* PREGRP12 */
2040 {
88103cfe
BS		 2041 { "rsqrtps",{ XM, EXx } },
2042 { "rsqrtss",{ XM, EXx } },
2043 { "(bad)", { XM, EXx } },
2044 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2045 },
2046 /* PREGRP13 */
2047 {
88103cfe
BS		 2048 { "sqrtps", { XM, EXx } },
2049 { "sqrtss", { XM, EXx } },
2050 { "sqrtpd", { XM, EXx } },
2051 { "sqrtsd", { XM, EXx } },
bc51c5c9
FB		 2052 },
2053 /* PREGRP14 */
2054 {
88103cfe
BS		 2055 { "subps", { XM, EXx } },
2056 { "subss", { XM, EXx } },
2057 { "subpd", { XM, EXx } },
2058 { "subsd", { XM, EXx } },
bc51c5c9
FB		 2059 },
2060 /* PREGRP15 */
2061 {
88103cfe
BS		 2062 { "(bad)", { XM, EXx } },
2063 { "cvtdq2pd", { XM, EXq } },
2064 { "cvttpd2dq", { XM, EXx } },
2065 { "cvtpd2dq", { XM, EXx } },
bc51c5c9
FB		 2066 },
2067 /* PREGRP16 */
2068 {
88103cfe
BS		 2069 { "cvtdq2ps", { XM, EXx } },
2070 { "cvttps2dq", { XM, EXx } },
2071 { "cvtps2dq", { XM, EXx } },
2072 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2073 },
2074 /* PREGRP17 */
2075 {
88103cfe
BS		 2076 { "cvtps2pd", { XM, EXq } },
2077 { "cvtss2sd", { XM, EXx } },
2078 { "cvtpd2ps", { XM, EXx } },
2079 { "cvtsd2ss", { XM, EXx } },
bc51c5c9
FB		 2080 },
2081 /* PREGRP18 */
2082 {
88103cfe
BS		 2083 { "maskmovq", { MX, MS } },
2084 { "(bad)", { XM, EXx } },
2085 { "maskmovdqu", { XM, XS } },
2086 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2087 },
2088 /* PREGRP19 */
2089 {
88103cfe
BS		 2090 { "movq", { MX, EM } },
2091 { "movdqu", { XM, EXx } },
2092 { "movdqa", { XM, EXx } },
2093 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2094 },
2095 /* PREGRP20 */
2096 {
88103cfe
BS		 2097 { "movq", { EM, MX } },
2098 { "movdqu", { EXx, XM } },
2099 { "movdqa", { EXx, XM } },
2100 { "(bad)", { EXx, XM } },
bc51c5c9
FB		 2101 },
2102 /* PREGRP21 */
2103 {
88103cfe
BS		 2104 { "(bad)", { EXx, XM } },
2105 { "movq2dq",{ XM, MS } },
2106 { "movq", { EXx, XM } },
2107 { "movdq2q",{ MX, XS } },
bc51c5c9
FB		 2108 },
2109 /* PREGRP22 */
2110 {
88103cfe
BS		 2111 { "pshufw", { MX, EM, Ib } },
2112 { "pshufhw",{ XM, EXx, Ib } },
2113 { "pshufd", { XM, EXx, Ib } },
2114 { "pshuflw",{ XM, EXx, Ib } },
bc51c5c9
FB		 2115 },
2116 /* PREGRP23 */
2117 {
88103cfe
BS		 2118 { "movd", { Edq, MX } },
2119 { "movq", { XM, EXx } },
2120 { "movd", { Edq, XM } },
2121 { "(bad)", { Ed, XM } },
bc51c5c9
FB		 2122 },
2123 /* PREGRP24 */
2124 {
88103cfe
BS		 2125 { "(bad)", { MX, EXx } },
2126 { "(bad)", { XM, EXx } },
2127 { "punpckhqdq", { XM, EXx } },
2128 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2129 },
2130 /* PREGRP25 */
2131 {
88103cfe
BS		 2132 { "movntq", { EM, MX } },
2133 { "(bad)", { EM, XM } },
2134 { "movntdq",{ EM, XM } },
2135 { "(bad)", { EM, XM } },
bc51c5c9
FB		 2136 },
2137 /* PREGRP26 */
2138 {
88103cfe
BS		 2139 { "(bad)", { MX, EXx } },
2140 { "(bad)", { XM, EXx } },
2141 { "punpcklqdq", { XM, EXx } },
2142 { "(bad)", { XM, EXx } },
bc51c5c9 2143 },
c2c73b42
BS		 2144 /* PREGRP27 */
2145 {
88103cfe
BS		 2146 { "(bad)", { MX, EXx } },
2147 { "(bad)", { XM, EXx } },
2148 { "addsubpd", { XM, EXx } },
2149 { "addsubps", { XM, EXx } },
c2c73b42
BS		 2150 },
2151 /* PREGRP28 */
2152 {
88103cfe
BS		 2153 { "(bad)", { MX, EXx } },
2154 { "(bad)", { XM, EXx } },
2155 { "haddpd", { XM, EXx } },
2156 { "haddps", { XM, EXx } },
c2c73b42
BS		 2157 },
2158 /* PREGRP29 */
2159 {
88103cfe
BS		 2160 { "(bad)", { MX, EXx } },
2161 { "(bad)", { XM, EXx } },
2162 { "hsubpd", { XM, EXx } },
2163 { "hsubps", { XM, EXx } },
c2c73b42
BS		 2164 },
2165 /* PREGRP30 */
2166 {
88103cfe
BS		 2167 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2168 { "movsldup", { XM, EXx } },
2169 { "movlpd", { XM, EXq } },
2170 { "movddup", { XM, EXq } },
c2c73b42
BS		 2171 },
2172 /* PREGRP31 */
2173 {
88103cfe
BS		 2174 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2175 { "movshdup", { XM, EXx } },
2176 { "movhpd", { XM, EXq } },
2177 { "(bad)", { XM, EXq } },
c2c73b42
BS		 2178 },
2179 /* PREGRP32 */
2180 {
88103cfe
BS		 2181 { "(bad)", { XM, EXx } },
2182 { "(bad)", { XM, EXx } },
2183 { "(bad)", { XM, EXx } },
2184 { "lddqu", { XM, M } },
2185 },
2186 /* PREGRP33 */
2187 {
2188 {"movntps", { Ev, XM } },
2189 {"movntss", { Ev, XM } },
2190 {"movntpd", { Ev, XM } },
2191 {"movntsd", { Ev, XM } },
2192 },
2193
2194 /* PREGRP34 */
2195 {
2196 {"vmread", { Em, Gm } },
2197 {"(bad)", { XX } },
2198 {"extrq", { XS, Ib, Ib } },
2199 {"insertq", { XM, XS, Ib, Ib } },
2200 },
2201
2202 /* PREGRP35 */
2203 {
2204 {"vmwrite", { Gm, Em } },
2205 {"(bad)", { XX } },
2206 {"extrq", { XM, XS } },
2207 {"insertq", { XM, XS } },
2208 },
2209
2210 /* PREGRP36 */
2211 {
2212 { "bsrS", { Gv, Ev } },
2213 { "lzcntS", { Gv, Ev } },
2214 { "bsrS", { Gv, Ev } },
2215 { "(bad)", { XX } },
2216 },
2217
2218 /* PREGRP37 */
2219 {
2220 { "(bad)", { XX } },
2221 { "popcntS", { Gv, Ev } },
2222 { "(bad)", { XX } },
2223 { "(bad)", { XX } },
2224 },
2225
2226 /* PREGRP38 */
2227 {
2228 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2229 { "pause", { XX } },
2230 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2231 { "(bad)", { XX } },
2232 },
2233
2234 /* PREGRP39 */
2235 {
2236 { "(bad)", { XX } },
2237 { "(bad)", { XX } },
2238 { "pblendvb", {XM, EXx, XMM0 } },
2239 { "(bad)", { XX } },
2240 },
2241
2242 /* PREGRP40 */
2243 {
2244 { "(bad)", { XX } },
2245 { "(bad)", { XX } },
2246 { "blendvps", {XM, EXx, XMM0 } },
2247 { "(bad)", { XX } },
2248 },
2249
2250 /* PREGRP41 */
2251 {
2252 { "(bad)", { XX } },
2253 { "(bad)", { XX } },
2254 { "blendvpd", { XM, EXx, XMM0 } },
2255 { "(bad)", { XX } },
2256 },
2257
2258 /* PREGRP42 */
2259 {
2260 { "(bad)", { XX } },
2261 { "(bad)", { XX } },
2262 { "ptest", { XM, EXx } },
2263 { "(bad)", { XX } },
2264 },
2265
2266 /* PREGRP43 */
2267 {
2268 { "(bad)", { XX } },
2269 { "(bad)", { XX } },
2270 { "pmovsxbw", { XM, EXx } },
2271 { "(bad)", { XX } },
2272 },
2273
2274 /* PREGRP44 */
2275 {
2276 { "(bad)", { XX } },
2277 { "(bad)", { XX } },
2278 { "pmovsxbd", { XM, EXx } },
2279 { "(bad)", { XX } },
2280 },
2281
2282 /* PREGRP45 */
2283 {
2284 { "(bad)", { XX } },
2285 { "(bad)", { XX } },
2286 { "pmovsxbq", { XM, EXx } },
2287 { "(bad)", { XX } },
2288 },
2289
2290 /* PREGRP46 */
2291 {
2292 { "(bad)", { XX } },
2293 { "(bad)", { XX } },
2294 { "pmovsxwd", { XM, EXx } },
2295 { "(bad)", { XX } },
2296 },
2297
2298 /* PREGRP47 */
2299 {
2300 { "(bad)", { XX } },
2301 { "(bad)", { XX } },
2302 { "pmovsxwq", { XM, EXx } },
2303 { "(bad)", { XX } },
2304 },
2305
2306 /* PREGRP48 */
2307 {
2308 { "(bad)", { XX } },
2309 { "(bad)", { XX } },
2310 { "pmovsxdq", { XM, EXx } },
2311 { "(bad)", { XX } },
2312 },
2313
2314 /* PREGRP49 */
2315 {
2316 { "(bad)", { XX } },
2317 { "(bad)", { XX } },
2318 { "pmuldq", { XM, EXx } },
2319 { "(bad)", { XX } },
2320 },
2321
2322 /* PREGRP50 */
2323 {
2324 { "(bad)", { XX } },
2325 { "(bad)", { XX } },
2326 { "pcmpeqq", { XM, EXx } },
2327 { "(bad)", { XX } },
2328 },
2329
2330 /* PREGRP51 */
2331 {
2332 { "(bad)", { XX } },
2333 { "(bad)", { XX } },
2334 { "movntdqa", { XM, EM } },
2335 { "(bad)", { XX } },
2336 },
2337
2338 /* PREGRP52 */
2339 {
2340 { "(bad)", { XX } },
2341 { "(bad)", { XX } },
2342 { "packusdw", { XM, EXx } },
2343 { "(bad)", { XX } },
2344 },
2345
2346 /* PREGRP53 */
2347 {
2348 { "(bad)", { XX } },
2349 { "(bad)", { XX } },
2350 { "pmovzxbw", { XM, EXx } },
2351 { "(bad)", { XX } },
2352 },
2353
2354 /* PREGRP54 */
2355 {
2356 { "(bad)", { XX } },
2357 { "(bad)", { XX } },
2358 { "pmovzxbd", { XM, EXx } },
2359 { "(bad)", { XX } },
2360 },
2361
2362 /* PREGRP55 */
2363 {
2364 { "(bad)", { XX } },
2365 { "(bad)", { XX } },
2366 { "pmovzxbq", { XM, EXx } },
2367 { "(bad)", { XX } },
2368 },
2369
2370 /* PREGRP56 */
2371 {
2372 { "(bad)", { XX } },
2373 { "(bad)", { XX } },
2374 { "pmovzxwd", { XM, EXx } },
2375 { "(bad)", { XX } },
2376 },
2377
2378 /* PREGRP57 */
2379 {
2380 { "(bad)", { XX } },
2381 { "(bad)", { XX } },
2382 { "pmovzxwq", { XM, EXx } },
2383 { "(bad)", { XX } },
2384 },
2385
2386 /* PREGRP58 */
2387 {
2388 { "(bad)", { XX } },
2389 { "(bad)", { XX } },
2390 { "pmovzxdq", { XM, EXx } },
2391 { "(bad)", { XX } },
2392 },
2393
2394 /* PREGRP59 */
2395 {
2396 { "(bad)", { XX } },
2397 { "(bad)", { XX } },
2398 { "pminsb", { XM, EXx } },
2399 { "(bad)", { XX } },
2400 },
2401
2402 /* PREGRP60 */
2403 {
2404 { "(bad)", { XX } },
2405 { "(bad)", { XX } },
2406 { "pminsd", { XM, EXx } },
2407 { "(bad)", { XX } },
2408 },
2409
2410 /* PREGRP61 */
2411 {
2412 { "(bad)", { XX } },
2413 { "(bad)", { XX } },
2414 { "pminuw", { XM, EXx } },
2415 { "(bad)", { XX } },
2416 },
2417
2418 /* PREGRP62 */
2419 {
2420 { "(bad)", { XX } },
2421 { "(bad)", { XX } },
2422 { "pminud", { XM, EXx } },
2423 { "(bad)", { XX } },
2424 },
2425
2426 /* PREGRP63 */
2427 {
2428 { "(bad)", { XX } },
2429 { "(bad)", { XX } },
2430 { "pmaxsb", { XM, EXx } },
2431 { "(bad)", { XX } },
2432 },
2433
2434 /* PREGRP64 */
2435 {
2436 { "(bad)", { XX } },
2437 { "(bad)", { XX } },
2438 { "pmaxsd", { XM, EXx } },
2439 { "(bad)", { XX } },
2440 },
2441
2442 /* PREGRP65 */
2443 {
2444 { "(bad)", { XX } },
2445 { "(bad)", { XX } },
2446 { "pmaxuw", { XM, EXx } },
2447 { "(bad)", { XX } },
2448 },
2449
2450 /* PREGRP66 */
2451 {
2452 { "(bad)", { XX } },
2453 { "(bad)", { XX } },
2454 { "pmaxud", { XM, EXx } },
2455 { "(bad)", { XX } },
2456 },
2457
2458 /* PREGRP67 */
2459 {
2460 { "(bad)", { XX } },
2461 { "(bad)", { XX } },
2462 { "pmulld", { XM, EXx } },
2463 { "(bad)", { XX } },
2464 },
2465
2466 /* PREGRP68 */
2467 {
2468 { "(bad)", { XX } },
2469 { "(bad)", { XX } },
2470 { "phminposuw", { XM, EXx } },
2471 { "(bad)", { XX } },
2472 },
2473
2474 /* PREGRP69 */
2475 {
2476 { "(bad)", { XX } },
2477 { "(bad)", { XX } },
2478 { "roundps", { XM, EXx, Ib } },
2479 { "(bad)", { XX } },
2480 },
2481
2482 /* PREGRP70 */
2483 {
2484 { "(bad)", { XX } },
2485 { "(bad)", { XX } },
2486 { "roundpd", { XM, EXx, Ib } },
2487 { "(bad)", { XX } },
2488 },
2489
2490 /* PREGRP71 */
2491 {
2492 { "(bad)", { XX } },
2493 { "(bad)", { XX } },
2494 { "roundss", { XM, EXx, Ib } },
2495 { "(bad)", { XX } },
2496 },
2497
2498 /* PREGRP72 */
2499 {
2500 { "(bad)", { XX } },
2501 { "(bad)", { XX } },
2502 { "roundsd", { XM, EXx, Ib } },
2503 { "(bad)", { XX } },
2504 },
2505
2506 /* PREGRP73 */
2507 {
2508 { "(bad)", { XX } },
2509 { "(bad)", { XX } },
2510 { "blendps", { XM, EXx, Ib } },
2511 { "(bad)", { XX } },
2512 },
2513
2514 /* PREGRP74 */
2515 {
2516 { "(bad)", { XX } },
2517 { "(bad)", { XX } },
2518 { "blendpd", { XM, EXx, Ib } },
2519 { "(bad)", { XX } },
2520 },
2521
2522 /* PREGRP75 */
2523 {
2524 { "(bad)", { XX } },
2525 { "(bad)", { XX } },
2526 { "pblendw", { XM, EXx, Ib } },
2527 { "(bad)", { XX } },
2528 },
2529
2530 /* PREGRP76 */
2531 {
2532 { "(bad)", { XX } },
2533 { "(bad)", { XX } },
2534 { "pextrb", { Edqb, XM, Ib } },
2535 { "(bad)", { XX } },
2536 },
2537
2538 /* PREGRP77 */
2539 {
2540 { "(bad)", { XX } },
2541 { "(bad)", { XX } },
2542 { "pextrw", { Edqw, XM, Ib } },
2543 { "(bad)", { XX } },
2544 },
2545
2546 /* PREGRP78 */
2547 {
2548 { "(bad)", { XX } },
2549 { "(bad)", { XX } },
2550 { "pextrK", { Edq, XM, Ib } },
2551 { "(bad)", { XX } },
2552 },
2553
2554 /* PREGRP79 */
2555 {
2556 { "(bad)", { XX } },
2557 { "(bad)", { XX } },
2558 { "extractps", { Edqd, XM, Ib } },
2559 { "(bad)", { XX } },
2560 },
2561
2562 /* PREGRP80 */
2563 {
2564 { "(bad)", { XX } },
2565 { "(bad)", { XX } },
2566 { "pinsrb", { XM, Edqb, Ib } },
2567 { "(bad)", { XX } },
2568 },
2569
2570 /* PREGRP81 */
2571 {
2572 { "(bad)", { XX } },
2573 { "(bad)", { XX } },
2574 { "insertps", { XM, EXx, Ib } },
2575 { "(bad)", { XX } },
2576 },
2577
2578 /* PREGRP82 */
2579 {
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2582 { "pinsrK", { XM, Edq, Ib } },
2583 { "(bad)", { XX } },
2584 },
2585
2586 /* PREGRP83 */
2587 {
2588 { "(bad)", { XX } },
2589 { "(bad)", { XX } },
2590 { "dpps", { XM, EXx, Ib } },
2591 { "(bad)", { XX } },
2592 },
2593
2594 /* PREGRP84 */
2595 {
2596 { "(bad)", { XX } },
2597 { "(bad)", { XX } },
2598 { "dppd", { XM, EXx, Ib } },
2599 { "(bad)", { XX } },
2600 },
2601
2602 /* PREGRP85 */
2603 {
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 { "mpsadbw", { XM, EXx, Ib } },
2607 { "(bad)", { XX } },
2608 },
2609
2610 /* PREGRP86 */
2611 {
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "pcmpgtq", { XM, EXx } },
2615 { "(bad)", { XX } },
2616 },
2617
2618 /* PREGRP87 */
2619 {
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2624 },
2625
2626 /* PREGRP88 */
2627 {
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2632 },
2633
2634 /* PREGRP89 */
2635 {
2636 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "pcmpestrm", { XM, EXx, Ib } },
2639 { "(bad)", { XX } },
2640 },
2641
2642 /* PREGRP90 */
2643 {
2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 { "pcmpestri", { XM, EXx, Ib } },
2647 { "(bad)", { XX } },
2648 },
2649
2650 /* PREGRP91 */
2651 {
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2654 { "pcmpistrm", { XM, EXx, Ib } },
2655 { "(bad)", { XX } },
2656 },
2657
2658 /* PREGRP92 */
2659 {
2660 { "(bad)", { XX } },
2661 { "(bad)", { XX } },
2662 { "pcmpistri", { XM, EXx, Ib } },
2663 { "(bad)", { XX } },
2664 },
2665
2666 /* PREGRP93 */
2667 {
2668 { "ucomiss",{ XM, EXd } },
2669 { "(bad)", { XX } },
2670 { "ucomisd",{ XM, EXq } },
2671 { "(bad)", { XX } },
2672 },
2673
2674 /* PREGRP94 */
2675 {
2676 { "comiss", { XM, EXd } },
2677 { "(bad)", { XX } },
2678 { "comisd", { XM, EXq } },
2679 { "(bad)", { XX } },
2680 },
2681
2682 /* PREGRP95 */
2683 {
2684 { "punpcklbw",{ MX, EMd } },
2685 { "(bad)", { XX } },
2686 { "punpcklbw",{ MX, EMq } },
2687 { "(bad)", { XX } },
2688 },
2689
2690 /* PREGRP96 */
2691 {
2692 { "punpcklwd",{ MX, EMd } },
2693 { "(bad)", { XX } },
2694 { "punpcklwd",{ MX, EMq } },
2695 { "(bad)", { XX } },
2696 },
2697
2698 /* PREGRP97 */
2699 {
2700 { "punpckldq",{ MX, EMd } },
2701 { "(bad)", { XX } },
2702 { "punpckldq",{ MX, EMq } },
2703 { "(bad)", { XX } },
c2c73b42 2704 },
bc51c5c9 2705};
dc99065b 2706
bc51c5c9
FB		 2707static const struct dis386 x86_64_table[][2] = {
2708 {
88103cfe
BS		 2709 { "pusha{P|}", { XX } },
2710 { "(bad)", { XX } },
2711 },
2712 {
2713 { "popa{P|}", { XX } },
2714 { "(bad)", { XX } },
2715 },
2716 {
2717 { "bound{S|}", { Gv, Ma } },
2718 { "(bad)", { XX } },
2719 },
2720 {
2721 { "arpl", { Ew, Gw } },
2722 { "movs{||lq|xd}", { Gv, Ed } },
bc51c5c9
FB		 2723 },
2724};
2725
88103cfe 2726static const struct dis386 three_byte_table[][256] = {
c2c73b42
BS		 2727 /* THREE_BYTE_0 */
2728 {
88103cfe
BS		 2729 /* 00 */
2730 { "pshufb", { MX, EM } },
2731 { "phaddw", { MX, EM } },
2732 { "phaddd", { MX, EM } },
2733 { "phaddsw", { MX, EM } },
2734 { "pmaddubsw", { MX, EM } },
2735 { "phsubw", { MX, EM } },
2736 { "phsubd", { MX, EM } },
2737 { "phsubsw", { MX, EM } },
2738 /* 08 */
2739 { "psignb", { MX, EM } },
2740 { "psignw", { MX, EM } },
2741 { "psignd", { MX, EM } },
2742 { "pmulhrsw", { MX, EM } },
2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 /* 10 */
2748 { PREGRP39 },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
2751 { "(bad)", { XX } },
2752 { PREGRP40 },
2753 { PREGRP41 },
2754 { "(bad)", { XX } },
2755 { PREGRP42 },
2756 /* 18 */
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { "(bad)", { XX } },
2761 { "pabsb", { MX, EM } },
2762 { "pabsw", { MX, EM } },
2763 { "pabsd", { MX, EM } },
2764 { "(bad)", { XX } },
2765 /* 20 */
2766 { PREGRP43 },
2767 { PREGRP44 },
2768 { PREGRP45 },
2769 { PREGRP46 },
2770 { PREGRP47 },
2771 { PREGRP48 },
2772 { "(bad)", { XX } },
2773 { "(bad)", { XX } },
2774 /* 28 */
2775 { PREGRP49 },
2776 { PREGRP50 },
2777 { PREGRP51 },
2778 { PREGRP52 },
2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2783 /* 30 */
2784 { PREGRP53 },
2785 { PREGRP54 },
2786 { PREGRP55 },
2787 { PREGRP56 },
2788 { PREGRP57 },
2789 { PREGRP58 },
2790 { "(bad)", { XX } },
2791 { PREGRP86 },
2792 /* 38 */
2793 { PREGRP59 },
2794 { PREGRP60 },
2795 { PREGRP61 },
2796 { PREGRP62 },
2797 { PREGRP63 },
2798 { PREGRP64 },
2799 { PREGRP65 },
2800 { PREGRP66 },
2801 /* 40 */
2802 { PREGRP67 },
2803 { PREGRP68 },
2804 { "(bad)", { XX } },
2805 { "(bad)", { XX } },
2806 { "(bad)", { XX } },
2807 { "(bad)", { XX } },
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
2810 /* 48 */
2811 { "(bad)", { XX } },
2812 { "(bad)", { XX } },
2813 { "(bad)", { XX } },
2814 { "(bad)", { XX } },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2819 /* 50 */
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
2828 /* 58 */
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2837 /* 60 */
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
2846 /* 68 */
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2855 /* 70 */
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
2864 /* 78 */
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2873 /* 80 */
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
2882 /* 88 */
2883 { "(bad)", { XX } },
2884 { "(bad)", { XX } },
2885 { "(bad)", { XX } },
2886 { "(bad)", { XX } },
2887 { "(bad)", { XX } },
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2891 /* 90 */
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2900 /* 98 */
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2909 /* a0 */
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 { "(bad)", { XX } },
2918 /* a8 */
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 { "(bad)", { XX } },
2927 /* b0 */
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2936 /* b8 */
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2945 /* c0 */
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2954 /* c8 */
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2963 /* d0 */
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2972 /* d8 */
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2981 /* e0 */
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2990 /* e8 */
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
2999 /* f0 */
3000 { PREGRP87 },
3001 { PREGRP88 },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3008 /* f8 */
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 { "(bad)", { XX } },
c2c73b42
BS		 3017 },
3018 /* THREE_BYTE_1 */
3019 {
88103cfe
BS		 3020 /* 00 */
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 /* 08 */
3030 { PREGRP69 },
3031 { PREGRP70 },
3032 { PREGRP71 },
3033 { PREGRP72 },
3034 { PREGRP73 },
3035 { PREGRP74 },
3036 { PREGRP75 },
3037 { "palignr", { MX, EM, Ib } },
3038 /* 10 */
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 { PREGRP76 },
3044 { PREGRP77 },
3045 { PREGRP78 },
3046 { PREGRP79 },
3047 /* 18 */
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 /* 20 */
3057 { PREGRP80 },
3058 { PREGRP81 },
3059 { PREGRP82 },
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 { "(bad)", { XX } },
3065 /* 28 */
3066 { "(bad)", { XX } },
3067 { "(bad)", { XX } },
3068 { "(bad)", { XX } },
3069 { "(bad)", { XX } },
3070 { "(bad)", { XX } },
3071 { "(bad)", { XX } },
3072 { "(bad)", { XX } },
3073 { "(bad)", { XX } },
3074 /* 30 */
3075 { "(bad)", { XX } },
3076 { "(bad)", { XX } },
3077 { "(bad)", { XX } },
3078 { "(bad)", { XX } },
3079 { "(bad)", { XX } },
3080 { "(bad)", { XX } },
3081 { "(bad)", { XX } },
3082 { "(bad)", { XX } },
3083 /* 38 */
3084 { "(bad)", { XX } },
3085 { "(bad)", { XX } },
3086 { "(bad)", { XX } },
3087 { "(bad)", { XX } },
3088 { "(bad)", { XX } },
3089 { "(bad)", { XX } },
3090 { "(bad)", { XX } },
3091 { "(bad)", { XX } },
3092 /* 40 */
3093 { PREGRP83 },
3094 { PREGRP84 },
3095 { PREGRP85 },
3096 { "(bad)", { XX } },
3097 { "(bad)", { XX } },
3098 { "(bad)", { XX } },
3099 { "(bad)", { XX } },
3100 { "(bad)", { XX } },
3101 /* 48 */
3102 { "(bad)", { XX } },
3103 { "(bad)", { XX } },
3104 { "(bad)", { XX } },
3105 { "(bad)", { XX } },
3106 { "(bad)", { XX } },
3107 { "(bad)", { XX } },
3108 { "(bad)", { XX } },
3109 { "(bad)", { XX } },
3110 /* 50 */
3111 { "(bad)", { XX } },
3112 { "(bad)", { XX } },
3113 { "(bad)", { XX } },
3114 { "(bad)", { XX } },
3115 { "(bad)", { XX } },
3116 { "(bad)", { XX } },
3117 { "(bad)", { XX } },
3118 { "(bad)", { XX } },
3119 /* 58 */
3120 { "(bad)", { XX } },
3121 { "(bad)", { XX } },
3122 { "(bad)", { XX } },
3123 { "(bad)", { XX } },
3124 { "(bad)", { XX } },
3125 { "(bad)", { XX } },
3126 { "(bad)", { XX } },
3127 { "(bad)", { XX } },
3128 /* 60 */
3129 { PREGRP89 },
3130 { PREGRP90 },
3131 { PREGRP91 },
3132 { PREGRP92 },
3133 { "(bad)", { XX } },
3134 { "(bad)", { XX } },
3135 { "(bad)", { XX } },
3136 { "(bad)", { XX } },
3137 /* 68 */
3138 { "(bad)", { XX } },
3139 { "(bad)", { XX } },
3140 { "(bad)", { XX } },
3141 { "(bad)", { XX } },
3142 { "(bad)", { XX } },
3143 { "(bad)", { XX } },
3144 { "(bad)", { XX } },
3145 { "(bad)", { XX } },
3146 /* 70 */
3147 { "(bad)", { XX } },
3148 { "(bad)", { XX } },
3149 { "(bad)", { XX } },
3150 { "(bad)", { XX } },
3151 { "(bad)", { XX } },
3152 { "(bad)", { XX } },
3153 { "(bad)", { XX } },
3154 { "(bad)", { XX } },
3155 /* 78 */
3156 { "(bad)", { XX } },
3157 { "(bad)", { XX } },
3158 { "(bad)", { XX } },
3159 { "(bad)", { XX } },
3160 { "(bad)", { XX } },
3161 { "(bad)", { XX } },
3162 { "(bad)", { XX } },
3163 { "(bad)", { XX } },
3164 /* 80 */
3165 { "(bad)", { XX } },
3166 { "(bad)", { XX } },
3167 { "(bad)", { XX } },
3168 { "(bad)", { XX } },
3169 { "(bad)", { XX } },
3170 { "(bad)", { XX } },
3171 { "(bad)", { XX } },
3172 { "(bad)", { XX } },
3173 /* 88 */
3174 { "(bad)", { XX } },
3175 { "(bad)", { XX } },
3176 { "(bad)", { XX } },
3177 { "(bad)", { XX } },
3178 { "(bad)", { XX } },
3179 { "(bad)", { XX } },
3180 { "(bad)", { XX } },
3181 { "(bad)", { XX } },
3182 /* 90 */
3183 { "(bad)", { XX } },
3184 { "(bad)", { XX } },
3185 { "(bad)", { XX } },
3186 { "(bad)", { XX } },
3187 { "(bad)", { XX } },
3188 { "(bad)", { XX } },
3189 { "(bad)", { XX } },
3190 { "(bad)", { XX } },
3191 /* 98 */
3192 { "(bad)", { XX } },
3193 { "(bad)", { XX } },
3194 { "(bad)", { XX } },
3195 { "(bad)", { XX } },
3196 { "(bad)", { XX } },
3197 { "(bad)", { XX } },
3198 { "(bad)", { XX } },
3199 { "(bad)", { XX } },
3200 /* a0 */
3201 { "(bad)", { XX } },
3202 { "(bad)", { XX } },
3203 { "(bad)", { XX } },
3204 { "(bad)", { XX } },
3205 { "(bad)", { XX } },
3206 { "(bad)", { XX } },
3207 { "(bad)", { XX } },
3208 { "(bad)", { XX } },
3209 /* a8 */
3210 { "(bad)", { XX } },
3211 { "(bad)", { XX } },
3212 { "(bad)", { XX } },
3213 { "(bad)", { XX } },
3214 { "(bad)", { XX } },
3215 { "(bad)", { XX } },
3216 { "(bad)", { XX } },
3217 { "(bad)", { XX } },
3218 /* b0 */
3219 { "(bad)", { XX } },
3220 { "(bad)", { XX } },
3221 { "(bad)", { XX } },
3222 { "(bad)", { XX } },
3223 { "(bad)", { XX } },
3224 { "(bad)", { XX } },
3225 { "(bad)", { XX } },
3226 { "(bad)", { XX } },
3227 /* b8 */
3228 { "(bad)", { XX } },
3229 { "(bad)", { XX } },
3230 { "(bad)", { XX } },
3231 { "(bad)", { XX } },
3232 { "(bad)", { XX } },
3233 { "(bad)", { XX } },
3234 { "(bad)", { XX } },
3235 { "(bad)", { XX } },
3236 /* c0 */
3237 { "(bad)", { XX } },
3238 { "(bad)", { XX } },
3239 { "(bad)", { XX } },
3240 { "(bad)", { XX } },
3241 { "(bad)", { XX } },
3242 { "(bad)", { XX } },
3243 { "(bad)", { XX } },
3244 { "(bad)", { XX } },
3245 /* c8 */
3246 { "(bad)", { XX } },
3247 { "(bad)", { XX } },
3248 { "(bad)", { XX } },
3249 { "(bad)", { XX } },
3250 { "(bad)", { XX } },
3251 { "(bad)", { XX } },
3252 { "(bad)", { XX } },
3253 { "(bad)", { XX } },
3254 /* d0 */
3255 { "(bad)", { XX } },
3256 { "(bad)", { XX } },
3257 { "(bad)", { XX } },
3258 { "(bad)", { XX } },
3259 { "(bad)", { XX } },
3260 { "(bad)", { XX } },
3261 { "(bad)", { XX } },
3262 { "(bad)", { XX } },
3263 /* d8 */
3264 { "(bad)", { XX } },
3265 { "(bad)", { XX } },
3266 { "(bad)", { XX } },
3267 { "(bad)", { XX } },
3268 { "(bad)", { XX } },
3269 { "(bad)", { XX } },
3270 { "(bad)", { XX } },
3271 { "(bad)", { XX } },
3272 /* e0 */
3273 { "(bad)", { XX } },
3274 { "(bad)", { XX } },
3275 { "(bad)", { XX } },
3276 { "(bad)", { XX } },
3277 { "(bad)", { XX } },
3278 { "(bad)", { XX } },
3279 { "(bad)", { XX } },
3280 { "(bad)", { XX } },
3281 /* e8 */
3282 { "(bad)", { XX } },
3283 { "(bad)", { XX } },
3284 { "(bad)", { XX } },
3285 { "(bad)", { XX } },
3286 { "(bad)", { XX } },
3287 { "(bad)", { XX } },
3288 { "(bad)", { XX } },
3289 { "(bad)", { XX } },
3290 /* f0 */
3291 { "(bad)", { XX } },
3292 { "(bad)", { XX } },
3293 { "(bad)", { XX } },
3294 { "(bad)", { XX } },
3295 { "(bad)", { XX } },
3296 { "(bad)", { XX } },
3297 { "(bad)", { XX } },
3298 { "(bad)", { XX } },
3299 /* f8 */
3300 { "(bad)", { XX } },
3301 { "(bad)", { XX } },
3302 { "(bad)", { XX } },
3303 { "(bad)", { XX } },
3304 { "(bad)", { XX } },
3305 { "(bad)", { XX } },
3306 { "(bad)", { XX } },
3307 { "(bad)", { XX } },
3308 }
c2c73b42
BS		 3309};
3310
bc51c5c9 3311#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
dc99065b
FB		 3312
3313static void
c2c73b42 3314ckprefix (void)
dc99065b 3315{
bc51c5c9
FB		 3316 int newrex;
3317 rex = 0;
dc99065b 3318 prefixes = 0;
bc51c5c9
FB		 3319 used_prefixes = 0;
3320 rex_used = 0;
dc99065b
FB		 3321 while (1)
3322 {
3323 FETCH_DATA (the_info, codep + 1);
bc51c5c9 3324 newrex = 0;
dc99065b
FB		 3325 switch (*codep)
3326 {
bc51c5c9
FB		 3327 /* REX prefixes family. */
3328 case 0x40:
3329 case 0x41:
3330 case 0x42:
3331 case 0x43:
3332 case 0x44:
3333 case 0x45:
3334 case 0x46:
3335 case 0x47:
3336 case 0x48:
3337 case 0x49:
3338 case 0x4a:
3339 case 0x4b:
3340 case 0x4c:
3341 case 0x4d:
3342 case 0x4e:
3343 case 0x4f:
c2c73b42 3344 if (address_mode == mode_64bit)
bc51c5c9
FB		 3345 newrex = *codep;
3346 else
3347 return;
3348 break;
dc99065b
FB		 3349 case 0xf3:
3350 prefixes |= PREFIX_REPZ;
3351 break;
3352 case 0xf2:
3353 prefixes |= PREFIX_REPNZ;
3354 break;
3355 case 0xf0:
3356 prefixes |= PREFIX_LOCK;
3357 break;
3358 case 0x2e:
3359 prefixes |= PREFIX_CS;
3360 break;
3361 case 0x36:
3362 prefixes |= PREFIX_SS;
3363 break;
3364 case 0x3e:
3365 prefixes |= PREFIX_DS;
3366 break;
3367 case 0x26:
3368 prefixes |= PREFIX_ES;
3369 break;
3370 case 0x64:
3371 prefixes |= PREFIX_FS;
3372 break;
3373 case 0x65:
3374 prefixes |= PREFIX_GS;
3375 break;
3376 case 0x66:
3377 prefixes |= PREFIX_DATA;
3378 break;
3379 case 0x67:
bc51c5c9 3380 prefixes |= PREFIX_ADDR;
dc99065b 3381 break;
bc51c5c9
FB		 3382 case FWAIT_OPCODE:
3383 /* fwait is really an instruction. If there are prefixes
3384 before the fwait, they belong to the fwait, *not* to the
3385 following instruction. */
c2c73b42 3386 if (prefixes || rex)
bc51c5c9
FB		 3387 {
3388 prefixes |= PREFIX_FWAIT;
3389 codep++;
3390 return;
3391 }
3392 prefixes = PREFIX_FWAIT;
dc99065b
FB		 3393 break;
3394 default:
3395 return;
3396 }
bc51c5c9
FB		 3397 /* Rex is ignored when followed by another prefix. */
3398 if (rex)
3399 {
c2c73b42
BS		 3400 rex_used = rex;
3401 return;
bc51c5c9
FB		 3402 }
3403 rex = newrex;
dc99065b
FB		 3404 codep++;
3405 }
3406}
3407
bc51c5c9
FB		 3408/* Return the name of the prefix byte PREF, or NULL if PREF is not a
3409 prefix byte. */
3410
3411static const char *
c2c73b42 3412prefix_name (int pref, int sizeflag)
bc51c5c9 3413{
88103cfe
BS		 3414 static const char * const rexes [16] =
3415 {
3416 "rex", /* 0x40 */
3417 "rex.B", /* 0x41 */
3418 "rex.X", /* 0x42 */
3419 "rex.XB", /* 0x43 */
3420 "rex.R", /* 0x44 */
3421 "rex.RB", /* 0x45 */
3422 "rex.RX", /* 0x46 */
3423 "rex.RXB", /* 0x47 */
3424 "rex.W", /* 0x48 */
3425 "rex.WB", /* 0x49 */
3426 "rex.WX", /* 0x4a */
3427 "rex.WXB", /* 0x4b */
3428 "rex.WR", /* 0x4c */
3429 "rex.WRB", /* 0x4d */
3430 "rex.WRX", /* 0x4e */
3431 "rex.WRXB", /* 0x4f */
3432 };
3433
bc51c5c9
FB		 3434 switch (pref)
3435 {
3436 /* REX prefixes family. */
3437 case 0x40:
bc51c5c9 3438 case 0x41:
bc51c5c9 3439 case 0x42:
bc51c5c9 3440 case 0x43:
bc51c5c9 3441 case 0x44:
bc51c5c9 3442 case 0x45:
bc51c5c9 3443 case 0x46:
bc51c5c9 3444 case 0x47:
bc51c5c9 3445 case 0x48:
bc51c5c9 3446 case 0x49:
bc51c5c9 3447 case 0x4a:
bc51c5c9 3448 case 0x4b:
bc51c5c9 3449 case 0x4c:
bc51c5c9 3450 case 0x4d:
bc51c5c9 3451 case 0x4e:
bc51c5c9 3452 case 0x4f:
88103cfe 3453 return rexes [pref - 0x40];
bc51c5c9
FB		 3454 case 0xf3:
3455 return "repz";
3456 case 0xf2:
3457 return "repnz";
3458 case 0xf0:
3459 return "lock";
3460 case 0x2e:
3461 return "cs";
3462 case 0x36:
3463 return "ss";
3464 case 0x3e:
3465 return "ds";
3466 case 0x26:
3467 return "es";
3468 case 0x64:
3469 return "fs";
3470 case 0x65:
3471 return "gs";
3472 case 0x66:
3473 return (sizeflag & DFLAG) ? "data16" : "data32";
3474 case 0x67:
c2c73b42
BS		 3475 if (address_mode == mode_64bit)
3476 return (sizeflag & AFLAG) ? "addr32" : "addr64";
bc51c5c9 3477 else
c2c73b42 3478 return (sizeflag & AFLAG) ? "addr16" : "addr32";
bc51c5c9
FB		 3479 case FWAIT_OPCODE:
3480 return "fwait";
3481 default:
3482 return NULL;
3483 }
3484}
dc99065b 3485
88103cfe
BS		 3486static char op_out[MAX_OPERANDS][100];
3487static int op_ad, op_index[MAX_OPERANDS];
c2c73b42 3488static int two_source_ops;
88103cfe
BS		 3489static bfd_vma op_address[MAX_OPERANDS];
3490static bfd_vma op_riprel[MAX_OPERANDS];
bc51c5c9 3491static bfd_vma start_pc;
88103cfe 3492
dc99065b
FB		 3493/*
3494 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3495 * (see topic "Redundant prefixes" in the "Differences from 8086"
3496 * section of the "Virtual 8086 Mode" chapter.)
3497 * 'pc' should be the address of this instruction, it will
3498 * be used to print the target address if this is a relative jump or call
3499 * The function returns the length of this instruction in bytes.
3500 */
3501
c2c73b42 3502static char intel_syntax;
bc51c5c9
FB		 3503static char open_char;
3504static char close_char;
3505static char separator_char;
3506static char scale_char;
3507
dc99065b 3508int
c2c73b42 3509print_insn_i386 (bfd_vma pc, disassemble_info *info)
bc51c5c9
FB		 3510{
3511 intel_syntax = -1;
3512
3513 return print_insn (pc, info);
3514}
3515
3516static int
c2c73b42 3517print_insn (bfd_vma pc, disassemble_info *info)
dc99065b 3518{
bc51c5c9 3519 const struct dis386 *dp;
dc99065b 3520 int i;
88103cfe 3521 char *op_txt[MAX_OPERANDS];
dc99065b 3522 int needcomma;
88103cfe
BS		 3523 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3524 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
bc51c5c9
FB		 3525 int sizeflag;
3526 const char *p;
dc99065b 3527 struct dis_private priv;
88103cfe 3528 unsigned char op;
dc99065b 3529
c2c73b42
BS		 3530 if (info->mach == bfd_mach_x86_64_intel_syntax
3531 || info->mach == bfd_mach_x86_64)
3532 address_mode = mode_64bit;
3533 else
3534 address_mode = mode_32bit;
bc51c5c9 3535
c2c73b42 3536 if (intel_syntax == (char) -1)
bc51c5c9
FB		 3537 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3538 || info->mach == bfd_mach_x86_64_intel_syntax);
3539
3540 if (info->mach == bfd_mach_i386_i386
3541 || info->mach == bfd_mach_x86_64
3542 || info->mach == bfd_mach_i386_i386_intel_syntax
3543 || info->mach == bfd_mach_x86_64_intel_syntax)
3544 priv.orig_sizeflag = AFLAG | DFLAG;
3545 else if (info->mach == bfd_mach_i386_i8086)
3546 priv.orig_sizeflag = 0;
3547 else
3548 abort ();
3549
3550 for (p = info->disassembler_options; p != NULL; )
3551 {
3552 if (strncmp (p, "x86-64", 6) == 0)
3553 {
c2c73b42 3554 address_mode = mode_64bit;
bc51c5c9
FB		 3555 priv.orig_sizeflag = AFLAG | DFLAG;
3556 }
3557 else if (strncmp (p, "i386", 4) == 0)
3558 {
c2c73b42 3559 address_mode = mode_32bit;
bc51c5c9
FB		 3560 priv.orig_sizeflag = AFLAG | DFLAG;
3561 }
3562 else if (strncmp (p, "i8086", 5) == 0)
3563 {
c2c73b42 3564 address_mode = mode_16bit;
bc51c5c9
FB		 3565 priv.orig_sizeflag = 0;
3566 }
3567 else if (strncmp (p, "intel", 5) == 0)
3568 {
3569 intel_syntax = 1;
3570 }
3571 else if (strncmp (p, "att", 3) == 0)
3572 {
3573 intel_syntax = 0;
3574 }
3575 else if (strncmp (p, "addr", 4) == 0)
3576 {
88103cfe
BS		 3577 if (address_mode == mode_64bit)
3578 {
3579 if (p[4] == '3' && p[5] == '2')
3580 priv.orig_sizeflag &= ~AFLAG;
3581 else if (p[4] == '6' && p[5] == '4')
3582 priv.orig_sizeflag |= AFLAG;
3583 }
3584 else
3585 {
3586 if (p[4] == '1' && p[5] == '6')
3587 priv.orig_sizeflag &= ~AFLAG;
3588 else if (p[4] == '3' && p[5] == '2')
3589 priv.orig_sizeflag |= AFLAG;
3590 }
bc51c5c9
FB		 3591 }
3592 else if (strncmp (p, "data", 4) == 0)
3593 {
3594 if (p[4] == '1' && p[5] == '6')
3595 priv.orig_sizeflag &= ~DFLAG;
3596 else if (p[4] == '3' && p[5] == '2')
3597 priv.orig_sizeflag |= DFLAG;
3598 }
3599 else if (strncmp (p, "suffix", 6) == 0)
3600 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3601
3602 p = strchr (p, ',');
3603 if (p != NULL)
3604 p++;
3605 }
3606
3607 if (intel_syntax)
3608 {
3609 names64 = intel_names64;
3610 names32 = intel_names32;
3611 names16 = intel_names16;
3612 names8 = intel_names8;
3613 names8rex = intel_names8rex;
3614 names_seg = intel_names_seg;
3615 index16 = intel_index16;
3616 open_char = '[';
3617 close_char = ']';
3618 separator_char = '+';
3619 scale_char = '*';
3620 }
3621 else
3622 {
3623 names64 = att_names64;
3624 names32 = att_names32;
3625 names16 = att_names16;
3626 names8 = att_names8;
3627 names8rex = att_names8rex;
3628 names_seg = att_names_seg;
3629 index16 = att_index16;
3630 open_char = '(';
3631 close_char = ')';
3632 separator_char = ',';
3633 scale_char = ',';
3634 }
3635
3636 /* The output looks better if we put 7 bytes on a line, since that
3637 puts most long word instructions on a single line. */
3638 info->bytes_per_line = 7;
dc99065b 3639
c2c73b42 3640 info->private_data = &priv;
dc99065b
FB		 3641 priv.max_fetched = priv.the_buffer;
3642 priv.insn_start = pc;
dc99065b
FB		 3643
3644 obuf[0] = 0;
88103cfe
BS		 3645 for (i = 0; i < MAX_OPERANDS; ++i)
3646 {
3647 op_out[i][0] = 0;
3648 op_index[i] = -1;
3649 }
dc99065b
FB		 3650
3651 the_info = info;
3652 start_pc = pc;
bc51c5c9
FB		 3653 start_codep = priv.the_buffer;
3654 codep = priv.the_buffer;
3655
3656 if (setjmp (priv.bailout) != 0)
3657 {
3658 const char *name;
3659
3660 /* Getting here means we tried for data but didn't get it. That
3661 means we have an incomplete instruction of some sort. Just
3662 print the first byte as a prefix or a .byte pseudo-op. */
3663 if (codep > priv.the_buffer)
3664 {
3665 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3666 if (name != NULL)
3667 (*info->fprintf_func) (info->stream, "%s", name);
3668 else
3669 {
3670 /* Just print the first byte as a .byte instruction. */
3671 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3672 (unsigned int) priv.the_buffer[0]);
3673 }
3674
3675 return 1;
3676 }
3677
3678 return -1;
3679 }
3680
3681 obufp = obuf;
dc99065b
FB		 3682 ckprefix ();
3683
bc51c5c9
FB		 3684 insn_codep = codep;
3685 sizeflag = priv.orig_sizeflag;
3686
dc99065b 3687 FETCH_DATA (info, codep + 1);
bc51c5c9
FB		 3688 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3689
c2c73b42
BS		 3690 if (((prefixes & PREFIX_FWAIT)
3691 && ((*codep < 0xd8) || (*codep > 0xdf)))
3692 || (rex && rex_used))
dc99065b 3693 {
bc51c5c9
FB		 3694 const char *name;
3695
c2c73b42
BS		 3696 /* fwait not followed by floating point instruction, or rex followed
3697 by other prefixes. Print the first prefix. */
bc51c5c9
FB		 3698 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3699 if (name == NULL)
3700 name = INTERNAL_DISASSEMBLER_ERROR;
3701 (*info->fprintf_func) (info->stream, "%s", name);
3702 return 1;
dc99065b 3703 }
bc51c5c9 3704
88103cfe 3705 op = 0;
dc99065b
FB		 3706 if (*codep == 0x0f)
3707 {
88103cfe 3708 unsigned char threebyte;
dc99065b 3709 FETCH_DATA (info, codep + 2);
88103cfe
BS		 3710 threebyte = *++codep;
3711 dp = &dis386_twobyte[threebyte];
dc99065b 3712 need_modrm = twobyte_has_modrm[*codep];
88103cfe
BS		 3713 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3714 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3715 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c2c73b42 3716 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
88103cfe
BS		 3717 codep++;
3718 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3719 {
3720 FETCH_DATA (info, codep + 2);
3721 op = *codep++;
3722 switch (threebyte)
3723 {
3724 case 0x38:
3725 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3726 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3727 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3728 break;
3729 case 0x3a:
3730 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3731 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3732 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3733 break;
3734 default:
3735 break;
3736 }
3737 }
dc99065b
FB		 3738 }
3739 else
3740 {
3741 dp = &dis386[*codep];
3742 need_modrm = onebyte_has_modrm[*codep];
88103cfe
BS		 3743 uses_DATA_prefix = 0;
3744 uses_REPNZ_prefix = 0;
3745 /* pause is 0xf3 0x90. */
3746 uses_REPZ_prefix = *codep == 0x90;
c2c73b42 3747 uses_LOCK_prefix = 0;
88103cfe 3748 codep++;
dc99065b 3749 }
dc99065b 3750
88103cfe 3751 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
bc51c5c9
FB		 3752 {
3753 oappend ("repz ");
3754 used_prefixes |= PREFIX_REPZ;
3755 }
88103cfe 3756 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
bc51c5c9
FB		 3757 {
3758 oappend ("repnz ");
3759 used_prefixes |= PREFIX_REPNZ;
3760 }
88103cfe 3761
c2c73b42 3762 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
bc51c5c9
FB		 3763 {
3764 oappend ("lock ");
3765 used_prefixes |= PREFIX_LOCK;
3766 }
3767
3768 if (prefixes & PREFIX_ADDR)
3769 {
3770 sizeflag ^= AFLAG;
88103cfe 3771 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
bc51c5c9 3772 {
c2c73b42 3773 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
bc51c5c9
FB		 3774 oappend ("addr32 ");
3775 else
3776 oappend ("addr16 ");
3777 used_prefixes |= PREFIX_ADDR;
3778 }
3779 }
3780
88103cfe 3781 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
bc51c5c9
FB		 3782 {
3783 sizeflag ^= DFLAG;
88103cfe
BS		 3784 if (dp->op[2].bytemode == cond_jump_mode
3785 && dp->op[0].bytemode == v_mode
bc51c5c9
FB		 3786 && !intel_syntax)
3787 {
3788 if (sizeflag & DFLAG)
3789 oappend ("data32 ");
3790 else
3791 oappend ("data16 ");
3792 used_prefixes |= PREFIX_DATA;
3793 }
3794 }
3795
88103cfe 3796 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
c2c73b42 3797 {
88103cfe
BS		 3798 dp = &three_byte_table[dp->op[1].bytemode][op];
3799 modrm.mod = (*codep >> 6) & 3;
3800 modrm.reg = (*codep >> 3) & 7;
3801 modrm.rm = *codep & 7;
c2c73b42
BS		 3802 }
3803 else if (need_modrm)
dc99065b
FB		 3804 {
3805 FETCH_DATA (info, codep + 1);
88103cfe
BS		 3806 modrm.mod = (*codep >> 6) & 3;
3807 modrm.reg = (*codep >> 3) & 7;
3808 modrm.rm = *codep & 7;
dc99065b
FB		 3809 }
3810
88103cfe 3811 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
dc99065b 3812 {
bc51c5c9 3813 dofloat (sizeflag);
dc99065b
FB		 3814 }
3815 else
3816 {
bc51c5c9 3817 int index;
dc99065b 3818 if (dp->name == NULL)
bc51c5c9 3819 {
88103cfe 3820 switch (dp->op[0].bytemode)
bc51c5c9
FB		 3821 {
3822 case USE_GROUPS:
88103cfe 3823 dp = &grps[dp->op[1].bytemode][modrm.reg];
bc51c5c9
FB		 3824 break;
3825
3826 case USE_PREFIX_USER_TABLE:
3827 index = 0;
3828 used_prefixes |= (prefixes & PREFIX_REPZ);
3829 if (prefixes & PREFIX_REPZ)
3830 index = 1;
3831 else
3832 {
88103cfe
BS		 3833 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3834 before PREFIX_DATA. */
3835 used_prefixes |= (prefixes & PREFIX_REPNZ);
3836 if (prefixes & PREFIX_REPNZ)
3837 index = 3;
bc51c5c9
FB		 3838 else
3839 {
88103cfe
BS		 3840 used_prefixes |= (prefixes & PREFIX_DATA);
3841 if (prefixes & PREFIX_DATA)
3842 index = 2;
bc51c5c9
FB		 3843 }
3844 }
88103cfe 3845 dp = &prefix_user_table[dp->op[1].bytemode][index];
bc51c5c9
FB		 3846 break;
3847
3848 case X86_64_SPECIAL:
c2c73b42 3849 index = address_mode == mode_64bit ? 1 : 0;
88103cfe 3850 dp = &x86_64_table[dp->op[1].bytemode][index];
bc51c5c9
FB		 3851 break;
3852
3853 default:
3854 oappend (INTERNAL_DISASSEMBLER_ERROR);
3855 break;
3856 }
3857 }
3858
3859 if (putop (dp->name, sizeflag) == 0)
88103cfe
BS		 3860 {
3861 for (i = 0; i < MAX_OPERANDS; ++i)
3862 {
3863 obufp = op_out[i];
3864 op_ad = MAX_OPERANDS - 1 - i;
3865 if (dp->op[i].rtn)
3866 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3867 }
bc51c5c9
FB		 3868 }
3869 }
3870
3871 /* See if any prefixes were not used. If so, print the first one
3872 separately. If we don't do this, we'll wind up printing an
3873 instruction stream which does not precisely correspond to the
3874 bytes we are disassembling. */
3875 if ((prefixes & ~used_prefixes) != 0)
3876 {
3877 const char *name;
3878
3879 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3880 if (name == NULL)
3881 name = INTERNAL_DISASSEMBLER_ERROR;
3882 (*info->fprintf_func) (info->stream, "%s", name);
3883 return 1;
3884 }
3885 if (rex & ~rex_used)
3886 {
3887 const char *name;
3888 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3889 if (name == NULL)
3890 name = INTERNAL_DISASSEMBLER_ERROR;
3891 (*info->fprintf_func) (info->stream, "%s ", name);
dc99065b 3892 }
bc51c5c9 3893
dc99065b
FB		 3894 obufp = obuf + strlen (obuf);
3895 for (i = strlen (obuf); i < 6; i++)
3896 oappend (" ");
3897 oappend (" ");
3898 (*info->fprintf_func) (info->stream, "%s", obuf);
bc51c5c9
FB		 3899
3900 /* The enter and bound instructions are printed with operands in the same
3901 order as the intel book; everything else is printed in reverse order. */
3902 if (intel_syntax || two_source_ops)
dc99065b 3903 {
88103cfe
BS		 3904 bfd_vma riprel;
3905
3906 for (i = 0; i < MAX_OPERANDS; ++i)
3907 op_txt[i] = op_out[i];
3908
3909 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
3910 {
3911 op_ad = op_index[i];
3912 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
3913 op_index[MAX_OPERANDS - 1 - i] = op_ad;
3914 riprel = op_riprel[i];
3915 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
3916 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
3917 }
dc99065b
FB		 3918 }
3919 else
3920 {
88103cfe
BS		 3921 for (i = 0; i < MAX_OPERANDS; ++i)
3922 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
dc99065b 3923 }
88103cfe 3924
dc99065b 3925 needcomma = 0;
88103cfe
BS		 3926 for (i = 0; i < MAX_OPERANDS; ++i)
3927 if (*op_txt[i])
3928 {
3929 if (needcomma)
3930 (*info->fprintf_func) (info->stream, ",");
3931 if (op_index[i] != -1 && !op_riprel[i])
3932 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
3933 else
3934 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
3935 needcomma = 1;
3936 }
3937
3938 for (i = 0; i < MAX_OPERANDS; i++)
bc51c5c9
FB		 3939 if (op_index[i] != -1 && op_riprel[i])
3940 {
3941 (*info->fprintf_func) (info->stream, " # ");
3942 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3943 + op_address[op_index[i]]), info);
88103cfe 3944 break;
bc51c5c9
FB		 3945 }
3946 return codep - priv.the_buffer;
dc99065b
FB		 3947}
3948
bc51c5c9 3949static const char *float_mem[] = {
dc99065b 3950 /* d8 */
bc51c5c9
FB		 3951 "fadd{s||s|}",
3952 "fmul{s||s|}",
3953 "fcom{s||s|}",
3954 "fcomp{s||s|}",
3955 "fsub{s||s|}",
3956 "fsubr{s||s|}",
3957 "fdiv{s||s|}",
3958 "fdivr{s||s|}",
c2c73b42 3959 /* d9 */
bc51c5c9 3960 "fld{s||s|}",
dc99065b 3961 "(bad)",
bc51c5c9
FB		 3962 "fst{s||s|}",
3963 "fstp{s||s|}",
c2c73b42 3964 "fldenvIC",
dc99065b 3965 "fldcw",
c2c73b42 3966 "fNstenvIC",
dc99065b
FB		 3967 "fNstcw",
3968 /* da */
bc51c5c9
FB		 3969 "fiadd{l||l|}",
3970 "fimul{l||l|}",
3971 "ficom{l||l|}",
3972 "ficomp{l||l|}",
3973 "fisub{l||l|}",
3974 "fisubr{l||l|}",
3975 "fidiv{l||l|}",
3976 "fidivr{l||l|}",
dc99065b 3977 /* db */
bc51c5c9 3978 "fild{l||l|}",
c2c73b42 3979 "fisttp{l||l|}",
bc51c5c9
FB		 3980 "fist{l||l|}",
3981 "fistp{l||l|}",
dc99065b 3982 "(bad)",
bc51c5c9 3983 "fld{t||t|}",
dc99065b 3984 "(bad)",
bc51c5c9 3985 "fstp{t||t|}",
dc99065b 3986 /* dc */
bc51c5c9
FB		 3987 "fadd{l||l|}",
3988 "fmul{l||l|}",
3989 "fcom{l||l|}",
3990 "fcomp{l||l|}",
3991 "fsub{l||l|}",
3992 "fsubr{l||l|}",
3993 "fdiv{l||l|}",
3994 "fdivr{l||l|}",
dc99065b 3995 /* dd */
bc51c5c9 3996 "fld{l||l|}",
c2c73b42 3997 "fisttp{ll||ll|}",
bc51c5c9
FB		 3998 "fst{l||l|}",
3999 "fstp{l||l|}",
c2c73b42 4000 "frstorIC",
dc99065b 4001 "(bad)",
c2c73b42 4002 "fNsaveIC",
dc99065b
FB		 4003 "fNstsw",
4004 /* de */
4005 "fiadd",
4006 "fimul",
4007 "ficom",
4008 "ficomp",
4009 "fisub",
4010 "fisubr",
4011 "fidiv",
4012 "fidivr",
4013 /* df */
4014 "fild",
c2c73b42 4015 "fisttp",
dc99065b
FB		 4016 "fist",
4017 "fistp",
4018 "fbld",
bc51c5c9 4019 "fild{ll||ll|}",
dc99065b 4020 "fbstp",
c2c73b42
BS		 4021 "fistp{ll||ll|}",
4022};
4023
4024static const unsigned char float_mem_mode[] = {
4025 /* d8 */
4026 d_mode,
4027 d_mode,
4028 d_mode,
4029 d_mode,
4030 d_mode,
4031 d_mode,
4032 d_mode,
4033 d_mode,
4034 /* d9 */
4035 d_mode,
4036 0,
4037 d_mode,
4038 d_mode,
4039 0,
4040 w_mode,
4041 0,
4042 w_mode,
4043 /* da */
4044 d_mode,
4045 d_mode,
4046 d_mode,
4047 d_mode,
4048 d_mode,
4049 d_mode,
4050 d_mode,
4051 d_mode,
4052 /* db */
4053 d_mode,
4054 d_mode,
4055 d_mode,
4056 d_mode,
4057 0,
4058 t_mode,
4059 0,
4060 t_mode,
4061 /* dc */
4062 q_mode,
4063 q_mode,
4064 q_mode,
4065 q_mode,
4066 q_mode,
4067 q_mode,
4068 q_mode,
4069 q_mode,
4070 /* dd */
4071 q_mode,
4072 q_mode,
4073 q_mode,
4074 q_mode,
4075 0,
4076 0,
4077 0,
4078 w_mode,
4079 /* de */
4080 w_mode,
4081 w_mode,
4082 w_mode,
4083 w_mode,
4084 w_mode,
4085 w_mode,
4086 w_mode,
4087 w_mode,
4088 /* df */
4089 w_mode,
4090 w_mode,
4091 w_mode,
4092 w_mode,
4093 t_mode,
4094 q_mode,
4095 t_mode,
4096 q_mode
dc99065b
FB		 4097};
4098
88103cfe
BS		 4099#define ST { OP_ST, 0 }
4100#define STi { OP_STi, 0 }
dc99065b 4101
88103cfe
BS		 4102#define FGRPd9_2 NULL, { { NULL, 0 } }
4103#define FGRPd9_4 NULL, { { NULL, 1 } }
4104#define FGRPd9_5 NULL, { { NULL, 2 } }
4105#define FGRPd9_6 NULL, { { NULL, 3 } }
4106#define FGRPd9_7 NULL, { { NULL, 4 } }
4107#define FGRPda_5 NULL, { { NULL, 5 } }
4108#define FGRPdb_4 NULL, { { NULL, 6 } }
4109#define FGRPde_3 NULL, { { NULL, 7 } }
4110#define FGRPdf_4 NULL, { { NULL, 8 } }
bc51c5c9
FB		 4111
4112static const struct dis386 float_reg[][8] = {
dc99065b
FB		 4113 /* d8 */
4114 {
88103cfe
BS		 4115 { "fadd", { ST, STi } },
4116 { "fmul", { ST, STi } },
4117 { "fcom", { STi } },
4118 { "fcomp", { STi } },
4119 { "fsub", { ST, STi } },
4120 { "fsubr", { ST, STi } },
4121 { "fdiv", { ST, STi } },
4122 { "fdivr", { ST, STi } },
dc99065b
FB		 4123 },
4124 /* d9 */
4125 {
88103cfe
BS		 4126 { "fld", { STi } },
4127 { "fxch", { STi } },
dc99065b 4128 { FGRPd9_2 },
88103cfe 4129 { "(bad)", { XX } },
dc99065b
FB		 4130 { FGRPd9_4 },
4131 { FGRPd9_5 },
4132 { FGRPd9_6 },
4133 { FGRPd9_7 },
4134 },
4135 /* da */
4136 {
88103cfe
BS		 4137 { "fcmovb", { ST, STi } },
4138 { "fcmove", { ST, STi } },
4139 { "fcmovbe",{ ST, STi } },
4140 { "fcmovu", { ST, STi } },
4141 { "(bad)", { XX } },
dc99065b 4142 { FGRPda_5 },
88103cfe
BS		 4143 { "(bad)", { XX } },
4144 { "(bad)", { XX } },
dc99065b
FB		 4145 },
4146 /* db */
4147 {
88103cfe
BS		 4148 { "fcmovnb",{ ST, STi } },
4149 { "fcmovne",{ ST, STi } },
4150 { "fcmovnbe",{ ST, STi } },
4151 { "fcmovnu",{ ST, STi } },
dc99065b 4152 { FGRPdb_4 },
88103cfe
BS		 4153 { "fucomi", { ST, STi } },
4154 { "fcomi", { ST, STi } },
4155 { "(bad)", { XX } },
dc99065b
FB		 4156 },
4157 /* dc */
4158 {
88103cfe
BS		 4159 { "fadd", { STi, ST } },
4160 { "fmul", { STi, ST } },
4161 { "(bad)", { XX } },
4162 { "(bad)", { XX } },
4163#if SYSV386_COMPAT
4164 { "fsub", { STi, ST } },
4165 { "fsubr", { STi, ST } },
4166 { "fdiv", { STi, ST } },
4167 { "fdivr", { STi, ST } },
bc51c5c9 4168#else
88103cfe
BS		 4169 { "fsubr", { STi, ST } },
4170 { "fsub", { STi, ST } },
4171 { "fdivr", { STi, ST } },
4172 { "fdiv", { STi, ST } },
bc51c5c9 4173#endif
dc99065b
FB		 4174 },
4175 /* dd */
4176 {
88103cfe
BS		 4177 { "ffree", { STi } },
4178 { "(bad)", { XX } },
4179 { "fst", { STi } },
4180 { "fstp", { STi } },
4181 { "fucom", { STi } },
4182 { "fucomp", { STi } },
4183 { "(bad)", { XX } },
4184 { "(bad)", { XX } },
dc99065b
FB		 4185 },
4186 /* de */
4187 {
88103cfe
BS		 4188 { "faddp", { STi, ST } },
4189 { "fmulp", { STi, ST } },
4190 { "(bad)", { XX } },
dc99065b 4191 { FGRPde_3 },
88103cfe
BS		 4192#if SYSV386_COMPAT
4193 { "fsubp", { STi, ST } },
4194 { "fsubrp", { STi, ST } },
4195 { "fdivp", { STi, ST } },
4196 { "fdivrp", { STi, ST } },
bc51c5c9 4197#else
88103cfe
BS		 4198 { "fsubrp", { STi, ST } },
4199 { "fsubp", { STi, ST } },
4200 { "fdivrp", { STi, ST } },
4201 { "fdivp", { STi, ST } },
bc51c5c9 4202#endif
dc99065b
FB		 4203 },
4204 /* df */
4205 {
88103cfe
BS		 4206 { "ffreep", { STi } },
4207 { "(bad)", { XX } },
4208 { "(bad)", { XX } },
4209 { "(bad)", { XX } },
dc99065b 4210 { FGRPdf_4 },
88103cfe
BS		 4211 { "fucomip", { ST, STi } },
4212 { "fcomip", { ST, STi } },
4213 { "(bad)", { XX } },
dc99065b
FB		 4214 },
4215};
4216
4c7d9dc7 4217static const char *fgrps[][8] = {
dc99065b
FB		 4218 /* d9_2 0 */
4219 {
4220 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4221 },
4222
4223 /* d9_4 1 */
4224 {
4225 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4226 },
4227
4228 /* d9_5 2 */
4229 {
4230 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4231 },
4232
4233 /* d9_6 3 */
4234 {
4235 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4236 },
4237
4238 /* d9_7 4 */
4239 {
4240 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4241 },
4242
4243 /* da_5 5 */
4244 {
4245 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4246 },
4247
4248 /* db_4 6 */
4249 {
4250 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4251 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4252 },
4253
4254 /* de_3 7 */
4255 {
4256 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4257 },
4258
4259 /* df_4 8 */
4260 {
4261 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4262 },
4263};
4264
4265static void
c2c73b42 4266dofloat (int sizeflag)
dc99065b 4267{
bc51c5c9 4268 const struct dis386 *dp;
dc99065b 4269 unsigned char floatop;
bc51c5c9 4270
dc99065b 4271 floatop = codep[-1];
bc51c5c9 4272
88103cfe 4273 if (modrm.mod != 3)
dc99065b 4274 {
88103cfe 4275 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
c2c73b42
BS		 4276
4277 putop (float_mem[fp_indx], sizeflag);
88103cfe 4278 obufp = op_out[0];
c2c73b42
BS		 4279 op_ad = 2;
4280 OP_E (float_mem_mode[fp_indx], sizeflag);
dc99065b
FB		 4281 return;
4282 }
bc51c5c9
FB		 4283 /* Skip mod/rm byte. */
4284 MODRM_CHECK;
dc99065b 4285 codep++;
bc51c5c9 4286
88103cfe 4287 dp = &float_reg[floatop - 0xd8][modrm.reg];
dc99065b
FB		 4288 if (dp->name == NULL)
4289 {
88103cfe 4290 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
bc51c5c9
FB		 4291
4292 /* Instruction fnstsw is only one with strange arg. */
4293 if (floatop == 0xdf && codep[-1] == 0xe0)
88103cfe 4294 pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]);
dc99065b
FB		 4295 }
4296 else
4297 {
bc51c5c9
FB		 4298 putop (dp->name, sizeflag);
4299
88103cfe 4300 obufp = op_out[0];
c2c73b42 4301 op_ad = 2;
88103cfe
BS		 4302 if (dp->op[0].rtn)
4303 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
c2c73b42 4304
88103cfe 4305 obufp = op_out[1];
c2c73b42 4306 op_ad = 1;
88103cfe
BS		 4307 if (dp->op[1].rtn)
4308 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
dc99065b
FB		 4309 }
4310}
4311
bc51c5c9 4312static void
c2c73b42 4313OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 4314{
c2c73b42 4315 oappend ("%st" + intel_syntax);
dc99065b
FB		 4316}
4317
bc51c5c9 4318static void
c2c73b42 4319OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 4320{
88103cfe 4321 snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm);
bc51c5c9 4322 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 4323}
4324
bc51c5c9
FB		 4325/* Capital letters in template are macros. */
4326static int
c2c73b42 4327putop (const char *template, int sizeflag)
dc99065b 4328{
bc51c5c9 4329 const char *p;
c2c73b42 4330 int alt = 0;
bc51c5c9 4331
dc99065b
FB		 4332 for (p = template; *p; p++)
4333 {
4334 switch (*p)
4335 {
4336 default:
4337 *obufp++ = *p;
4338 break;
bc51c5c9
FB		 4339 case '{':
4340 alt = 0;
4341 if (intel_syntax)
4342 alt += 1;
c2c73b42 4343 if (address_mode == mode_64bit)
bc51c5c9
FB		 4344 alt += 2;
4345 while (alt != 0)
4346 {
4347 while (*++p != '|')
4348 {
4349 if (*p == '}')
4350 {
4351 /* Alternative not valid. */
363a37d5 4352 pstrcpy (obuf, sizeof(obuf), "(bad)");
bc51c5c9
FB		 4353 obufp = obuf + 5;
4354 return 1;
4355 }
4356 else if (*p == '\0')
4357 abort ();
4358 }
4359 alt--;
4360 }
c2c73b42
BS		 4361 /* Fall through. */
4362 case 'I':
4363 alt = 1;
4364 continue;
bc51c5c9
FB		 4365 case '|':
4366 while (*++p != '}')
4367 {
4368 if (*p == '\0')
4369 abort ();
4370 }
4371 break;
4372 case '}':
4373 break;
4374 case 'A':
c2c73b42
BS		 4375 if (intel_syntax)
4376 break;
88103cfe 4377 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
bc51c5c9
FB		 4378 *obufp++ = 'b';
4379 break;
4380 case 'B':
c2c73b42
BS		 4381 if (intel_syntax)
4382 break;
bc51c5c9
FB		 4383 if (sizeflag & SUFFIX_ALWAYS)
4384 *obufp++ = 'b';
4385 break;
c2c73b42
BS		 4386 case 'C':
4387 if (intel_syntax && !alt)
4388 break;
4389 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4390 {
4391 if (sizeflag & DFLAG)
4392 *obufp++ = intel_syntax ? 'd' : 'l';
4393 else
4394 *obufp++ = intel_syntax ? 'w' : 's';
4395 used_prefixes |= (prefixes & PREFIX_DATA);
4396 }
4397 break;
88103cfe
BS		 4398 case 'D':
4399 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4400 break;
4401 USED_REX (REX_W);
4402 if (modrm.mod == 3)
4403 {
4404 if (rex & REX_W)
4405 *obufp++ = 'q';
4406 else if (sizeflag & DFLAG)
4407 *obufp++ = intel_syntax ? 'd' : 'l';
4408 else
4409 *obufp++ = 'w';
4410 used_prefixes |= (prefixes & PREFIX_DATA);
4411 }
4412 else
4413 *obufp++ = 'w';
4414 break;
bc51c5c9 4415 case 'E': /* For jcxz/jecxz */
c2c73b42 4416 if (address_mode == mode_64bit)
bc51c5c9
FB		 4417 {
4418 if (sizeflag & AFLAG)
4419 *obufp++ = 'r';
4420 else
4421 *obufp++ = 'e';
4422 }
4423 else
4424 if (sizeflag & AFLAG)
4425 *obufp++ = 'e';
4426 used_prefixes |= (prefixes & PREFIX_ADDR);
4427 break;
4428 case 'F':
c2c73b42
BS		 4429 if (intel_syntax)
4430 break;
bc51c5c9
FB		 4431 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4432 {
4433 if (sizeflag & AFLAG)
c2c73b42 4434 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
bc51c5c9 4435 else
c2c73b42 4436 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
bc51c5c9
FB		 4437 used_prefixes |= (prefixes & PREFIX_ADDR);
4438 }
4439 break;
88103cfe
BS		 4440 case 'G':
4441 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4442 break;
4443 if ((rex & REX_W) || (sizeflag & DFLAG))
4444 *obufp++ = 'l';
4445 else
4446 *obufp++ = 'w';
4447 if (!(rex & REX_W))
4448 used_prefixes |= (prefixes & PREFIX_DATA);
4449 break;
bc51c5c9 4450 case 'H':
c2c73b42
BS		 4451 if (intel_syntax)
4452 break;
bc51c5c9
FB		 4453 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4454 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4455 {
4456 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4457 *obufp++ = ',';
4458 *obufp++ = 'p';
4459 if (prefixes & PREFIX_DS)
4460 *obufp++ = 't';
4461 else
4462 *obufp++ = 'n';
4463 }
4464 break;
c2c73b42
BS		 4465 case 'J':
4466 if (intel_syntax)
4467 break;
4468 *obufp++ = 'l';
4469 break;
88103cfe
BS		 4470 case 'K':
4471 USED_REX (REX_W);
4472 if (rex & REX_W)
4473 *obufp++ = 'q';
4474 else
4475 *obufp++ = 'd';
4476 break;
c2c73b42
BS		 4477 case 'Z':
4478 if (intel_syntax)
4479 break;
4480 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4481 {
4482 *obufp++ = 'q';
4483 break;
4484 }
4485 /* Fall through. */
bc51c5c9 4486 case 'L':
c2c73b42
BS		 4487 if (intel_syntax)
4488 break;
bc51c5c9
FB		 4489 if (sizeflag & SUFFIX_ALWAYS)
4490 *obufp++ = 'l';
dc99065b
FB		 4491 break;
4492 case 'N':
4493 if ((prefixes & PREFIX_FWAIT) == 0)
4494 *obufp++ = 'n';
bc51c5c9
FB		 4495 else
4496 used_prefixes |= PREFIX_FWAIT;
4497 break;
4498 case 'O':
88103cfe
BS		 4499 USED_REX (REX_W);
4500 if (rex & REX_W)
bc51c5c9 4501 *obufp++ = 'o';
88103cfe
BS		 4502 else if (intel_syntax && (sizeflag & DFLAG))
4503 *obufp++ = 'q';
bc51c5c9
FB		 4504 else
4505 *obufp++ = 'd';
88103cfe
BS		 4506 if (!(rex & REX_W))
4507 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4508 break;
4509 case 'T':
c2c73b42
BS		 4510 if (intel_syntax)
4511 break;
4512 if (address_mode == mode_64bit && (sizeflag & DFLAG))
bc51c5c9
FB		 4513 {
4514 *obufp++ = 'q';
4515 break;
4516 }
4517 /* Fall through. */
4518 case 'P':
c2c73b42
BS		 4519 if (intel_syntax)
4520 break;
bc51c5c9 4521 if ((prefixes & PREFIX_DATA)
88103cfe 4522 || (rex & REX_W)
bc51c5c9
FB		 4523 || (sizeflag & SUFFIX_ALWAYS))
4524 {
88103cfe
BS		 4525 USED_REX (REX_W);
4526 if (rex & REX_W)
bc51c5c9
FB		 4527 *obufp++ = 'q';
4528 else
4529 {
4530 if (sizeflag & DFLAG)
4531 *obufp++ = 'l';
4532 else
4533 *obufp++ = 'w';
bc51c5c9 4534 }
c2c73b42 4535 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4536 }
4537 break;
4538 case 'U':
c2c73b42
BS		 4539 if (intel_syntax)
4540 break;
4541 if (address_mode == mode_64bit && (sizeflag & DFLAG))
bc51c5c9 4542 {
88103cfe 4543 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
c2c73b42 4544 *obufp++ = 'q';
bc51c5c9
FB		 4545 break;
4546 }
4547 /* Fall through. */
4548 case 'Q':
c2c73b42
BS		 4549 if (intel_syntax && !alt)
4550 break;
88103cfe
BS		 4551 USED_REX (REX_W);
4552 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
bc51c5c9 4553 {
88103cfe 4554 if (rex & REX_W)
bc51c5c9
FB		 4555 *obufp++ = 'q';
4556 else
4557 {
4558 if (sizeflag & DFLAG)
c2c73b42 4559 *obufp++ = intel_syntax ? 'd' : 'l';
bc51c5c9
FB		 4560 else
4561 *obufp++ = 'w';
bc51c5c9 4562 }
c2c73b42 4563 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4564 }
4565 break;
4566 case 'R':
88103cfe
BS		 4567 USED_REX (REX_W);
4568 if (rex & REX_W)
4569 *obufp++ = 'q';
4570 else if (sizeflag & DFLAG)
bc51c5c9 4571 {
88103cfe 4572 if (intel_syntax)
bc51c5c9 4573 *obufp++ = 'd';
bc51c5c9 4574 else
88103cfe 4575 *obufp++ = 'l';
bc51c5c9
FB		 4576 }
4577 else
88103cfe
BS		 4578 *obufp++ = 'w';
4579 if (intel_syntax && !p[1]
4580 && ((rex & REX_W) || (sizeflag & DFLAG)))
4581 *obufp++ = 'e';
4582 if (!(rex & REX_W))
bc51c5c9 4583 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b 4584 break;
c2c73b42
BS		 4585 case 'V':
4586 if (intel_syntax)
4587 break;
4588 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4589 {
4590 if (sizeflag & SUFFIX_ALWAYS)
4591 *obufp++ = 'q';
4592 break;
4593 }
4594 /* Fall through. */
dc99065b 4595 case 'S':
c2c73b42
BS		 4596 if (intel_syntax)
4597 break;
bc51c5c9
FB		 4598 if (sizeflag & SUFFIX_ALWAYS)
4599 {
88103cfe 4600 if (rex & REX_W)
bc51c5c9
FB		 4601 *obufp++ = 'q';
4602 else
4603 {
4604 if (sizeflag & DFLAG)
4605 *obufp++ = 'l';
4606 else
4607 *obufp++ = 'w';
4608 used_prefixes |= (prefixes & PREFIX_DATA);
4609 }
4610 }
4611 break;
4612 case 'X':
4613 if (prefixes & PREFIX_DATA)
4614 *obufp++ = 'd';
dc99065b 4615 else
bc51c5c9 4616 *obufp++ = 's';
c2c73b42 4617 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4618 break;
4619 case 'Y':
c2c73b42
BS		 4620 if (intel_syntax)
4621 break;
88103cfe 4622 if (rex & REX_W)
bc51c5c9 4623 {
88103cfe 4624 USED_REX (REX_W);
bc51c5c9
FB		 4625 *obufp++ = 'q';
4626 }
dc99065b 4627 break;
bc51c5c9 4628 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
dc99065b
FB		 4629 case 'W':
4630 /* operand size flag for cwtl, cbtw */
88103cfe
BS		 4631 USED_REX (REX_W);
4632 if (rex & REX_W)
4633 {
4634 if (intel_syntax)
4635 *obufp++ = 'd';
4636 else
4637 *obufp++ = 'l';
4638 }
bc51c5c9 4639 else if (sizeflag & DFLAG)
dc99065b
FB		 4640 *obufp++ = 'w';
4641 else
4642 *obufp++ = 'b';
88103cfe 4643 if (!(rex & REX_W))
bc51c5c9 4644 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 4645 break;
4646 }
c2c73b42 4647 alt = 0;
dc99065b
FB		 4648 }
4649 *obufp = 0;
bc51c5c9 4650 return 0;
dc99065b
FB		 4651}
4652
4653static void
c2c73b42 4654oappend (const char *s)
dc99065b 4655{
4d5e2b3c 4656 strcpy (obufp, s);
dc99065b 4657 obufp += strlen (s);
dc99065b
FB		 4658}
4659
4660static void
c2c73b42 4661append_seg (void)
dc99065b
FB		 4662{
4663 if (prefixes & PREFIX_CS)
bc51c5c9
FB		 4664 {
4665 used_prefixes |= PREFIX_CS;
4666 oappend ("%cs:" + intel_syntax);
4667 }
dc99065b 4668 if (prefixes & PREFIX_DS)
bc51c5c9
FB		 4669 {
4670 used_prefixes |= PREFIX_DS;
4671 oappend ("%ds:" + intel_syntax);
4672 }
dc99065b 4673 if (prefixes & PREFIX_SS)
bc51c5c9
FB		 4674 {
4675 used_prefixes |= PREFIX_SS;
4676 oappend ("%ss:" + intel_syntax);
4677 }
dc99065b 4678 if (prefixes & PREFIX_ES)
bc51c5c9
FB		 4679 {
4680 used_prefixes |= PREFIX_ES;
4681 oappend ("%es:" + intel_syntax);
4682 }
dc99065b 4683 if (prefixes & PREFIX_FS)
bc51c5c9
FB		 4684 {
4685 used_prefixes |= PREFIX_FS;
4686 oappend ("%fs:" + intel_syntax);
4687 }
dc99065b 4688 if (prefixes & PREFIX_GS)
bc51c5c9
FB		 4689 {
4690 used_prefixes |= PREFIX_GS;
4691 oappend ("%gs:" + intel_syntax);
4692 }
dc99065b
FB		 4693}
4694
bc51c5c9 4695static void
c2c73b42 4696OP_indirE (int bytemode, int sizeflag)
dc99065b 4697{
bc51c5c9
FB		 4698 if (!intel_syntax)
4699 oappend ("*");
4700 OP_E (bytemode, sizeflag);
dc99065b
FB		 4701}
4702
bc51c5c9 4703static void
363a37d5 4704print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
bc51c5c9 4705{
c2c73b42 4706 if (address_mode == mode_64bit)
bc51c5c9
FB		 4707 {
4708 if (hex)
4709 {
4710 char tmp[30];
4711 int i;
4712 buf[0] = '0';
4713 buf[1] = 'x';
363a37d5 4714 snprintf_vma (tmp, sizeof(tmp), disp);
bc51c5c9 4715 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
363a37d5 4716 pstrcpy (buf + 2, bufsize - 2, tmp + i);
bc51c5c9
FB		 4717 }
4718 else
4719 {
4720 bfd_signed_vma v = disp;
4721 char tmp[30];
4722 int i;
4723 if (v < 0)
4724 {
4725 *(buf++) = '-';
4726 v = -disp;
4727 /* Check for possible overflow on 0x8000000000000000. */
4728 if (v < 0)
4729 {
363a37d5 4730 pstrcpy (buf, bufsize, "9223372036854775808");
bc51c5c9
FB		 4731 return;
4732 }
4733 }
4734 if (!v)
4735 {
363a37d5 4736 pstrcpy (buf, bufsize, "0");
bc51c5c9
FB		 4737 return;
4738 }
4739
4740 i = 0;
4741 tmp[29] = 0;
4742 while (v)
4743 {
4744 tmp[28 - i] = (v % 10) + '0';
4745 v /= 10;
4746 i++;
4747 }
363a37d5 4748 pstrcpy (buf, bufsize, tmp + 29 - i);
bc51c5c9
FB		 4749 }
4750 }
4751 else
4752 {
4753 if (hex)
363a37d5 4754 snprintf (buf, bufsize, "0x%x", (unsigned int) disp);
bc51c5c9 4755 else
363a37d5 4756 snprintf (buf, bufsize, "%d", (int) disp);
bc51c5c9
FB		 4757 }
4758}
4759
88103cfe
BS		 4760/* Put DISP in BUF as signed hex number. */
4761
4762static void
4763print_displacement (char *buf, bfd_vma disp)
4764{
4765 bfd_signed_vma val = disp;
4766 char tmp[30];
4767 int i, j = 0;
4768
4769 if (val < 0)
4770 {
4771 buf[j++] = '-';
4772 val = -disp;
4773
4774 /* Check for possible overflow. */
4775 if (val < 0)
4776 {
4777 switch (address_mode)
4778 {
4779 case mode_64bit:
4780 strcpy (buf + j, "0x8000000000000000");
4781 break;
4782 case mode_32bit:
4783 strcpy (buf + j, "0x80000000");
4784 break;
4785 case mode_16bit:
4786 strcpy (buf + j, "0x8000");
4787 break;
4788 }
4789 return;
4790 }
4791 }
4792
4793 buf[j++] = '0';
4794 buf[j++] = 'x';
4795
4796 snprintf_vma (tmp, sizeof(tmp), val);
4797 for (i = 0; tmp[i] == '0'; i++)
4798 continue;
4799 if (tmp[i] == '\0')
4800 i--;
4801 strcpy (buf + j, tmp + i);
4802}
4803
bc51c5c9 4804static void
c2c73b42
BS		 4805intel_operand_size (int bytemode, int sizeflag)
4806{
4807 switch (bytemode)
4808 {
4809 case b_mode:
88103cfe 4810 case dqb_mode:
c2c73b42
BS		 4811 oappend ("BYTE PTR ");
4812 break;
4813 case w_mode:
4814 case dqw_mode:
4815 oappend ("WORD PTR ");
4816 break;
4817 case stack_v_mode:
4818 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4819 {
4820 oappend ("QWORD PTR ");
4821 used_prefixes |= (prefixes & PREFIX_DATA);
4822 break;
4823 }
4824 /* FALLTHRU */
4825 case v_mode:
4826 case dq_mode:
88103cfe
BS		 4827 USED_REX (REX_W);
4828 if (rex & REX_W)
c2c73b42
BS		 4829 oappend ("QWORD PTR ");
4830 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4831 oappend ("DWORD PTR ");
4832 else
4833 oappend ("WORD PTR ");
4834 used_prefixes |= (prefixes & PREFIX_DATA);
4835 break;
88103cfe
BS		 4836 case z_mode:
4837 if ((rex & REX_W) || (sizeflag & DFLAG))
4838 *obufp++ = 'D';
4839 oappend ("WORD PTR ");
4840 if (!(rex & REX_W))
4841 used_prefixes |= (prefixes & PREFIX_DATA);
4842 break;
c2c73b42 4843 case d_mode:
88103cfe 4844 case dqd_mode:
c2c73b42
BS		 4845 oappend ("DWORD PTR ");
4846 break;
4847 case q_mode:
4848 oappend ("QWORD PTR ");
4849 break;
4850 case m_mode:
4851 if (address_mode == mode_64bit)
4852 oappend ("QWORD PTR ");
4853 else
4854 oappend ("DWORD PTR ");
4855 break;
4856 case f_mode:
4857 if (sizeflag & DFLAG)
4858 oappend ("FWORD PTR ");
4859 else
4860 oappend ("DWORD PTR ");
4861 used_prefixes |= (prefixes & PREFIX_DATA);
4862 break;
4863 case t_mode:
4864 oappend ("TBYTE PTR ");
4865 break;
4866 case x_mode:
4867 oappend ("XMMWORD PTR ");
4868 break;
88103cfe
BS		 4869 case o_mode:
4870 oappend ("OWORD PTR ");
4871 break;
c2c73b42
BS		 4872 default:
4873 break;
4874 }
4875}
4876
4877static void
4878OP_E (int bytemode, int sizeflag)
dc99065b 4879{
bc51c5c9
FB		 4880 bfd_vma disp;
4881 int add = 0;
4882 int riprel = 0;
88103cfe
BS		 4883 USED_REX (REX_B);
4884 if (rex & REX_B)
bc51c5c9 4885 add += 8;
dc99065b 4886
bc51c5c9
FB		 4887 /* Skip mod/rm byte. */
4888 MODRM_CHECK;
dc99065b
FB		 4889 codep++;
4890
88103cfe 4891 if (modrm.mod == 3)
dc99065b
FB		 4892 {
4893 switch (bytemode)
4894 {
4895 case b_mode:
bc51c5c9
FB		 4896 USED_REX (0);
4897 if (rex)
88103cfe 4898 oappend (names8rex[modrm.rm + add]);
bc51c5c9 4899 else
88103cfe 4900 oappend (names8[modrm.rm + add]);
dc99065b
FB		 4901 break;
4902 case w_mode:
88103cfe 4903 oappend (names16[modrm.rm + add]);
bc51c5c9
FB		 4904 break;
4905 case d_mode:
88103cfe 4906 oappend (names32[modrm.rm + add]);
bc51c5c9
FB		 4907 break;
4908 case q_mode:
88103cfe 4909 oappend (names64[modrm.rm + add]);
bc51c5c9
FB		 4910 break;
4911 case m_mode:
c2c73b42 4912 if (address_mode == mode_64bit)
88103cfe 4913 oappend (names64[modrm.rm + add]);
bc51c5c9 4914 else
88103cfe 4915 oappend (names32[modrm.rm + add]);
dc99065b 4916 break;
c2c73b42
BS		 4917 case stack_v_mode:
4918 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4919 {
88103cfe 4920 oappend (names64[modrm.rm + add]);
c2c73b42
BS		 4921 used_prefixes |= (prefixes & PREFIX_DATA);
4922 break;
4923 }
4924 bytemode = v_mode;
4925 /* FALLTHRU */
dc99065b 4926 case v_mode:
c2c73b42 4927 case dq_mode:
88103cfe
BS		 4928 case dqb_mode:
4929 case dqd_mode:
c2c73b42 4930 case dqw_mode:
88103cfe
BS		 4931 USED_REX (REX_W);
4932 if (rex & REX_W)
4933 oappend (names64[modrm.rm + add]);
c2c73b42 4934 else if ((sizeflag & DFLAG) || bytemode != v_mode)
88103cfe 4935 oappend (names32[modrm.rm + add]);
dc99065b 4936 else
88103cfe 4937 oappend (names16[modrm.rm + add]);
bc51c5c9
FB		 4938 used_prefixes |= (prefixes & PREFIX_DATA);
4939 break;
4940 case 0:
dc99065b
FB		 4941 break;
4942 default:
bc51c5c9 4943 oappend (INTERNAL_DISASSEMBLER_ERROR);
dc99065b
FB		 4944 break;
4945 }
bc51c5c9 4946 return;
dc99065b
FB		 4947 }
4948
4949 disp = 0;
c2c73b42
BS		 4950 if (intel_syntax)
4951 intel_operand_size (bytemode, sizeflag);
bc51c5c9 4952 append_seg ();
dc99065b 4953
88103cfe 4954 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
dc99065b 4955 {
88103cfe
BS		 4956 /* 32/64 bit address mode */
4957 int havedisp;
dc99065b
FB		 4958 int havesib;
4959 int havebase;
4960 int base;
4961 int index = 0;
4962 int scale = 0;
4963
4964 havesib = 0;
4965 havebase = 1;
88103cfe 4966 base = modrm.rm;
dc99065b
FB		 4967
4968 if (base == 4)
4969 {
4970 havesib = 1;
4971 FETCH_DATA (the_info, codep + 1);
dc99065b 4972 index = (*codep >> 3) & 7;
c2c73b42
BS		 4973 if (address_mode == mode_64bit || index != 0x4)
4974 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4975 scale = (*codep >> 6) & 3;
dc99065b 4976 base = *codep & 7;
88103cfe
BS		 4977 USED_REX (REX_X);
4978 if (rex & REX_X)
bc51c5c9 4979 index += 8;
dc99065b
FB		 4980 codep++;
4981 }
c2c73b42 4982 base += add;
dc99065b 4983
88103cfe 4984 switch (modrm.mod)
dc99065b
FB		 4985 {
4986 case 0:
bc51c5c9 4987 if ((base & 7) == 5)
dc99065b
FB		 4988 {
4989 havebase = 0;
c2c73b42 4990 if (address_mode == mode_64bit && !havesib)
bc51c5c9
FB		 4991 riprel = 1;
4992 disp = get32s ();
dc99065b
FB		 4993 }
4994 break;
4995 case 1:
4996 FETCH_DATA (the_info, codep + 1);
4997 disp = *codep++;
4998 if ((disp & 0x80) != 0)
4999 disp -= 0x100;
5000 break;
5001 case 2:
bc51c5c9 5002 disp = get32s ();
dc99065b
FB		 5003 break;
5004 }
5005
88103cfe
BS		 5006 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5007
bc51c5c9 5008 if (!intel_syntax)
88103cfe 5009 if (modrm.mod != 0 || (base & 7) == 5)
c2c73b42 5010 {
88103cfe
BS		 5011 if (havedisp || riprel)
5012 print_displacement (scratchbuf, disp);
5013 else
5014 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
c2c73b42 5015 oappend (scratchbuf);
bc51c5c9
FB		 5016 if (riprel)
5017 {
5018 set_op (disp, 1);
5019 oappend ("(%rip)");
5020 }
c2c73b42 5021 }
dc99065b 5022
88103cfe 5023 if (havedisp || (intel_syntax && riprel))
dc99065b 5024 {
bc51c5c9
FB		 5025 *obufp++ = open_char;
5026 if (intel_syntax && riprel)
88103cfe
BS		 5027 {
5028 set_op (disp, 1);
5029 oappend ("rip");
5030 }
c2c73b42 5031 *obufp = '\0';
dc99065b 5032 if (havebase)
c2c73b42 5033 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
bc51c5c9 5034 ? names64[base] : names32[base]);
dc99065b
FB		 5035 if (havesib)
5036 {
5037 if (index != 4)
5038 {
c2c73b42
BS		 5039 if (!intel_syntax || havebase)
5040 {
5041 *obufp++ = separator_char;
5042 *obufp = '\0';
5043 }
5044 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5045 ? names64[index] : names32[index]);
5046 }
5047 if (scale != 0 || (!intel_syntax && index != 4))
5048 {
5049 *obufp++ = scale_char;
5050 *obufp = '\0';
5051 snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale);
dc99065b
FB		 5052 oappend (scratchbuf);
5053 }
dc99065b 5054 }
88103cfe
BS		 5055 if (intel_syntax
5056 && (disp || modrm.mod != 0 || (base & 7) == 5))
c2c73b42 5057 {
88103cfe 5058 if ((bfd_signed_vma) disp >= 0)
c2c73b42
BS		 5059 {
5060 *obufp++ = '+';
5061 *obufp = '\0';
5062 }
88103cfe 5063 else if (modrm.mod != 1)
c2c73b42
BS		 5064 {
5065 *obufp++ = '-';
5066 *obufp = '\0';
5067 disp = - (bfd_signed_vma) disp;
5068 }
5069
88103cfe 5070 print_displacement (scratchbuf, disp);
c2c73b42
BS		 5071 oappend (scratchbuf);
5072 }
bc51c5c9
FB		 5073
5074 *obufp++ = close_char;
c2c73b42 5075 *obufp = '\0';
dc99065b 5076 }
bc51c5c9 5077 else if (intel_syntax)
c2c73b42 5078 {
88103cfe 5079 if (modrm.mod != 0 || (base & 7) == 5)
c2c73b42 5080 {
bc51c5c9
FB		 5081 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5082 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5083 ;
5084 else
5085 {
5086 oappend (names_seg[ds_reg - es_reg]);
5087 oappend (":");
5088 }
c2c73b42
BS		 5089 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5090 oappend (scratchbuf);
5091 }
5092 }
dc99065b
FB		 5093 }
5094 else
5095 { /* 16 bit address mode */
88103cfe 5096 switch (modrm.mod)
dc99065b
FB		 5097 {
5098 case 0:
88103cfe 5099 if (modrm.rm == 6)
dc99065b
FB		 5100 {
5101 disp = get16 ();
5102 if ((disp & 0x8000) != 0)
5103 disp -= 0x10000;
5104 }
5105 break;
5106 case 1:
5107 FETCH_DATA (the_info, codep + 1);
5108 disp = *codep++;
5109 if ((disp & 0x80) != 0)
5110 disp -= 0x100;
5111 break;
5112 case 2:
5113 disp = get16 ();
5114 if ((disp & 0x8000) != 0)
5115 disp -= 0x10000;
5116 break;
5117 }
5118
bc51c5c9 5119 if (!intel_syntax)
88103cfe 5120 if (modrm.mod != 0 || modrm.rm == 6)
c2c73b42 5121 {
88103cfe 5122 print_displacement (scratchbuf, disp);
c2c73b42
BS		 5123 oappend (scratchbuf);
5124 }
dc99065b 5125
88103cfe 5126 if (modrm.mod != 0 || modrm.rm != 6)
dc99065b 5127 {
bc51c5c9 5128 *obufp++ = open_char;
c2c73b42 5129 *obufp = '\0';
88103cfe
BS		 5130 oappend (index16[modrm.rm]);
5131 if (intel_syntax
5132 && (disp || modrm.mod != 0 || modrm.rm == 6))
c2c73b42 5133 {
88103cfe 5134 if ((bfd_signed_vma) disp >= 0)
c2c73b42
BS		 5135 {
5136 *obufp++ = '+';
5137 *obufp = '\0';
5138 }
88103cfe 5139 else if (modrm.mod != 1)
c2c73b42
BS		 5140 {
5141 *obufp++ = '-';
5142 *obufp = '\0';
5143 disp = - (bfd_signed_vma) disp;
5144 }
5145
88103cfe 5146 print_displacement (scratchbuf, disp);
c2c73b42
BS		 5147 oappend (scratchbuf);
5148 }
5149
5150 *obufp++ = close_char;
5151 *obufp = '\0';
5152 }
5153 else if (intel_syntax)
5154 {
5155 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5156 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5157 ;
5158 else
5159 {
5160 oappend (names_seg[ds_reg - es_reg]);
5161 oappend (":");
5162 }
5163 print_operand_value (scratchbuf, sizeof(scratchbuf), 1,
5164 disp & 0xffff);
5165 oappend (scratchbuf);
dc99065b
FB		 5166 }
5167 }
dc99065b
FB		 5168}
5169
bc51c5c9 5170static void
c2c73b42 5171OP_G (int bytemode, int sizeflag)
dc99065b 5172{
bc51c5c9 5173 int add = 0;
88103cfe
BS		 5174 USED_REX (REX_R);
5175 if (rex & REX_R)
bc51c5c9
FB		 5176 add += 8;
5177 switch (bytemode)
dc99065b
FB		 5178 {
5179 case b_mode:
bc51c5c9
FB		 5180 USED_REX (0);
5181 if (rex)
88103cfe 5182 oappend (names8rex[modrm.reg + add]);
bc51c5c9 5183 else
88103cfe 5184 oappend (names8[modrm.reg + add]);
dc99065b
FB		 5185 break;
5186 case w_mode:
88103cfe 5187 oappend (names16[modrm.reg + add]);
dc99065b
FB		 5188 break;
5189 case d_mode:
88103cfe 5190 oappend (names32[modrm.reg + add]);
bc51c5c9
FB		 5191 break;
5192 case q_mode:
88103cfe 5193 oappend (names64[modrm.reg + add]);
dc99065b
FB		 5194 break;
5195 case v_mode:
c2c73b42 5196 case dq_mode:
88103cfe
BS		 5197 case dqb_mode:
5198 case dqd_mode:
c2c73b42 5199 case dqw_mode:
88103cfe
BS		 5200 USED_REX (REX_W);
5201 if (rex & REX_W)
5202 oappend (names64[modrm.reg + add]);
c2c73b42 5203 else if ((sizeflag & DFLAG) || bytemode != v_mode)
88103cfe 5204 oappend (names32[modrm.reg + add]);
dc99065b 5205 else
88103cfe 5206 oappend (names16[modrm.reg + add]);
bc51c5c9 5207 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b 5208 break;
c2c73b42
BS		 5209 case m_mode:
5210 if (address_mode == mode_64bit)
88103cfe 5211 oappend (names64[modrm.reg + add]);
c2c73b42 5212 else
88103cfe 5213 oappend (names32[modrm.reg + add]);
c2c73b42 5214 break;
dc99065b 5215 default:
bc51c5c9 5216 oappend (INTERNAL_DISASSEMBLER_ERROR);
dc99065b
FB		 5217 break;
5218 }
dc99065b
FB		 5219}
5220
bc51c5c9 5221static bfd_vma
c2c73b42 5222get64 (void)
bc51c5c9
FB		 5223{
5224 bfd_vma x;
5225#ifdef BFD64
5226 unsigned int a;
5227 unsigned int b;
5228
5229 FETCH_DATA (the_info, codep + 8);
5230 a = *codep++ & 0xff;
5231 a |= (*codep++ & 0xff) << 8;
5232 a |= (*codep++ & 0xff) << 16;
5233 a |= (*codep++ & 0xff) << 24;
5234 b = *codep++ & 0xff;
5235 b |= (*codep++ & 0xff) << 8;
5236 b |= (*codep++ & 0xff) << 16;
5237 b |= (*codep++ & 0xff) << 24;
5238 x = a + ((bfd_vma) b << 32);
5239#else
5240 abort ();
5241 x = 0;
5242#endif
5243 return x;
5244}
5245
5246static bfd_signed_vma
c2c73b42 5247get32 (void)
dc99065b 5248{
bc51c5c9 5249 bfd_signed_vma x = 0;
dc99065b
FB		 5250
5251 FETCH_DATA (the_info, codep + 4);
bc51c5c9
FB		 5252 x = *codep++ & (bfd_signed_vma) 0xff;
5253 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5254 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5255 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5256 return x;
5257}
5258
5259static bfd_signed_vma
c2c73b42 5260get32s (void)
bc51c5c9
FB		 5261{
5262 bfd_signed_vma x = 0;
5263
5264 FETCH_DATA (the_info, codep + 4);
5265 x = *codep++ & (bfd_signed_vma) 0xff;
5266 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5267 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5268 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5269
5270 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5271
5272 return x;
dc99065b
FB		 5273}
5274
5275static int
c2c73b42 5276get16 (void)
dc99065b
FB		 5277{
5278 int x = 0;
5279
5280 FETCH_DATA (the_info, codep + 2);
5281 x = *codep++ & 0xff;
5282 x |= (*codep++ & 0xff) << 8;
bc51c5c9 5283 return x;
dc99065b
FB		 5284}
5285
5286static void
c2c73b42 5287set_op (bfd_vma op, int riprel)
dc99065b
FB		 5288{
5289 op_index[op_ad] = op_ad;
c2c73b42 5290 if (address_mode == mode_64bit)
bc51c5c9
FB		 5291 {
5292 op_address[op_ad] = op;
5293 op_riprel[op_ad] = riprel;
5294 }
5295 else
5296 {
5297 /* Mask to get a 32-bit address. */
5298 op_address[op_ad] = op & 0xffffffff;
5299 op_riprel[op_ad] = riprel & 0xffffffff;
5300 }
dc99065b
FB		 5301}
5302
bc51c5c9 5303static void
c2c73b42 5304OP_REG (int code, int sizeflag)
bc51c5c9
FB		 5305{
5306 const char *s;
5307 int add = 0;
88103cfe
BS		 5308 USED_REX (REX_B);
5309 if (rex & REX_B)
bc51c5c9
FB		 5310 add = 8;
5311
5312 switch (code)
5313 {
bc51c5c9
FB		 5314 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5315 case sp_reg: case bp_reg: case si_reg: case di_reg:
5316 s = names16[code - ax_reg + add];
5317 break;
5318 case es_reg: case ss_reg: case cs_reg:
5319 case ds_reg: case fs_reg: case gs_reg:
5320 s = names_seg[code - es_reg + add];
5321 break;
5322 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5323 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5324 USED_REX (0);
5325 if (rex)
5326 s = names8rex[code - al_reg + add];
5327 else
5328 s = names8[code - al_reg];
5329 break;
5330 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5331 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
c2c73b42 5332 if (address_mode == mode_64bit && (sizeflag & DFLAG))
bc51c5c9
FB		 5333 {
5334 s = names64[code - rAX_reg + add];
5335 break;
5336 }
5337 code += eAX_reg - rAX_reg;
5338 /* Fall through. */
5339 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5340 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
88103cfe
BS		 5341 USED_REX (REX_W);
5342 if (rex & REX_W)
bc51c5c9
FB		 5343 s = names64[code - eAX_reg + add];
5344 else if (sizeflag & DFLAG)
5345 s = names32[code - eAX_reg + add];
5346 else
5347 s = names16[code - eAX_reg + add];
5348 used_prefixes |= (prefixes & PREFIX_DATA);
5349 break;
5350 default:
5351 s = INTERNAL_DISASSEMBLER_ERROR;
5352 break;
5353 }
5354 oappend (s);
5355}
5356
5357static void
c2c73b42 5358OP_IMREG (int code, int sizeflag)
dc99065b 5359{
bc51c5c9
FB		 5360 const char *s;
5361
5362 switch (code)
dc99065b 5363 {
bc51c5c9
FB		 5364 case indir_dx_reg:
5365 if (intel_syntax)
88103cfe 5366 s = "dx";
bc51c5c9 5367 else
c2c73b42 5368 s = "(%dx)";
bc51c5c9
FB		 5369 break;
5370 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5371 case sp_reg: case bp_reg: case si_reg: case di_reg:
5372 s = names16[code - ax_reg];
5373 break;
5374 case es_reg: case ss_reg: case cs_reg:
5375 case ds_reg: case fs_reg: case gs_reg:
5376 s = names_seg[code - es_reg];
5377 break;
5378 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5379 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5380 USED_REX (0);
5381 if (rex)
5382 s = names8rex[code - al_reg];
5383 else
5384 s = names8[code - al_reg];
5385 break;
5386 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5387 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
88103cfe
BS		 5388 USED_REX (REX_W);
5389 if (rex & REX_W)
bc51c5c9
FB		 5390 s = names64[code - eAX_reg];
5391 else if (sizeflag & DFLAG)
dc99065b
FB		 5392 s = names32[code - eAX_reg];
5393 else
5394 s = names16[code - eAX_reg];
bc51c5c9 5395 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b 5396 break;
88103cfe
BS		 5397 case z_mode_ax_reg:
5398 if ((rex & REX_W) || (sizeflag & DFLAG))
5399 s = *names32;
5400 else
5401 s = *names16;
5402 if (!(rex & REX_W))
5403 used_prefixes |= (prefixes & PREFIX_DATA);
5404 break;
dc99065b 5405 default:
bc51c5c9 5406 s = INTERNAL_DISASSEMBLER_ERROR;
dc99065b
FB		 5407 break;
5408 }
5409 oappend (s);
dc99065b
FB		 5410}
5411
bc51c5c9 5412static void
c2c73b42 5413OP_I (int bytemode, int sizeflag)
bc51c5c9
FB		 5414{
5415 bfd_signed_vma op;
5416 bfd_signed_vma mask = -1;
5417
5418 switch (bytemode)
5419 {
5420 case b_mode:
5421 FETCH_DATA (the_info, codep + 1);
5422 op = *codep++;
5423 mask = 0xff;
5424 break;
5425 case q_mode:
c2c73b42 5426 if (address_mode == mode_64bit)
bc51c5c9
FB		 5427 {
5428 op = get32s ();
5429 break;
5430 }
5431 /* Fall through. */
5432 case v_mode:
88103cfe
BS		 5433 USED_REX (REX_W);
5434 if (rex & REX_W)
bc51c5c9
FB		 5435 op = get32s ();
5436 else if (sizeflag & DFLAG)
5437 {
5438 op = get32 ();
5439 mask = 0xffffffff;
5440 }
5441 else
5442 {
5443 op = get16 ();
5444 mask = 0xfffff;
5445 }
5446 used_prefixes |= (prefixes & PREFIX_DATA);
5447 break;
5448 case w_mode:
5449 mask = 0xfffff;
5450 op = get16 ();
5451 break;
c2c73b42
BS		 5452 case const_1_mode:
5453 if (intel_syntax)
5454 oappend ("1");
5455 return;
bc51c5c9
FB		 5456 default:
5457 oappend (INTERNAL_DISASSEMBLER_ERROR);
5458 return;
5459 }
5460
5461 op &= mask;
5462 scratchbuf[0] = '$';
363a37d5 5463 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
bc51c5c9
FB		 5464 oappend (scratchbuf + intel_syntax);
5465 scratchbuf[0] = '\0';
5466}
5467
5468static void
c2c73b42 5469OP_I64 (int bytemode, int sizeflag)
dc99065b 5470{
bc51c5c9
FB		 5471 bfd_signed_vma op;
5472 bfd_signed_vma mask = -1;
5473
c2c73b42 5474 if (address_mode != mode_64bit)
bc51c5c9
FB		 5475 {
5476 OP_I (bytemode, sizeflag);
5477 return;
5478 }
5479
5480 switch (bytemode)
dc99065b
FB		 5481 {
5482 case b_mode:
5483 FETCH_DATA (the_info, codep + 1);
bc51c5c9
FB		 5484 op = *codep++;
5485 mask = 0xff;
dc99065b
FB		 5486 break;
5487 case v_mode:
88103cfe
BS		 5488 USED_REX (REX_W);
5489 if (rex & REX_W)
bc51c5c9
FB		 5490 op = get64 ();
5491 else if (sizeflag & DFLAG)
5492 {
5493 op = get32 ();
5494 mask = 0xffffffff;
5495 }
dc99065b 5496 else
bc51c5c9
FB		 5497 {
5498 op = get16 ();
5499 mask = 0xfffff;
5500 }
5501 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 5502 break;
5503 case w_mode:
bc51c5c9 5504 mask = 0xfffff;
dc99065b
FB		 5505 op = get16 ();
5506 break;
5507 default:
bc51c5c9
FB		 5508 oappend (INTERNAL_DISASSEMBLER_ERROR);
5509 return;
dc99065b 5510 }
bc51c5c9
FB		 5511
5512 op &= mask;
5513 scratchbuf[0] = '$';
363a37d5 5514 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
bc51c5c9
FB		 5515 oappend (scratchbuf + intel_syntax);
5516 scratchbuf[0] = '\0';
dc99065b
FB		 5517}
5518
bc51c5c9 5519static void
c2c73b42 5520OP_sI (int bytemode, int sizeflag)
dc99065b 5521{
bc51c5c9
FB		 5522 bfd_signed_vma op;
5523 bfd_signed_vma mask = -1;
5524
5525 switch (bytemode)
dc99065b
FB		 5526 {
5527 case b_mode:
5528 FETCH_DATA (the_info, codep + 1);
5529 op = *codep++;
5530 if ((op & 0x80) != 0)
5531 op -= 0x100;
bc51c5c9 5532 mask = 0xffffffff;
dc99065b
FB		 5533 break;
5534 case v_mode:
88103cfe
BS		 5535 USED_REX (REX_W);
5536 if (rex & REX_W)
bc51c5c9
FB		 5537 op = get32s ();
5538 else if (sizeflag & DFLAG)
5539 {
5540 op = get32s ();
5541 mask = 0xffffffff;
5542 }
dc99065b
FB		 5543 else
5544 {
bc51c5c9
FB		 5545 mask = 0xffffffff;
5546 op = get16 ();
dc99065b
FB		 5547 if ((op & 0x8000) != 0)
5548 op -= 0x10000;
5549 }
bc51c5c9 5550 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 5551 break;
5552 case w_mode:
5553 op = get16 ();
bc51c5c9 5554 mask = 0xffffffff;
dc99065b
FB		 5555 if ((op & 0x8000) != 0)
5556 op -= 0x10000;
5557 break;
5558 default:
bc51c5c9
FB		 5559 oappend (INTERNAL_DISASSEMBLER_ERROR);
5560 return;
dc99065b 5561 }
bc51c5c9
FB		 5562
5563 scratchbuf[0] = '$';
363a37d5 5564 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
bc51c5c9 5565 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5566}
5567
bc51c5c9 5568static void
c2c73b42 5569OP_J (int bytemode, int sizeflag)
dc99065b 5570{
bc51c5c9
FB		 5571 bfd_vma disp;
5572 bfd_vma mask = -1;
88103cfe 5573 bfd_vma segment = 0;
bc51c5c9
FB		 5574
5575 switch (bytemode)
dc99065b
FB		 5576 {
5577 case b_mode:
5578 FETCH_DATA (the_info, codep + 1);
5579 disp = *codep++;
5580 if ((disp & 0x80) != 0)
5581 disp -= 0x100;
5582 break;
5583 case v_mode:
88103cfe 5584 if ((sizeflag & DFLAG) || (rex & REX_W))
bc51c5c9 5585 disp = get32s ();
dc99065b
FB		 5586 else
5587 {
5588 disp = get16 ();
88103cfe
BS		 5589 if ((disp & 0x8000) != 0)
5590 disp -= 0x10000;
5591 /* In 16bit mode, address is wrapped around at 64k within
5592 the same segment. Otherwise, a data16 prefix on a jump
5593 instruction means that the pc is masked to 16 bits after
5594 the displacement is added! */
dc99065b 5595 mask = 0xffff;
88103cfe
BS		 5596 if ((prefixes & PREFIX_DATA) == 0)
5597 segment = ((start_pc + codep - start_codep)
5598 & ~((bfd_vma) 0xffff));
dc99065b 5599 }
88103cfe 5600 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 5601 break;
5602 default:
bc51c5c9
FB		 5603 oappend (INTERNAL_DISASSEMBLER_ERROR);
5604 return;
dc99065b 5605 }
88103cfe 5606 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
bc51c5c9 5607 set_op (disp, 0);
363a37d5 5608 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
dc99065b 5609 oappend (scratchbuf);
dc99065b
FB		 5610}
5611
bc51c5c9 5612static void
88103cfe 5613OP_SEG (int bytemode, int sizeflag)
dc99065b 5614{
88103cfe
BS		 5615 if (bytemode == w_mode)
5616 oappend (names_seg[modrm.reg]);
5617 else
5618 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
dc99065b
FB		 5619}
5620
bc51c5c9 5621static void
c2c73b42 5622OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
dc99065b
FB		 5623{
5624 int seg, offset;
bc51c5c9
FB		 5625
5626 if (sizeflag & DFLAG)
dc99065b 5627 {
bc51c5c9
FB		 5628 offset = get32 ();
5629 seg = get16 ();
dc99065b 5630 }
bc51c5c9
FB		 5631 else
5632 {
5633 offset = get16 ();
5634 seg = get16 ();
5635 }
5636 used_prefixes |= (prefixes & PREFIX_DATA);
5637 if (intel_syntax)
c2c73b42 5638 snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset);
bc51c5c9 5639 else
363a37d5 5640 snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset);
bc51c5c9 5641 oappend (scratchbuf);
dc99065b
FB		 5642}
5643
bc51c5c9 5644static void
c2c73b42 5645OP_OFF (int bytemode, int sizeflag)
dc99065b 5646{
bc51c5c9 5647 bfd_vma off;
dc99065b 5648
c2c73b42
BS		 5649 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5650 intel_operand_size (bytemode, sizeflag);
bc51c5c9 5651 append_seg ();
dc99065b 5652
c2c73b42 5653 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
dc99065b
FB		 5654 off = get32 ();
5655 else
5656 off = get16 ();
bc51c5c9
FB		 5657
5658 if (intel_syntax)
5659 {
5660 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
c2c73b42 5661 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
bc51c5c9
FB		 5662 {
5663 oappend (names_seg[ds_reg - es_reg]);
5664 oappend (":");
5665 }
5666 }
363a37d5 5667 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
dc99065b 5668 oappend (scratchbuf);
dc99065b
FB		 5669}
5670
bc51c5c9 5671static void
c2c73b42 5672OP_OFF64 (int bytemode, int sizeflag)
dc99065b 5673{
bc51c5c9
FB		 5674 bfd_vma off;
5675
88103cfe
BS		 5676 if (address_mode != mode_64bit
5677 || (prefixes & PREFIX_ADDR))
bc51c5c9
FB		 5678 {
5679 OP_OFF (bytemode, sizeflag);
5680 return;
5681 }
5682
c2c73b42
BS		 5683 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5684 intel_operand_size (bytemode, sizeflag);
bc51c5c9
FB		 5685 append_seg ();
5686
5687 off = get64 ();
5688
5689 if (intel_syntax)
5690 {
5691 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
c2c73b42 5692 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
bc51c5c9
FB		 5693 {
5694 oappend (names_seg[ds_reg - es_reg]);
5695 oappend (":");
5696 }
5697 }
363a37d5 5698 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
bc51c5c9 5699 oappend (scratchbuf);
dc99065b
FB		 5700}
5701
bc51c5c9 5702static void
c2c73b42 5703ptr_reg (int code, int sizeflag)
bc51c5c9
FB		 5704{
5705 const char *s;
bc51c5c9 5706
c2c73b42
BS		 5707 *obufp++ = open_char;
5708 used_prefixes |= (prefixes & PREFIX_ADDR);
5709 if (address_mode == mode_64bit)
bc51c5c9
FB		 5710 {
5711 if (!(sizeflag & AFLAG))
c2c73b42 5712 s = names32[code - eAX_reg];
bc51c5c9 5713 else
c2c73b42 5714 s = names64[code - eAX_reg];
bc51c5c9
FB		 5715 }
5716 else if (sizeflag & AFLAG)
5717 s = names32[code - eAX_reg];
5718 else
5719 s = names16[code - eAX_reg];
5720 oappend (s);
c2c73b42
BS		 5721 *obufp++ = close_char;
5722 *obufp = 0;
bc51c5c9
FB		 5723}
5724
5725static void
c2c73b42 5726OP_ESreg (int code, int sizeflag)
bc51c5c9 5727{
c2c73b42 5728 if (intel_syntax)
88103cfe
BS		 5729 {
5730 switch (codep[-1])
5731 {
5732 case 0x6d: /* insw/insl */
5733 intel_operand_size (z_mode, sizeflag);
5734 break;
5735 case 0xa5: /* movsw/movsl/movsq */
5736 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5737 case 0xab: /* stosw/stosl */
5738 case 0xaf: /* scasw/scasl */
5739 intel_operand_size (v_mode, sizeflag);
5740 break;
5741 default:
5742 intel_operand_size (b_mode, sizeflag);
5743 }
5744 }
bc51c5c9
FB		 5745 oappend ("%es:" + intel_syntax);
5746 ptr_reg (code, sizeflag);
5747}
5748
5749static void
c2c73b42 5750OP_DSreg (int code, int sizeflag)
dc99065b 5751{
c2c73b42 5752 if (intel_syntax)
88103cfe
BS		 5753 {
5754 switch (codep[-1])
5755 {
5756 case 0x6f: /* outsw/outsl */
5757 intel_operand_size (z_mode, sizeflag);
5758 break;
5759 case 0xa5: /* movsw/movsl/movsq */
5760 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5761 case 0xad: /* lodsw/lodsl/lodsq */
5762 intel_operand_size (v_mode, sizeflag);
5763 break;
5764 default:
5765 intel_operand_size (b_mode, sizeflag);
5766 }
5767 }
dc99065b
FB		 5768 if ((prefixes
5769 & (PREFIX_CS
5770 | PREFIX_DS
5771 | PREFIX_SS
5772 | PREFIX_ES
5773 | PREFIX_FS
5774 | PREFIX_GS)) == 0)
5775 prefixes |= PREFIX_DS;
bc51c5c9
FB		 5776 append_seg ();
5777 ptr_reg (code, sizeflag);
dc99065b
FB		 5778}
5779
bc51c5c9 5780static void
c2c73b42 5781OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5782{
bc51c5c9 5783 int add = 0;
88103cfe 5784 if (rex & REX_R)
c2c73b42 5785 {
88103cfe 5786 USED_REX (REX_R);
c2c73b42
BS		 5787 add = 8;
5788 }
5789 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5790 {
5791 used_prefixes |= PREFIX_LOCK;
5792 add = 8;
5793 }
88103cfe 5794 snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add);
bc51c5c9 5795 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5796}
5797
bc51c5c9 5798static void
c2c73b42 5799OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5800{
bc51c5c9 5801 int add = 0;
88103cfe
BS		 5802 USED_REX (REX_R);
5803 if (rex & REX_R)
bc51c5c9
FB		 5804 add = 8;
5805 if (intel_syntax)
88103cfe 5806 snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add);
bc51c5c9 5807 else
88103cfe 5808 snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add);
dc99065b 5809 oappend (scratchbuf);
dc99065b
FB		 5810}
5811
bc51c5c9 5812static void
c2c73b42 5813OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5814{
88103cfe 5815 snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg);
bc51c5c9 5816 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5817}
5818
bc51c5c9 5819static void
88103cfe 5820OP_R (int bytemode, int sizeflag)
dc99065b 5821{
88103cfe 5822 if (modrm.mod == 3)
bc51c5c9
FB		 5823 OP_E (bytemode, sizeflag);
5824 else
5825 BadOp ();
dc99065b
FB		 5826}
5827
bc51c5c9 5828static void
c2c73b42 5829OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5830{
bc51c5c9
FB		 5831 used_prefixes |= (prefixes & PREFIX_DATA);
5832 if (prefixes & PREFIX_DATA)
c2c73b42
BS		 5833 {
5834 int add = 0;
88103cfe
BS		 5835 USED_REX (REX_R);
5836 if (rex & REX_R)
c2c73b42 5837 add = 8;
88103cfe 5838 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
c2c73b42 5839 }
bc51c5c9 5840 else
88103cfe 5841 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
bc51c5c9 5842 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5843}
5844
bc51c5c9 5845static void
c2c73b42 5846OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5847{
bc51c5c9 5848 int add = 0;
88103cfe
BS		 5849 USED_REX (REX_R);
5850 if (rex & REX_R)
bc51c5c9 5851 add = 8;
88103cfe 5852 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
bc51c5c9 5853 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5854}
5855
bc51c5c9 5856static void
c2c73b42 5857OP_EM (int bytemode, int sizeflag)
dc99065b 5858{
88103cfe 5859 if (modrm.mod != 3)
bc51c5c9 5860 {
c2c73b42
BS		 5861 if (intel_syntax && bytemode == v_mode)
5862 {
5863 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5864 used_prefixes |= (prefixes & PREFIX_DATA);
5865 }
bc51c5c9
FB		 5866 OP_E (bytemode, sizeflag);
5867 return;
5868 }
dc99065b 5869
bc51c5c9
FB		 5870 /* Skip mod/rm byte. */
5871 MODRM_CHECK;
dc99065b 5872 codep++;
bc51c5c9
FB		 5873 used_prefixes |= (prefixes & PREFIX_DATA);
5874 if (prefixes & PREFIX_DATA)
c2c73b42
BS		 5875 {
5876 int add = 0;
5877
88103cfe
BS		 5878 USED_REX (REX_B);
5879 if (rex & REX_B)
c2c73b42 5880 add = 8;
88103cfe 5881 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
c2c73b42 5882 }
bc51c5c9 5883 else
88103cfe 5884 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
bc51c5c9 5885 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5886}
5887
88103cfe
BS		 5888/* cvt* are the only instructions in sse2 which have
5889 both SSE and MMX operands and also have 0x66 prefix
5890 in their opcode. 0x66 was originally used to differentiate
5891 between SSE and MMX instruction(operands). So we have to handle the
5892 cvt* separately using OP_EMC and OP_MXC */
bc51c5c9 5893static void
88103cfe 5894OP_EMC (int bytemode, int sizeflag)
dc99065b 5895{
88103cfe 5896 if (modrm.mod != 3)
bc51c5c9 5897 {
c2c73b42
BS		 5898 if (intel_syntax && bytemode == v_mode)
5899 {
88103cfe
BS		 5900 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5901 used_prefixes |= (prefixes & PREFIX_DATA);
5902 }
5903 OP_E (bytemode, sizeflag);
5904 return;
5905 }
5906
5907 /* Skip mod/rm byte. */
5908 MODRM_CHECK;
5909 codep++;
5910 used_prefixes |= (prefixes & PREFIX_DATA);
5911 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
5912 oappend (scratchbuf + intel_syntax);
5913}
5914
5915static void
5916OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5917{
5918 used_prefixes |= (prefixes & PREFIX_DATA);
5919 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
5920 oappend (scratchbuf + intel_syntax);
5921}
5922
5923static void
5924OP_EX (int bytemode, int sizeflag)
5925{
5926 int add = 0;
5927 if (modrm.mod != 3)
5928 {
bc51c5c9
FB		 5929 OP_E (bytemode, sizeflag);
5930 return;
5931 }
88103cfe
BS		 5932 USED_REX (REX_B);
5933 if (rex & REX_B)
bc51c5c9
FB		 5934 add = 8;
5935
5936 /* Skip mod/rm byte. */
5937 MODRM_CHECK;
5938 codep++;
88103cfe 5939 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
bc51c5c9
FB		 5940 oappend (scratchbuf + intel_syntax);
5941}
5942
5943static void
c2c73b42 5944OP_MS (int bytemode, int sizeflag)
bc51c5c9 5945{
88103cfe 5946 if (modrm.mod == 3)
bc51c5c9
FB		 5947 OP_EM (bytemode, sizeflag);
5948 else
5949 BadOp ();
5950}
5951
5952static void
c2c73b42 5953OP_XS (int bytemode, int sizeflag)
bc51c5c9 5954{
88103cfe 5955 if (modrm.mod == 3)
bc51c5c9
FB		 5956 OP_EX (bytemode, sizeflag);
5957 else
5958 BadOp ();
5959}
5960
c2c73b42
BS		 5961static void
5962OP_M (int bytemode, int sizeflag)
5963{
88103cfe
BS		 5964 if (modrm.mod == 3)
5965 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5966 BadOp ();
c2c73b42
BS		 5967 else
5968 OP_E (bytemode, sizeflag);
5969}
5970
5971static void
5972OP_0f07 (int bytemode, int sizeflag)
5973{
88103cfe 5974 if (modrm.mod != 3 || modrm.rm != 0)
c2c73b42
BS		 5975 BadOp ();
5976 else
5977 OP_E (bytemode, sizeflag);
5978}
5979
5980static void
5981OP_0fae (int bytemode, int sizeflag)
5982{
88103cfe 5983 if (modrm.mod == 3)
c2c73b42 5984 {
88103cfe 5985 if (modrm.reg == 7)
c2c73b42
BS		 5986 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5987
88103cfe 5988 if (modrm.reg < 5 || modrm.rm != 0)
c2c73b42
BS		 5989 {
5990 BadOp (); /* bad sfence, mfence, or lfence */
5991 return;
5992 }
5993 }
88103cfe 5994 else if (modrm.reg != 7)
c2c73b42
BS		 5995 {
5996 BadOp (); /* bad clflush */
5997 return;
5998 }
5999
6000 OP_E (bytemode, sizeflag);
6001}
6002
88103cfe
BS		 6003/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6004 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6005
6006static void
6007NOP_Fixup1 (int bytemode, int sizeflag)
6008{
6009 if ((prefixes & PREFIX_DATA) != 0
6010 || (rex != 0
6011 && rex != 0x48
6012 && address_mode == mode_64bit))
6013 OP_REG (bytemode, sizeflag);
6014 else
6015 strcpy (obuf, "nop");
6016}
6017
c2c73b42 6018static void
88103cfe 6019NOP_Fixup2 (int bytemode, int sizeflag)
c2c73b42 6020{
88103cfe
BS		 6021 if ((prefixes & PREFIX_DATA) != 0
6022 || (rex != 0
6023 && rex != 0x48
6024 && address_mode == mode_64bit))
6025 OP_IMREG (bytemode, sizeflag);
c2c73b42
BS		 6026}
6027
bc51c5c9
FB		 6028static const char *Suffix3DNow[] = {
6029/* 00 */ NULL, NULL, NULL, NULL,
6030/* 04 */ NULL, NULL, NULL, NULL,
6031/* 08 */ NULL, NULL, NULL, NULL,
6032/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6033/* 10 */ NULL, NULL, NULL, NULL,
6034/* 14 */ NULL, NULL, NULL, NULL,
6035/* 18 */ NULL, NULL, NULL, NULL,
6036/* 1C */ "pf2iw", "pf2id", NULL, NULL,
6037/* 20 */ NULL, NULL, NULL, NULL,
6038/* 24 */ NULL, NULL, NULL, NULL,
6039/* 28 */ NULL, NULL, NULL, NULL,
6040/* 2C */ NULL, NULL, NULL, NULL,
6041/* 30 */ NULL, NULL, NULL, NULL,
6042/* 34 */ NULL, NULL, NULL, NULL,
6043/* 38 */ NULL, NULL, NULL, NULL,
6044/* 3C */ NULL, NULL, NULL, NULL,
6045/* 40 */ NULL, NULL, NULL, NULL,
6046/* 44 */ NULL, NULL, NULL, NULL,
6047/* 48 */ NULL, NULL, NULL, NULL,
6048/* 4C */ NULL, NULL, NULL, NULL,
6049/* 50 */ NULL, NULL, NULL, NULL,
6050/* 54 */ NULL, NULL, NULL, NULL,
6051/* 58 */ NULL, NULL, NULL, NULL,
6052/* 5C */ NULL, NULL, NULL, NULL,
6053/* 60 */ NULL, NULL, NULL, NULL,
6054/* 64 */ NULL, NULL, NULL, NULL,
6055/* 68 */ NULL, NULL, NULL, NULL,
6056/* 6C */ NULL, NULL, NULL, NULL,
6057/* 70 */ NULL, NULL, NULL, NULL,
6058/* 74 */ NULL, NULL, NULL, NULL,
6059/* 78 */ NULL, NULL, NULL, NULL,
6060/* 7C */ NULL, NULL, NULL, NULL,
6061/* 80 */ NULL, NULL, NULL, NULL,
6062/* 84 */ NULL, NULL, NULL, NULL,
6063/* 88 */ NULL, NULL, "pfnacc", NULL,
6064/* 8C */ NULL, NULL, "pfpnacc", NULL,
6065/* 90 */ "pfcmpge", NULL, NULL, NULL,
6066/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6067/* 98 */ NULL, NULL, "pfsub", NULL,
6068/* 9C */ NULL, NULL, "pfadd", NULL,
6069/* A0 */ "pfcmpgt", NULL, NULL, NULL,
6070/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6071/* A8 */ NULL, NULL, "pfsubr", NULL,
6072/* AC */ NULL, NULL, "pfacc", NULL,
6073/* B0 */ "pfcmpeq", NULL, NULL, NULL,
88103cfe 6074/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
bc51c5c9
FB		 6075/* B8 */ NULL, NULL, NULL, "pswapd",
6076/* BC */ NULL, NULL, NULL, "pavgusb",
6077/* C0 */ NULL, NULL, NULL, NULL,
6078/* C4 */ NULL, NULL, NULL, NULL,
6079/* C8 */ NULL, NULL, NULL, NULL,
6080/* CC */ NULL, NULL, NULL, NULL,
6081/* D0 */ NULL, NULL, NULL, NULL,
6082/* D4 */ NULL, NULL, NULL, NULL,
6083/* D8 */ NULL, NULL, NULL, NULL,
6084/* DC */ NULL, NULL, NULL, NULL,
6085/* E0 */ NULL, NULL, NULL, NULL,
6086/* E4 */ NULL, NULL, NULL, NULL,
6087/* E8 */ NULL, NULL, NULL, NULL,
6088/* EC */ NULL, NULL, NULL, NULL,
6089/* F0 */ NULL, NULL, NULL, NULL,
6090/* F4 */ NULL, NULL, NULL, NULL,
6091/* F8 */ NULL, NULL, NULL, NULL,
6092/* FC */ NULL, NULL, NULL, NULL,
6093};
6094
6095static void
c2c73b42 6096OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
bc51c5c9
FB		 6097{
6098 const char *mnemonic;
6099
6100 FETCH_DATA (the_info, codep + 1);
6101 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6102 place where an 8-bit immediate would normally go. ie. the last
6103 byte of the instruction. */
6104 obufp = obuf + strlen (obuf);
6105 mnemonic = Suffix3DNow[*codep++ & 0xff];
6106 if (mnemonic)
6107 oappend (mnemonic);
6108 else
6109 {
6110 /* Since a variable sized modrm/sib chunk is between the start
6111 of the opcode (0x0f0f) and the opcode suffix, we need to do
6112 all the modrm processing first, and don't know until now that
6113 we have a bad opcode. This necessitates some cleaning up. */
88103cfe
BS		 6114 op_out[0][0] = '\0';
6115 op_out[1][0] = '\0';
bc51c5c9
FB		 6116 BadOp ();
6117 }
6118}
6119
6120static const char *simd_cmp_op[] = {
6121 "eq",
6122 "lt",
6123 "le",
6124 "unord",
6125 "neq",
6126 "nlt",
6127 "nle",
6128 "ord"
6129};
6130
6131static void
c2c73b42 6132OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
bc51c5c9
FB		 6133{
6134 unsigned int cmp_type;
6135
6136 FETCH_DATA (the_info, codep + 1);
6137 obufp = obuf + strlen (obuf);
6138 cmp_type = *codep++ & 0xff;
6139 if (cmp_type < 8)
6140 {
6141 char suffix1 = 'p', suffix2 = 's';
6142 used_prefixes |= (prefixes & PREFIX_REPZ);
6143 if (prefixes & PREFIX_REPZ)
6144 suffix1 = 's';
6145 else
6146 {
6147 used_prefixes |= (prefixes & PREFIX_DATA);
6148 if (prefixes & PREFIX_DATA)
6149 suffix2 = 'd';
6150 else
6151 {
6152 used_prefixes |= (prefixes & PREFIX_REPNZ);
6153 if (prefixes & PREFIX_REPNZ)
6154 suffix1 = 's', suffix2 = 'd';
6155 }
6156 }
363a37d5
BS		 6157 snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c",
6158 simd_cmp_op[cmp_type], suffix1, suffix2);
bc51c5c9
FB		 6159 used_prefixes |= (prefixes & PREFIX_REPZ);
6160 oappend (scratchbuf);
6161 }
6162 else
6163 {
6164 /* We have a bad extension byte. Clean up. */
88103cfe
BS		 6165 op_out[0][0] = '\0';
6166 op_out[1][0] = '\0';
bc51c5c9
FB		 6167 BadOp ();
6168 }
6169}
6170
6171static void
c2c73b42 6172SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
bc51c5c9
FB		 6173{
6174 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6175 forms of these instructions. */
88103cfe 6176 if (modrm.mod == 3)
bc51c5c9
FB		 6177 {
6178 char *p = obuf + strlen (obuf);
6179 *(p + 1) = '\0';
6180 *p = *(p - 1);
6181 *(p - 1) = *(p - 2);
6182 *(p - 2) = *(p - 3);
6183 *(p - 3) = extrachar;
6184 }
6185}
6186
c2c73b42
BS		 6187static void
6188PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6189{
88103cfe 6190 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
c2c73b42
BS		 6191 {
6192 /* Override "sidt". */
6193 size_t olen = strlen (obuf);
6194 char *p = obuf + olen - 4;
6195 const char * const *names = (address_mode == mode_64bit
6196 ? names64 : names32);
6197
6198 /* We might have a suffix when disassembling with -Msuffix. */
6199 if (*p == 'i')
6200 --p;
6201
6202 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6203 if (!intel_syntax
6204 && (prefixes & PREFIX_ADDR)
6205 && olen >= (4 + 7)
6206 && *(p - 1) == ' '
6207 && strncmp (p - 7, "addr", 4) == 0
6208 && (strncmp (p - 3, "16", 2) == 0
6209 || strncmp (p - 3, "32", 2) == 0))
6210 p -= 7;
6211
88103cfe 6212 if (modrm.rm)
c2c73b42
BS		 6213 {
6214 /* mwait %eax,%ecx */
6215 strcpy (p, "mwait");
6216 if (!intel_syntax)
88103cfe 6217 strcpy (op_out[0], names[0]);
c2c73b42
BS		 6218 }
6219 else
6220 {
6221 /* monitor %eax,%ecx,%edx" */
6222 strcpy (p, "monitor");
6223 if (!intel_syntax)
6224 {
6225 const char * const *op1_names;
6226 if (!(prefixes & PREFIX_ADDR))
6227 op1_names = (address_mode == mode_16bit
6228 ? names16 : names);
6229 else
6230 {
6231 op1_names = (address_mode != mode_32bit
6232 ? names32 : names16);
6233 used_prefixes |= PREFIX_ADDR;
6234 }
88103cfe
BS		 6235 strcpy (op_out[0], op1_names[0]);
6236 strcpy (op_out[2], names[2]);
c2c73b42
BS		 6237 }
6238 }
6239 if (!intel_syntax)
6240 {
88103cfe 6241 strcpy (op_out[1], names[1]);
c2c73b42
BS		 6242 two_source_ops = 1;
6243 }
6244
6245 codep++;
6246 }
6247 else
6248 OP_M (0, sizeflag);
6249}
6250
6251static void
6252SVME_Fixup (int bytemode, int sizeflag)
6253{
6254 const char *alt;
6255 char *p;
6256
6257 switch (*codep)
6258 {
6259 case 0xd8:
6260 alt = "vmrun";
6261 break;
6262 case 0xd9:
6263 alt = "vmmcall";
6264 break;
6265 case 0xda:
6266 alt = "vmload";
6267 break;
6268 case 0xdb:
6269 alt = "vmsave";
6270 break;
6271 case 0xdc:
6272 alt = "stgi";
6273 break;
6274 case 0xdd:
6275 alt = "clgi";
6276 break;
6277 case 0xde:
6278 alt = "skinit";
6279 break;
6280 case 0xdf:
6281 alt = "invlpga";
6282 break;
6283 default:
6284 OP_M (bytemode, sizeflag);
6285 return;
6286 }
6287 /* Override "lidt". */
6288 p = obuf + strlen (obuf) - 4;
6289 /* We might have a suffix. */
6290 if (*p == 'i')
6291 --p;
6292 strcpy (p, alt);
6293 if (!(prefixes & PREFIX_ADDR))
6294 {
6295 ++codep;
6296 return;
6297 }
6298 used_prefixes |= PREFIX_ADDR;
6299 switch (*codep++)
6300 {
6301 case 0xdf:
88103cfe 6302 strcpy (op_out[1], names32[1]);
c2c73b42
BS		 6303 two_source_ops = 1;
6304 /* Fall through. */
6305 case 0xd8:
6306 case 0xda:
6307 case 0xdb:
6308 *obufp++ = open_char;
6309 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6310 alt = names32[0];
6311 else
6312 alt = names16[0];
6313 strcpy (obufp, alt);
6314 obufp += strlen (alt);
6315 *obufp++ = close_char;
6316 *obufp = '\0';
6317 break;
6318 }
6319}
6320
6321static void
6322INVLPG_Fixup (int bytemode, int sizeflag)
6323{
6324 const char *alt;
6325
6326 switch (*codep)
6327 {
6328 case 0xf8:
6329 alt = "swapgs";
6330 break;
6331 case 0xf9:
6332 alt = "rdtscp";
6333 break;
6334 default:
6335 OP_M (bytemode, sizeflag);
6336 return;
6337 }
6338 /* Override "invlpg". */
6339 strcpy (obuf + strlen (obuf) - 6, alt);
6340 codep++;
6341}
6342
bc51c5c9
FB		 6343static void
6344BadOp (void)
6345{
6346 /* Throw away prefixes and 1st. opcode byte. */
6347 codep = insn_codep + 1;
6348 oappend ("(bad)");
dc99065b 6349}
c2c73b42 6350
c2c73b42
BS		 6351static void
6352VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6353{
88103cfe
BS		 6354 if (modrm.mod == 3
6355 && modrm.reg == 0
6356 && modrm.rm >=1
6357 && modrm.rm <= 4)
c2c73b42
BS		 6358 {
6359 /* Override "sgdt". */
6360 char *p = obuf + strlen (obuf) - 4;
6361
6362 /* We might have a suffix when disassembling with -Msuffix. */
6363 if (*p == 'g')
6364 --p;
6365
88103cfe 6366 switch (modrm.rm)
c2c73b42
BS		 6367 {
6368 case 1:
6369 strcpy (p, "vmcall");
6370 break;
6371 case 2:
6372 strcpy (p, "vmlaunch");
6373 break;
6374 case 3:
6375 strcpy (p, "vmresume");
6376 break;
6377 case 4:
6378 strcpy (p, "vmxoff");
6379 break;
6380 }
6381
6382 codep++;
6383 }
6384 else
6385 OP_E (0, sizeflag);
6386}
6387
6388static void
6389OP_VMX (int bytemode, int sizeflag)
6390{
6391 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6392 if (prefixes & PREFIX_DATA)
6393 strcpy (obuf, "vmclear");
6394 else if (prefixes & PREFIX_REPZ)
6395 strcpy (obuf, "vmxon");
6396 else
6397 strcpy (obuf, "vmptrld");
6398 OP_E (bytemode, sizeflag);
6399}
6400
6401static void
6402REP_Fixup (int bytemode, int sizeflag)
6403{
6404 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6405 lods and stos. */
6406 size_t ilen = 0;
6407
6408 if (prefixes & PREFIX_REPZ)
6409 switch (*insn_codep)
6410 {
6411 case 0x6e: /* outsb */
6412 case 0x6f: /* outsw/outsl */
6413 case 0xa4: /* movsb */
6414 case 0xa5: /* movsw/movsl/movsq */
6415 if (!intel_syntax)
6416 ilen = 5;
6417 else
6418 ilen = 4;
6419 break;
6420 case 0xaa: /* stosb */
6421 case 0xab: /* stosw/stosl/stosq */
6422 case 0xac: /* lodsb */
6423 case 0xad: /* lodsw/lodsl/lodsq */
6424 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6425 ilen = 5;
6426 else
6427 ilen = 4;
6428 break;
6429 case 0x6c: /* insb */
6430 case 0x6d: /* insl/insw */
6431 if (!intel_syntax)
6432 ilen = 4;
6433 else
6434 ilen = 3;
6435 break;
6436 default:
6437 abort ();
6438 break;
6439 }
6440
6441 if (ilen != 0)
6442 {
6443 size_t olen;
6444 char *p;
6445
6446 olen = strlen (obuf);
6447 p = obuf + olen - ilen - 1 - 4;
6448 /* Handle "repz [addr16|addr32]". */
6449 if ((prefixes & PREFIX_ADDR))
6450 p -= 1 + 6;
6451
6452 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6453 }
6454
6455 switch (bytemode)
6456 {
6457 case al_reg:
6458 case eAX_reg:
6459 case indir_dx_reg:
6460 OP_IMREG (bytemode, sizeflag);
6461 break;
6462 case eDI_reg:
6463 OP_ESreg (bytemode, sizeflag);
6464 break;
6465 case eSI_reg:
6466 OP_DSreg (bytemode, sizeflag);
6467 break;
6468 default:
6469 abort ();
6470 break;
6471 }
6472}
88103cfe
BS		 6473
6474static void
6475CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6476{
6477 USED_REX (REX_W);
6478 if (rex & REX_W)
6479 {
6480 /* Change cmpxchg8b to cmpxchg16b. */
6481 char *p = obuf + strlen (obuf) - 2;
6482 strcpy (p, "16b");
6483 bytemode = o_mode;
6484 }
6485 OP_M (bytemode, sizeflag);
6486}
6487
6488static void
6489XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6490{
6491 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg);
6492 oappend (scratchbuf + intel_syntax);
6493}
6494
6495static void
6496CRC32_Fixup (int bytemode, int sizeflag)
6497{
6498 /* Add proper suffix to "crc32". */
6499 char *p = obuf + strlen (obuf);
6500
6501 switch (bytemode)
6502 {
6503 case b_mode:
6504 if (intel_syntax)
6505 break;
6506
6507 *p++ = 'b';
6508 break;
6509 case v_mode:
6510 if (intel_syntax)
6511 break;
6512
6513 USED_REX (REX_W);
6514 if (rex & REX_W)
6515 *p++ = 'q';
6516 else if (sizeflag & DFLAG)
6517 *p++ = 'l';
6518 else
6519 *p++ = 'w';
6520 used_prefixes |= (prefixes & PREFIX_DATA);
6521 break;
6522 default:
6523 oappend (INTERNAL_DISASSEMBLER_ERROR);
6524 break;
6525 }
6526 *p = '\0';
6527
6528 if (modrm.mod == 3)
6529 {
6530 int add;
6531
6532 /* Skip mod/rm byte. */
6533 MODRM_CHECK;
6534 codep++;
6535
6536 USED_REX (REX_B);
6537 add = (rex & REX_B) ? 8 : 0;
6538 if (bytemode == b_mode)
6539 {
6540 USED_REX (0);
6541 if (rex)
6542 oappend (names8rex[modrm.rm + add]);
6543 else
6544 oappend (names8[modrm.rm + add]);
6545 }
6546 else
6547 {
6548 USED_REX (REX_W);
6549 if (rex & REX_W)
6550 oappend (names64[modrm.rm + add]);
6551 else if ((prefixes & PREFIX_DATA))
6552 oappend (names16[modrm.rm + add]);
6553 else
6554 oappend (names32[modrm.rm + add]);
6555 }
6556 }
6557 else
6558 OP_E (bytemode, sizeflag);
6559}
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