[qemu.git] / hw / acpi / cpu_hotplug.c

/*
 * QEMU ACPI hotplug utilities
 *
 * Copyright (C) 2013 Red Hat Inc
 *
 * Authors:
 *   Igor Mammedov <[email protected]>
 *
 * This work is licensed under the terms of the GNU GPL, version 2 or later.
 * See the COPYING file in the top-level directory.
 */
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/acpi/cpu_hotplug.h"
#include "qapi/error.h"
#include "qom/cpu.h"
#include "hw/i386/pc.h"
#include "qemu/error-report.h"

#define CPU_EJECT_METHOD "CPEJ"
#define CPU_MAT_METHOD "CPMA"
#define CPU_ON_BITMAP "CPON"
#define CPU_STATUS_METHOD "CPST"
#define CPU_STATUS_MAP "PRS"
#define CPU_SCAN_METHOD "PRSC"

static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
{
    AcpiCpuHotplug *cpus = opaque;
    uint64_t val = cpus->sts[addr];

    return val;
}

static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
                             unsigned int size)
{
    /* firmware never used to write in CPU present bitmap so use
       this fact as means to switch QEMU into modern CPU hotplug
       mode by writing 0 at the beginning of legacy CPU bitmap
     */
    if (addr == 0 && data == 0) {
        AcpiCpuHotplug *cpus = opaque;
        object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
                                 &error_abort);
    }
}

static const MemoryRegionOps AcpiCpuHotplug_ops = {
    .read = cpu_status_read,
    .write = cpu_status_write,
    .endianness = DEVICE_LITTLE_ENDIAN,
    .valid = {
        .min_access_size = 1,
        .max_access_size = 1,
    },
};

static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu,
                                     Error **errp)
{
    CPUClass *k = CPU_GET_CLASS(cpu);
    int64_t cpu_id;

    cpu_id = k->get_arch_id(cpu);
    if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
        object_property_set_bool(g->device, false, "cpu-hotplug-legacy",
                                 &error_abort);
        return;
    }

    g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
}

void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
                             AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
{
    acpi_set_cpu_present_bit(g, CPU(dev), errp);
    if (*errp != NULL) {
        return;
    }
    acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
}

void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
                                  AcpiCpuHotplug *gpe_cpu, uint16_t base)
{
    CPUState *cpu;

    memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
                          gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
    memory_region_add_subregion(parent, base, &gpe_cpu->io);
    gpe_cpu->device = owner;

    CPU_FOREACH(cpu) {
        acpi_set_cpu_present_bit(gpe_cpu, cpu, &error_abort);
    }
}

void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
                                CPUHotplugState *cpuhp_state,
                                uint16_t io_port)
{
    MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));

    memory_region_del_subregion(parent, &gpe_cpu->io);
    cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
}

void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
                                  uint16_t io_base)
{
    Aml *dev;
    Aml *crs;
    Aml *pkg;
    Aml *field;
    Aml *method;
    Aml *if_ctx;
    Aml *else_ctx;
    int i, apic_idx;
    Aml *sb_scope = aml_scope("_SB");
    uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
    Aml *cpu_id = aml_arg(1);
    Aml *apic_id = aml_arg(0);
    Aml *cpu_on = aml_local(0);
    Aml *madt = aml_local(1);
    Aml *cpus_map = aml_name(CPU_ON_BITMAP);
    Aml *zero = aml_int(0);
    Aml *one = aml_int(1);
    MachineClass *mc = MACHINE_GET_CLASS(machine);
    const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
    PCMachineState *pcms = PC_MACHINE(machine);

    /*
     * _MAT method - creates an madt apic buffer
     * apic_id = Arg0 = Local APIC ID
     * cpu_id  = Arg1 = Processor ID
     * cpu_on = Local0 = CPON flag for this cpu
     * madt = Local1 = Buffer (in madt apic form) to return
     */
    method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
    aml_append(method,
        aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
    aml_append(method,
        aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
    /* Update the processor id, lapic id, and enable/disable status */
    aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
    aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
    aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
    aml_append(method, aml_return(madt));
    aml_append(sb_scope, method);

    /*
     * _STA method - return ON status of cpu
     * apic_id = Arg0 = Local APIC ID
     * cpu_on = Local0 = CPON flag for this cpu
     */
    method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
    aml_append(method,
        aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
    if_ctx = aml_if(cpu_on);
    {
        aml_append(if_ctx, aml_return(aml_int(0xF)));
    }
    aml_append(method, if_ctx);
    else_ctx = aml_else();
    {
        aml_append(else_ctx, aml_return(zero));
    }
    aml_append(method, else_ctx);
    aml_append(sb_scope, method);

    method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
    aml_append(method, aml_sleep(200));
    aml_append(sb_scope, method);

    method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
    {
        Aml *while_ctx, *if_ctx2, *else_ctx2;
        Aml *bus_check_evt = aml_int(1);
        Aml *remove_evt = aml_int(3);
        Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
        Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
        Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
        Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
        Aml *status = aml_local(3); /* Local3 = active state for cpu */

        aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
        aml_append(method, aml_store(zero, byte));
        aml_append(method, aml_store(zero, idx));

        /* While (idx < SizeOf(CPON)) */
        while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
        aml_append(while_ctx,
            aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));

        if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
        {
            /* Shift down previously read bitmap byte */
            aml_append(if_ctx, aml_shiftright(byte, one, byte));
        }
        aml_append(while_ctx, if_ctx);

        else_ctx = aml_else();
        {
            /* Read next byte from cpu bitmap */
            aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
                       aml_shiftright(idx, aml_int(3), NULL))), byte));
        }
        aml_append(while_ctx, else_ctx);

        aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
        if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
        {
            /* State change - update CPON with new state */
            aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
            if_ctx2 = aml_if(aml_equal(status, one));
            {
                aml_append(if_ctx2,
                    aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
            }
            aml_append(if_ctx, if_ctx2);
            else_ctx2 = aml_else();
            {
                aml_append(else_ctx2,
                    aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
            }
        }
        aml_append(if_ctx, else_ctx2);
        aml_append(while_ctx, if_ctx);

        aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
        aml_append(method, while_ctx);
    }
    aml_append(sb_scope, method);

    /* The current AML generator can cover the APIC ID range [0..255],
     * inclusive, for VCPU hotplug. */
    QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
    if (pcms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
        error_report("max_cpus is too large. APIC ID of last CPU is %u",
                     pcms->apic_id_limit - 1);
        exit(1);
    }

    /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
    dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
    aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
    aml_append(dev,
        aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
    );
    /* device present, functioning, decoding, not shown in UI */
    aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
    crs = aml_resource_template();
    aml_append(crs,
        aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
    );
    aml_append(dev, aml_name_decl("_CRS", crs));
    aml_append(sb_scope, dev);
    /* declare CPU hotplug MMIO region and PRS field to access it */
    aml_append(sb_scope, aml_operation_region(
        "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
    field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
    aml_append(field, aml_named_field("PRS", 256));
    aml_append(sb_scope, field);

    /* build Processor object for each processor */
    for (i = 0; i < apic_ids->len; i++) {
        int apic_id = apic_ids->cpus[i].arch_id;

        assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);

        dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);

        method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
        aml_append(method,
            aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
        ));
        aml_append(dev, method);

        method = aml_method("_STA", 0, AML_NOTSERIALIZED);
        aml_append(method,
            aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
        aml_append(dev, method);

        method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
        aml_append(method,
            aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
                aml_arg(0)))
        );
        aml_append(dev, method);

        aml_append(sb_scope, dev);
    }

    /* build this code:
     *   Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
     */
    /* Arg0 = APIC ID */
    method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
    for (i = 0; i < apic_ids->len; i++) {
        int apic_id = apic_ids->cpus[i].arch_id;

        if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
        aml_append(if_ctx,
            aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
        );
        aml_append(method, if_ctx);
    }
    aml_append(sb_scope, method);

    /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
     *
     * Note: The ability to create variable-sized packages was first
     * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
     * ith up to 255 elements. Windows guests up to win2k8 fail when
     * VarPackageOp is used.
     */
    pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) :
                                       aml_varpackage(pcms->apic_id_limit);

    for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
        int apic_id = apic_ids->cpus[i].arch_id;

        for (; apic_idx < apic_id; apic_idx++) {
            aml_append(pkg, aml_int(0));
        }
        aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
        apic_idx = apic_id + 1;
    }
    aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
    aml_append(ctx, sb_scope);

    method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
    aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
    aml_append(ctx, method);
}
Commit	Line	Data
81cea5e7 IM	1	/*
	2	* QEMU ACPI hotplug utilities
	3	*
	4	* Copyright (C) 2013 Red Hat Inc
	5	*
	6	* Authors:
	7	* Igor Mammedov <[email protected]>
	8	*
	9	* This work is licensed under the terms of the GNU GPL, version 2 or later.
	10	* See the COPYING file in the top-level directory.
	11	*/
b6a0aa05	12	#include "qemu/osdep.h"
81cea5e7 IM	13	#include "hw/hw.h"
81cea5e7 IM	14	#include "hw/acpi/cpu_hotplug.h"
da34e65c	15	#include "qapi/error.h"
508127e2	16	#include "qom/cpu.h"
672a2872	17	#include "hw/i386/pc.h"
6a91cf04	18	#include "qemu/error-report.h"
672a2872 IM	19
	20	#define CPU_EJECT_METHOD "CPEJ"
	21	#define CPU_MAT_METHOD "CPMA"
	22	#define CPU_ON_BITMAP "CPON"
	23	#define CPU_STATUS_METHOD "CPST"
	24	#define CPU_STATUS_MAP "PRS"
	25	#define CPU_SCAN_METHOD "PRSC"
81cea5e7 IM	26
	27	static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
	28	{
	29	AcpiCpuHotplug *cpus = opaque;
	30	uint64_t val = cpus->sts[addr];
	31
	32	return val;
	33	}
	34
	35	static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
	36	unsigned int size)
	37	{
679dd1a9 IM	38	/* firmware never used to write in CPU present bitmap so use
	39	this fact as means to switch QEMU into modern CPU hotplug
	40	mode by writing 0 at the beginning of legacy CPU bitmap
	41	*/
	42	if (addr == 0 && data == 0) {
	43	AcpiCpuHotplug *cpus = opaque;
	44	object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
	45	&error_abort);
	46	}
81cea5e7 IM	47	}
	48
	49	static const MemoryRegionOps AcpiCpuHotplug_ops = {
	50	.read = cpu_status_read,
	51	.write = cpu_status_write,
	52	.endianness = DEVICE_LITTLE_ENDIAN,
	53	.valid = {
	54	.min_access_size = 1,
	55	.max_access_size = 1,
	56	},
	57	};
	58
cc43364d GZ	59	static void acpi_set_cpu_present_bit(AcpiCpuHotplug g, CPUState cpu,
cc43364d GZ	60	Error **errp)
1be6b511	61	{
1be6b511 GZ	62	CPUClass *k = CPU_GET_CLASS(cpu);
	63	int64_t cpu_id;
	64
	65	cpu_id = k->get_arch_id(cpu);
	66	if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
f9dc175d IM	67	object_property_set_bool(g->device, false, "cpu-hotplug-legacy",
f9dc175d IM	68	&error_abort);
1be6b511 GZ	69	return;
	70	}
	71
08bba95b	72	g->sts[cpu_id / 8] \|= (1 << (cpu_id % 8));
cc43364d GZ	73	}
cc43364d GZ	74
0058c082	75	void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
96e3e12b	76	AcpiCpuHotplug g, DeviceState dev, Error **errp)
cc43364d GZ	77	{
	78	acpi_set_cpu_present_bit(g, CPU(dev), errp);
	79	if (*errp != NULL) {
	80	return;
	81	}
0058c082	82	acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
1be6b511 GZ	83	}
1be6b511 GZ	84
96e3e12b IM	85	void legacy_acpi_cpu_hotplug_init(MemoryRegion parent, Object owner,
96e3e12b IM	86	AcpiCpuHotplug *gpe_cpu, uint16_t base)
81cea5e7 IM	87	{
	88	CPUState *cpu;
	89
81cea5e7 IM	90	memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
	91	gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
	92	memory_region_add_subregion(parent, base, &gpe_cpu->io);
679dd1a9	93	gpe_cpu->device = owner;
f9dc175d IM	94
	95	CPU_FOREACH(cpu) {
	96	acpi_set_cpu_present_bit(gpe_cpu, cpu, &error_abort);
	97	}
679dd1a9 IM	98	}
	99
	100	void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
	101	CPUHotplugState *cpuhp_state,
	102	uint16_t io_port)
	103	{
	104	MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
	105
	106	memory_region_del_subregion(parent, &gpe_cpu->io);
	107	cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
81cea5e7	108	}
672a2872 IM	109
672a2872 IM	110	void build_legacy_cpu_hotplug_aml(Aml ctx, MachineState machine,
ebd8ea82	111	uint16_t io_base)
672a2872 IM	112	{
	113	Aml *dev;
	114	Aml *crs;
	115	Aml *pkg;
	116	Aml *field;
	117	Aml *method;
	118	Aml *if_ctx;
	119	Aml *else_ctx;
	120	int i, apic_idx;
	121	Aml *sb_scope = aml_scope("_SB");
	122	uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
76bdd24e IM	123	Aml *cpu_id = aml_arg(1);
76bdd24e IM	124	Aml *apic_id = aml_arg(0);
672a2872 IM	125	Aml *cpu_on = aml_local(0);
	126	Aml *madt = aml_local(1);
	127	Aml *cpus_map = aml_name(CPU_ON_BITMAP);
	128	Aml *zero = aml_int(0);
	129	Aml *one = aml_int(1);
	130	MachineClass *mc = MACHINE_GET_CLASS(machine);
80e5db30	131	const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
672a2872 IM	132	PCMachineState *pcms = PC_MACHINE(machine);
	133
	134	/*
	135	* _MAT method - creates an madt apic buffer
76bdd24e IM	136	* apic_id = Arg0 = Local APIC ID
76bdd24e IM	137	* cpu_id = Arg1 = Processor ID
672a2872 IM	138	* cpu_on = Local0 = CPON flag for this cpu
	139	* madt = Local1 = Buffer (in madt apic form) to return
	140	*/
76bdd24e	141	method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
672a2872	142	aml_append(method,
76bdd24e	143	aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
672a2872 IM	144	aml_append(method,
	145	aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
	146	/* Update the processor id, lapic id, and enable/disable status */
	147	aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
76bdd24e	148	aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
672a2872 IM	149	aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
	150	aml_append(method, aml_return(madt));
	151	aml_append(sb_scope, method);
	152
	153	/*
	154	* _STA method - return ON status of cpu
76bdd24e	155	* apic_id = Arg0 = Local APIC ID
672a2872 IM	156	* cpu_on = Local0 = CPON flag for this cpu
	157	*/
	158	method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
	159	aml_append(method,
76bdd24e	160	aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
672a2872 IM	161	if_ctx = aml_if(cpu_on);
	162	{
	163	aml_append(if_ctx, aml_return(aml_int(0xF)));
	164	}
	165	aml_append(method, if_ctx);
	166	else_ctx = aml_else();
	167	{
	168	aml_append(else_ctx, aml_return(zero));
	169	}
	170	aml_append(method, else_ctx);
	171	aml_append(sb_scope, method);
	172
	173	method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
	174	aml_append(method, aml_sleep(200));
	175	aml_append(sb_scope, method);
	176
	177	method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
	178	{
	179	Aml while_ctx, if_ctx2, *else_ctx2;
	180	Aml *bus_check_evt = aml_int(1);
	181	Aml *remove_evt = aml_int(3);
	182	Aml status_map = aml_local(5); / Local5 = active cpu bitmap */
	183	Aml byte = aml_local(2); / Local2 = last read byte from bitmap */
	184	Aml idx = aml_local(0); / Processor ID / APIC ID iterator */
	185	Aml is_cpu_on = aml_local(1); / Local1 = CPON flag for cpu */
	186	Aml status = aml_local(3); / Local3 = active state for cpu */
	187
	188	aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
	189	aml_append(method, aml_store(zero, byte));
	190	aml_append(method, aml_store(zero, idx));
	191
	192	/* While (idx < SizeOf(CPON)) */
	193	while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
	194	aml_append(while_ctx,
	195	aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
	196
	197	if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
	198	{
	199	/* Shift down previously read bitmap byte */
	200	aml_append(if_ctx, aml_shiftright(byte, one, byte));
	201	}
	202	aml_append(while_ctx, if_ctx);
	203
	204	else_ctx = aml_else();
	205	{
	206	/* Read next byte from cpu bitmap */
	207	aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
	208	aml_shiftright(idx, aml_int(3), NULL))), byte));
	209	}
	210	aml_append(while_ctx, else_ctx);
	211
	212	aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
	213	if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
	214	{
	215	/* State change - update CPON with new state */
	216	aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
	217	if_ctx2 = aml_if(aml_equal(status, one));
	218	{
	219	aml_append(if_ctx2,
	220	aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
	221	}
	222	aml_append(if_ctx, if_ctx2);
	223	else_ctx2 = aml_else();
	224	{
225	aml_append(else_ctx2,
226	aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
227	}
228	}
229	aml_append(if_ctx, else_ctx2);
230	aml_append(while_ctx, if_ctx);
231
232	aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
233	aml_append(method, while_ctx);
234	}
235	aml_append(sb_scope, method);
236
237	/* The current AML generator can cover the APIC ID range [0..255],
238	* inclusive, for VCPU hotplug. */
239	QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
6a91cf04 IM	240	if (pcms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
	241	error_report("max_cpus is too large. APIC ID of last CPU is %u",
	242	pcms->apic_id_limit - 1);
	243	exit(1);
	244	}
672a2872 IM	245
	246	/* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
	247	dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
	248	aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
	249	aml_append(dev,
	250	aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
	251	);
	252	/* device present, functioning, decoding, not shown in UI */
	253	aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
	254	crs = aml_resource_template();
	255	aml_append(crs,
ebd8ea82	256	aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
672a2872 IM	257	);
	258	aml_append(dev, aml_name_decl("_CRS", crs));
	259	aml_append(sb_scope, dev);
	260	/* declare CPU hotplug MMIO region and PRS field to access it */
	261	aml_append(sb_scope, aml_operation_region(
ebd8ea82	262	"PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
672a2872 IM	263	field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
	264	aml_append(field, aml_named_field("PRS", 256));
	265	aml_append(sb_scope, field);
	266
	267	/* build Processor object for each processor */
	268	for (i = 0; i < apic_ids->len; i++) {
	269	int apic_id = apic_ids->cpus[i].arch_id;
	270
	271	assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
	272
76bdd24e	273	dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
672a2872 IM	274
	275	method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
	276	aml_append(method,
76bdd24e IM	277	aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
76bdd24e IM	278	));
672a2872 IM	279	aml_append(dev, method);
	280
	281	method = aml_method("_STA", 0, AML_NOTSERIALIZED);
	282	aml_append(method,
	283	aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
	284	aml_append(dev, method);
	285
	286	method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
	287	aml_append(method,
	288	aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
	289	aml_arg(0)))
	290	);
	291	aml_append(dev, method);
	292
	293	aml_append(sb_scope, dev);
	294	}
	295
	296	/* build this code:
	297	* Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
	298	*/
76bdd24e	299	/* Arg0 = APIC ID */
672a2872 IM	300	method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
	301	for (i = 0; i < apic_ids->len; i++) {
	302	int apic_id = apic_ids->cpus[i].arch_id;
	303
	304	if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
	305	aml_append(if_ctx,
	306	aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
	307	);
	308	aml_append(method, if_ctx);
	309	}
	310	aml_append(sb_scope, method);
	311
	312	/* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
	313	*
	314	* Note: The ability to create variable-sized packages was first
	315	* introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
	316	* ith up to 255 elements. Windows guests up to win2k8 fail when
	317	* VarPackageOp is used.
	318	*/
	319	pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) :
	320	aml_varpackage(pcms->apic_id_limit);
	321
	322	for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
	323	int apic_id = apic_ids->cpus[i].arch_id;
	324
	325	for (; apic_idx < apic_id; apic_idx++) {
	326	aml_append(pkg, aml_int(0));
	327	}
	328	aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
	329	apic_idx = apic_id + 1;
	330	}
	331	aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
672a2872 IM	332	aml_append(ctx, sb_scope);
	333
	334	method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
	335	aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
	336	aml_append(ctx, method);
	337	}