[qemu.git] / hw / intc / xics_kvm.c

/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
 *
 * Copyright (c) 2013 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */

#include "hw/hw.h"
#include "trace.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"

#include <sys/ioctl.h>

typedef struct KVMXICSState {
    XICSState parent_obj;

    int kernel_xics_fd;
} KVMXICSState;

/*
 * ICP-KVM
 */
static void icp_get_kvm_state(ICPState *ss)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!ss->cs) {
        return;
    }

    ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to retrieve KVM interrupt controller state"
                " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
        exit(1);
    }

    ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
    ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
        & KVM_REG_PPC_ICP_MFRR_MASK;
    ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
        & KVM_REG_PPC_ICP_PPRI_MASK;
}

static int icp_set_kvm_state(ICPState *ss, int version_id)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!ss->cs) {
        return 0;
    }

    state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
        | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
        | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);

    ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to restore KVM interrupt controller state (0x%"
                PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
                strerror(errno));
        return ret;
    }

    return 0;
}

static void icp_kvm_reset(DeviceState *dev)
{
    ICPState *icp = ICP(dev);

    icp->xirr = 0;
    icp->pending_priority = 0xff;
    icp->mfrr = 0xff;

    /* Make all outputs are deasserted */
    qemu_set_irq(icp->output, 0);

    icp_set_kvm_state(icp, 1);
}

static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    ICPStateClass *icpc = ICP_CLASS(klass);

    dc->reset = icp_kvm_reset;
    icpc->pre_save = icp_get_kvm_state;
    icpc->post_load = icp_set_kvm_state;
}

static const TypeInfo icp_kvm_info = {
    .name = TYPE_KVM_ICP,
    .parent = TYPE_ICP,
    .instance_size = sizeof(ICPState),
    .class_init = icp_kvm_class_init,
    .class_size = sizeof(ICPStateClass),
};

/*
 * ICS-KVM
 */
static void ics_get_kvm_state(ICSState *ics)
{
    KVMXICSState *icpkvm = KVM_XICS(ics->icp);
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to retrieve KVM interrupt controller state"
                    " for IRQ %d: %s", i + ics->offset, strerror(errno));
            exit(1);
        }

        irq->server = state & KVM_XICS_DESTINATION_MASK;
        irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
            & KVM_XICS_PRIORITY_MASK;
        /*
         * To be consistent with the software emulation in xics.c, we
         * split out the masked state + priority that we get from the
         * kernel into 'current priority' (0xff if masked) and
         * 'saved priority' (if masked, this is the priority the
         * interrupt had before it was masked).  Masking and unmasking
         * are done with the ibm,int-off and ibm,int-on RTAS calls.
         */
        if (state & KVM_XICS_MASKED) {
            irq->priority = 0xff;
        } else {
            irq->priority = irq->saved_priority;
        }

        if (state & KVM_XICS_PENDING) {
            if (state & KVM_XICS_LEVEL_SENSITIVE) {
                irq->status |= XICS_STATUS_ASSERTED;
            } else {
                /*
                 * A pending edge-triggered interrupt (or MSI)
                 * must have been rejected previously when we
                 * first detected it and tried to deliver it,
                 * so mark it as pending and previously rejected
                 * for consistency with how xics.c works.
                 */
                irq->status |= XICS_STATUS_MASKED_PENDING
                    | XICS_STATUS_REJECTED;
            }
        }
    }
}

static int ics_set_kvm_state(ICSState *ics, int version_id)
{
    KVMXICSState *icpkvm = KVM_XICS(ics->icp);
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        state = irq->server;
        state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
            << KVM_XICS_PRIORITY_SHIFT;
        if (irq->priority != irq->saved_priority) {
            assert(irq->priority == 0xff);
            state |= KVM_XICS_MASKED;
        }

        if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
            state |= KVM_XICS_LEVEL_SENSITIVE;
            if (irq->status & XICS_STATUS_ASSERTED) {
                state |= KVM_XICS_PENDING;
            }
        } else {
            if (irq->status & XICS_STATUS_MASKED_PENDING) {
                state |= KVM_XICS_PENDING;
            }
        }

        ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to restore KVM interrupt controller state"
                    " for IRQs %d: %s", i + ics->offset, strerror(errno));
            return ret;
        }
    }

    return 0;
}

static void ics_kvm_set_irq(void *opaque, int srcno, int val)
{
    ICSState *ics = opaque;
    struct kvm_irq_level args;
    int rc;

    args.irq = srcno + ics->offset;
    if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
        if (!val) {
            return;
        }
        args.level = KVM_INTERRUPT_SET;
    } else {
        args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
    }
    rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
    if (rc < 0) {
        perror("kvm_irq_line");
    }
}

static void ics_kvm_reset(DeviceState *dev)
{
    ICSState *ics = ICS(dev);
    int i;
    uint8_t flags[ics->nr_irqs];

    for (i = 0; i < ics->nr_irqs; i++) {
        flags[i] = ics->irqs[i].flags;
    }

    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);

    for (i = 0; i < ics->nr_irqs; i++) {
        ics->irqs[i].priority = 0xff;
        ics->irqs[i].saved_priority = 0xff;
        ics->irqs[i].flags = flags[i];
    }

    ics_set_kvm_state(ics, 1);
}

static void ics_kvm_realize(DeviceState *dev, Error **errp)
{
    ICSState *ics = ICS(dev);

    if (!ics->nr_irqs) {
        error_setg(errp, "Number of interrupts needs to be greater 0");
        return;
    }
    ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
}

static void ics_kvm_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    ICSStateClass *icsc = ICS_CLASS(klass);

    dc->realize = ics_kvm_realize;
    dc->reset = ics_kvm_reset;
    icsc->pre_save = ics_get_kvm_state;
    icsc->post_load = ics_set_kvm_state;
}

static const TypeInfo ics_kvm_info = {
    .name = TYPE_KVM_ICS,
    .parent = TYPE_ICS,
    .instance_size = sizeof(ICSState),
    .class_init = ics_kvm_class_init,
};

/*
 * XICS-KVM
 */
static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
{
    CPUState *cs;
    ICPState *ss;
    KVMXICSState *icpkvm = KVM_XICS(icp);

    cs = CPU(cpu);
    ss = &icp->ss[cs->cpu_index];

    assert(cs->cpu_index < icp->nr_servers);
    if (icpkvm->kernel_xics_fd == -1) {
        abort();
    }

    if (icpkvm->kernel_xics_fd != -1) {
        int ret;

        ss->cs = cs;

        ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
                                  icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
        if (ret < 0) {
            error_report("Unable to connect CPU%ld to kernel XICS: %s",
                    kvm_arch_vcpu_id(cs), strerror(errno));
            exit(1);
        }
    }
}

static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
{
    icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
}

static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
                                    Error **errp)
{
    int i;

    icp->nr_servers = nr_servers;

    icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
    for (i = 0; i < icp->nr_servers; i++) {
        char buffer[32];
        object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
        snprintf(buffer, sizeof(buffer), "icp[%d]", i);
        object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
                                  errp);
    }
}

static void rtas_dummy(PowerPCCPU *cpu, sPAPREnvironment *spapr,
                       uint32_t token,
                       uint32_t nargs, target_ulong args,
                       uint32_t nret, target_ulong rets)
{
    error_report("pseries: %s must never be called for in-kernel XICS",
                 __func__);
}

static void xics_kvm_realize(DeviceState *dev, Error **errp)
{
    KVMXICSState *icpkvm = KVM_XICS(dev);
    XICSState *icp = XICS_COMMON(dev);
    int i, rc;
    Error *error = NULL;
    struct kvm_create_device xics_create_device = {
        .type = KVM_DEV_TYPE_XICS,
        .flags = 0,
    };

    if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
        error_setg(errp,
                   "KVM and IRQ_XICS capability must be present for in-kernel XICS");
        goto fail;
    }

    spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
        goto fail;
    }

    /* Create the kernel ICP */
    rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
    if (rc < 0) {
        error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
        goto fail;
    }

    icpkvm->kernel_xics_fd = xics_create_device.fd;

    object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
    if (error) {
        error_propagate(errp, error);
        goto fail;
    }

    assert(icp->nr_servers);
    for (i = 0; i < icp->nr_servers; i++) {
        object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
        if (error) {
            error_propagate(errp, error);
            goto fail;
        }
    }

    kvm_kernel_irqchip = true;
    kvm_irqfds_allowed = true;
    kvm_msi_via_irqfd_allowed = true;
    kvm_gsi_direct_mapping = true;

    return;

fail:
    kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
}

static void xics_kvm_initfn(Object *obj)
{
    XICSState *xics = XICS_COMMON(obj);

    xics->ics = ICS(object_new(TYPE_KVM_ICS));
    object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
    xics->ics->icp = xics;
}

static void xics_kvm_class_init(ObjectClass *oc, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(oc);
    XICSStateClass *xsc = XICS_COMMON_CLASS(oc);

    dc->realize = xics_kvm_realize;
    xsc->cpu_setup = xics_kvm_cpu_setup;
    xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
    xsc->set_nr_servers = xics_kvm_set_nr_servers;
}

static const TypeInfo xics_kvm_info = {
    .name          = TYPE_KVM_XICS,
    .parent        = TYPE_XICS_COMMON,
    .instance_size = sizeof(KVMXICSState),
    .class_init    = xics_kvm_class_init,
    .instance_init = xics_kvm_initfn,
};

static void xics_kvm_register_types(void)
{
    type_register_static(&xics_kvm_info);
    type_register_static(&ics_kvm_info);
    type_register_static(&icp_kvm_info);
}

type_init(xics_kvm_register_types)
Commit	Line	Data
11ad93f6 DG	1	/*
	2	* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
	3	*
	4	* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
	5	*
	6	* Copyright (c) 2013 David Gibson, IBM Corporation.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a copy
	9	* of this software and associated documentation files (the "Software"), to deal
	10	* in the Software without restriction, including without limitation the rights
	11	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	12	* copies of the Software, and to permit persons to whom the Software is
	13	* furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	21	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	23	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	24	* THE SOFTWARE.
	25	*
	26	*/
	27
	28	#include "hw/hw.h"
	29	#include "trace.h"
	30	#include "hw/ppc/spapr.h"
	31	#include "hw/ppc/xics.h"
	32	#include "kvm_ppc.h"
	33	#include "qemu/config-file.h"
	34	#include "qemu/error-report.h"
	35
	36	#include <sys/ioctl.h>
	37
	38	typedef struct KVMXICSState {
	39	XICSState parent_obj;
	40
11ad93f6 DG	41	int kernel_xics_fd;
	42	} KVMXICSState;
	43
	44	/*
	45	* ICP-KVM
	46	*/
	47	static void icp_get_kvm_state(ICPState *ss)
	48	{
	49	uint64_t state;
	50	struct kvm_one_reg reg = {
	51	.id = KVM_REG_PPC_ICP_STATE,
	52	.addr = (uintptr_t)&state,
	53	};
	54	int ret;
	55
	56	/* ICP for this CPU thread is not in use, exiting */
	57	if (!ss->cs) {
	58	return;
	59	}
	60
	61	ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
	62	if (ret != 0) {
	63	error_report("Unable to retrieve KVM interrupt controller state"
0f20ba62	64	" for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
11ad93f6 DG	65	exit(1);
	66	}
	67
	68	ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
	69	ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
	70	& KVM_REG_PPC_ICP_MFRR_MASK;
	71	ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
	72	& KVM_REG_PPC_ICP_PPRI_MASK;
	73	}
	74
	75	static int icp_set_kvm_state(ICPState *ss, int version_id)
	76	{
	77	uint64_t state;
	78	struct kvm_one_reg reg = {
	79	.id = KVM_REG_PPC_ICP_STATE,
	80	.addr = (uintptr_t)&state,
	81	};
	82	int ret;
	83
	84	/* ICP for this CPU thread is not in use, exiting */
	85	if (!ss->cs) {
	86	return 0;
	87	}
	88
	89	state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
	90	\| ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
	91	\| ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
	92
	93	ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
	94	if (ret != 0) {
	95	error_report("Unable to restore KVM interrupt controller state (0x%"
0f20ba62	96	PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
11ad93f6 DG	97	strerror(errno));
	98	return ret;
	99	}
	100
	101	return 0;
	102	}
	103
	104	static void icp_kvm_reset(DeviceState *dev)
	105	{
	106	ICPState *icp = ICP(dev);
	107
	108	icp->xirr = 0;
	109	icp->pending_priority = 0xff;
	110	icp->mfrr = 0xff;
	111
	112	/* Make all outputs are deasserted */
	113	qemu_set_irq(icp->output, 0);
	114
	115	icp_set_kvm_state(icp, 1);
	116	}
	117
	118	static void icp_kvm_class_init(ObjectClass klass, void data)
	119	{
	120	DeviceClass *dc = DEVICE_CLASS(klass);
	121	ICPStateClass *icpc = ICP_CLASS(klass);
	122
	123	dc->reset = icp_kvm_reset;
	124	icpc->pre_save = icp_get_kvm_state;
	125	icpc->post_load = icp_set_kvm_state;
	126	}
	127
	128	static const TypeInfo icp_kvm_info = {
	129	.name = TYPE_KVM_ICP,
	130	.parent = TYPE_ICP,
	131	.instance_size = sizeof(ICPState),
	132	.class_init = icp_kvm_class_init,
	133	.class_size = sizeof(ICPStateClass),
	134	};
	135
	136	/*
	137	* ICS-KVM
	138	*/
	139	static void ics_get_kvm_state(ICSState *ics)
	140	{
	141	KVMXICSState *icpkvm = KVM_XICS(ics->icp);
	142	uint64_t state;
	143	struct kvm_device_attr attr = {
	144	.flags = 0,
	145	.group = KVM_DEV_XICS_GRP_SOURCES,
	146	.addr = (uint64_t)(uintptr_t)&state,
	147	};
	148	int i;
	149
	150	for (i = 0; i < ics->nr_irqs; i++) {
	151	ICSIRQState *irq = &ics->irqs[i];
	152	int ret;
	153
	154	attr.attr = i + ics->offset;
	155
	156	ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
	157	if (ret != 0) {
	158	error_report("Unable to retrieve KVM interrupt controller state"
	159	" for IRQ %d: %s", i + ics->offset, strerror(errno));
	160	exit(1);
161	}
162
163	irq->server = state & KVM_XICS_DESTINATION_MASK;
164	irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
165	& KVM_XICS_PRIORITY_MASK;
166	/*
167	* To be consistent with the software emulation in xics.c, we
168	* split out the masked state + priority that we get from the
169	* kernel into 'current priority' (0xff if masked) and
170	* 'saved priority' (if masked, this is the priority the
171	* interrupt had before it was masked). Masking and unmasking
172	* are done with the ibm,int-off and ibm,int-on RTAS calls.
173	*/
174	if (state & KVM_XICS_MASKED) {
175	irq->priority = 0xff;
176	} else {
177	irq->priority = irq->saved_priority;
178	}
179
180	if (state & KVM_XICS_PENDING) {
181	if (state & KVM_XICS_LEVEL_SENSITIVE) {
182	irq->status \|= XICS_STATUS_ASSERTED;
183	} else {
184	/*
185	* A pending edge-triggered interrupt (or MSI)
186	* must have been rejected previously when we
187	* first detected it and tried to deliver it,
188	* so mark it as pending and previously rejected
189	* for consistency with how xics.c works.
190	*/
191	irq->status \|= XICS_STATUS_MASKED_PENDING
192	\| XICS_STATUS_REJECTED;
193	}
194	}
195	}
196	}
197
198	static int ics_set_kvm_state(ICSState *ics, int version_id)
199	{
200	KVMXICSState *icpkvm = KVM_XICS(ics->icp);
201	uint64_t state;
202	struct kvm_device_attr attr = {
203	.flags = 0,
204	.group = KVM_DEV_XICS_GRP_SOURCES,
205	.addr = (uint64_t)(uintptr_t)&state,
206	};
207	int i;
208
209	for (i = 0; i < ics->nr_irqs; i++) {
210	ICSIRQState *irq = &ics->irqs[i];
211	int ret;
212
213	attr.attr = i + ics->offset;
214
215	state = irq->server;
216	state \|= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
217	<< KVM_XICS_PRIORITY_SHIFT;
218	if (irq->priority != irq->saved_priority) {
219	assert(irq->priority == 0xff);
220	state \|= KVM_XICS_MASKED;
221	}
222
4af88944	223	if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
11ad93f6 DG	224	state \|= KVM_XICS_LEVEL_SENSITIVE;
	225	if (irq->status & XICS_STATUS_ASSERTED) {
	226	state \|= KVM_XICS_PENDING;
	227	}
	228	} else {
	229	if (irq->status & XICS_STATUS_MASKED_PENDING) {
	230	state \|= KVM_XICS_PENDING;
	231	}
	232	}
	233
	234	ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
	235	if (ret != 0) {
	236	error_report("Unable to restore KVM interrupt controller state"
	237	" for IRQs %d: %s", i + ics->offset, strerror(errno));
	238	return ret;
	239	}
	240	}
	241
	242	return 0;
	243	}
	244
	245	static void ics_kvm_set_irq(void *opaque, int srcno, int val)
	246	{
	247	ICSState *ics = opaque;
	248	struct kvm_irq_level args;
	249	int rc;
	250
	251	args.irq = srcno + ics->offset;
4af88944	252	if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
11ad93f6 DG	253	if (!val) {
	254	return;
	255	}
	256	args.level = KVM_INTERRUPT_SET;
	257	} else {
	258	args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
	259	}
	260	rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
	261	if (rc < 0) {
	262	perror("kvm_irq_line");
	263	}
	264	}
	265
	266	static void ics_kvm_reset(DeviceState *dev)
	267	{
fb0e843a AK	268	ICSState *ics = ICS(dev);
fb0e843a AK	269	int i;
a7e519a8 AK	270	uint8_t flags[ics->nr_irqs];
	271
	272	for (i = 0; i < ics->nr_irqs; i++) {
	273	flags[i] = ics->irqs[i].flags;
	274	}
fb0e843a AK	275
fb0e843a AK	276	memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
a7e519a8	277
fb0e843a AK	278	for (i = 0; i < ics->nr_irqs; i++) {
	279	ics->irqs[i].priority = 0xff;
	280	ics->irqs[i].saved_priority = 0xff;
a7e519a8	281	ics->irqs[i].flags = flags[i];
fb0e843a AK	282	}
	283
	284	ics_set_kvm_state(ics, 1);
11ad93f6 DG	285	}
	286
	287	static void ics_kvm_realize(DeviceState dev, Error *errp)
	288	{
	289	ICSState *ics = ICS(dev);
	290
	291	if (!ics->nr_irqs) {
	292	error_setg(errp, "Number of interrupts needs to be greater 0");
	293	return;
	294	}
	295	ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
11ad93f6 DG	296	ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
	297	}
	298
	299	static void ics_kvm_class_init(ObjectClass klass, void data)
	300	{
	301	DeviceClass *dc = DEVICE_CLASS(klass);
	302	ICSStateClass *icsc = ICS_CLASS(klass);
	303
	304	dc->realize = ics_kvm_realize;
	305	dc->reset = ics_kvm_reset;
	306	icsc->pre_save = ics_get_kvm_state;
	307	icsc->post_load = ics_set_kvm_state;
	308	}
	309
	310	static const TypeInfo ics_kvm_info = {
	311	.name = TYPE_KVM_ICS,
	312	.parent = TYPE_ICS,
	313	.instance_size = sizeof(ICSState),
	314	.class_init = ics_kvm_class_init,
	315	};
	316
	317	/*
	318	* XICS-KVM
	319	*/
	320	static void xics_kvm_cpu_setup(XICSState icp, PowerPCCPU cpu)
	321	{
	322	CPUState *cs;
	323	ICPState *ss;
	324	KVMXICSState *icpkvm = KVM_XICS(icp);
	325
	326	cs = CPU(cpu);
	327	ss = &icp->ss[cs->cpu_index];
	328
	329	assert(cs->cpu_index < icp->nr_servers);
	330	if (icpkvm->kernel_xics_fd == -1) {
	331	abort();
	332	}
	333
	334	if (icpkvm->kernel_xics_fd != -1) {
	335	int ret;
11ad93f6 DG	336
	337	ss->cs = cs;
	338
48add816 CH	339	ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
48add816 CH	340	icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
11ad93f6	341	if (ret < 0) {
0f20ba62 AK	342	error_report("Unable to connect CPU%ld to kernel XICS: %s",
0f20ba62 AK	343	kvm_arch_vcpu_id(cs), strerror(errno));
11ad93f6 DG	344	exit(1);
	345	}
	346	}
	347	}
	348
	349	static void xics_kvm_set_nr_irqs(XICSState icp, uint32_t nr_irqs, Error *errp)
	350	{
	351	icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
	352	}
	353
	354	static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
	355	Error **errp)
	356	{
	357	int i;
	358
	359	icp->nr_servers = nr_servers;
	360
	361	icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
	362	for (i = 0; i < icp->nr_servers; i++) {
	363	char buffer[32];
	364	object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
	365	snprintf(buffer, sizeof(buffer), "icp[%d]", i);
	366	object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
	367	errp);
	368	}
	369	}
	370
	371	static void rtas_dummy(PowerPCCPU cpu, sPAPREnvironment spapr,
	372	uint32_t token,
	373	uint32_t nargs, target_ulong args,
	374	uint32_t nret, target_ulong rets)
	375	{
	376	error_report("pseries: %s must never be called for in-kernel XICS",
	377	__func__);
	378	}
	379
	380	static void xics_kvm_realize(DeviceState dev, Error *errp)
	381	{
	382	KVMXICSState *icpkvm = KVM_XICS(dev);
	383	XICSState *icp = XICS_COMMON(dev);
	384	int i, rc;
	385	Error *error = NULL;
	386	struct kvm_create_device xics_create_device = {
	387	.type = KVM_DEV_TYPE_XICS,
	388	.flags = 0,
	389	};
	390
	391	if (!kvm_enabled() \|\| !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
	392	error_setg(errp,
	393	"KVM and IRQ_XICS capability must be present for in-kernel XICS");
	394	goto fail;
	395	}
	396
3a3b8502 AK	397	spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
	398	spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
	399	spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
	400	spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
11ad93f6	401
3a3b8502	402	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
11ad93f6 DG	403	if (rc < 0) {
	404	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
	405	goto fail;
	406	}
	407
3a3b8502	408	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
11ad93f6 DG	409	if (rc < 0) {
	410	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
	411	goto fail;
	412	}
	413
3a3b8502	414	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
11ad93f6 DG	415	if (rc < 0) {
	416	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
	417	goto fail;
	418	}
	419
3a3b8502	420	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
11ad93f6 DG	421	if (rc < 0) {
	422	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
	423	goto fail;
	424	}
	425
	426	/* Create the kernel ICP */
	427	rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
	428	if (rc < 0) {
	429	error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
	430	goto fail;
	431	}
	432
	433	icpkvm->kernel_xics_fd = xics_create_device.fd;
	434
	435	object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
	436	if (error) {
	437	error_propagate(errp, error);
	438	goto fail;
	439	}
	440
	441	assert(icp->nr_servers);
	442	for (i = 0; i < icp->nr_servers; i++) {
	443	object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
	444	if (error) {
	445	error_propagate(errp, error);
	446	goto fail;
	447	}
	448	}
9554233c AK	449
	450	kvm_kernel_irqchip = true;
	451	kvm_irqfds_allowed = true;
	452	kvm_msi_via_irqfd_allowed = true;
	453	kvm_gsi_direct_mapping = true;
	454
11ad93f6 DG	455	return;
	456
	457	fail:
	458	kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
	459	kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
	460	kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
	461	kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
	462	}
	463
	464	static void xics_kvm_initfn(Object *obj)
	465	{
	466	XICSState *xics = XICS_COMMON(obj);
	467
	468	xics->ics = ICS(object_new(TYPE_KVM_ICS));
	469	object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
	470	xics->ics->icp = xics;
	471	}
	472
	473	static void xics_kvm_class_init(ObjectClass oc, void data)
	474	{
	475	DeviceClass *dc = DEVICE_CLASS(oc);
	476	XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
	477
	478	dc->realize = xics_kvm_realize;
	479	xsc->cpu_setup = xics_kvm_cpu_setup;
	480	xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
	481	xsc->set_nr_servers = xics_kvm_set_nr_servers;
	482	}
	483
	484	static const TypeInfo xics_kvm_info = {
	485	.name = TYPE_KVM_XICS,
	486	.parent = TYPE_XICS_COMMON,
	487	.instance_size = sizeof(KVMXICSState),
	488	.class_init = xics_kvm_class_init,
	489	.instance_init = xics_kvm_initfn,
	490	};
	491
	492	static void xics_kvm_register_types(void)
	493	{
	494	type_register_static(&xics_kvm_info);
	495	type_register_static(&ics_kvm_info);
	496	type_register_static(&icp_kvm_info);
	497	}
	498
	499	type_init(xics_kvm_register_types)