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Commit | Line | Data |
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39ac8455 DG |
1 | /* |
2 | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator | |
3 | * | |
4 | * Hypercall based emulated RTAS | |
5 | * | |
6 | * Copyright (c) 2010-2011 David Gibson, IBM Corporation. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | * | |
26 | */ | |
0d75590d | 27 | #include "qemu/osdep.h" |
39ac8455 | 28 | #include "cpu.h" |
03dd024f | 29 | #include "qemu/log.h" |
ce9863b7 | 30 | #include "qemu/error-report.h" |
9c17d615 | 31 | #include "sysemu/sysemu.h" |
39ac8455 | 32 | #include "hw/qdev.h" |
9c17d615 | 33 | #include "sysemu/device_tree.h" |
db4ef288 | 34 | #include "sysemu/cpus.h" |
77ac58dd | 35 | #include "sysemu/kvm.h" |
39ac8455 | 36 | |
0d09e41a PB |
37 | #include "hw/ppc/spapr.h" |
38 | #include "hw/ppc/spapr_vio.h" | |
eeddd59f | 39 | #include "hw/ppc/spapr_rtas.h" |
af81cf32 | 40 | #include "hw/ppc/ppc.h" |
e3943228 | 41 | #include "hw/boards.h" |
39ac8455 DG |
42 | |
43 | #include <libfdt.h> | |
8c8639df | 44 | #include "hw/ppc/spapr_drc.h" |
f348b6d1 | 45 | #include "qemu/cutils.h" |
028ec3ce | 46 | #include "trace.h" |
3f5dabce | 47 | #include "hw/ppc/fdt.h" |
8c8639df | 48 | |
28e02042 | 49 | static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
821303f5 DG |
50 | uint32_t token, uint32_t nargs, |
51 | target_ulong args, | |
52 | uint32_t nret, target_ulong rets) | |
53 | { | |
54 | uint8_t c = rtas_ld(args, 0); | |
5f2e2ba2 | 55 | VIOsPAPRDevice *sdev = vty_lookup(spapr, 0); |
821303f5 DG |
56 | |
57 | if (!sdev) { | |
a64d325d | 58 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
821303f5 DG |
59 | } else { |
60 | vty_putchars(sdev, &c, sizeof(c)); | |
a64d325d | 61 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
62 | } |
63 | } | |
64 | ||
28e02042 | 65 | static void rtas_power_off(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
821303f5 DG |
66 | uint32_t token, uint32_t nargs, target_ulong args, |
67 | uint32_t nret, target_ulong rets) | |
68 | { | |
69 | if (nargs != 2 || nret != 1) { | |
a64d325d | 70 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
821303f5 DG |
71 | return; |
72 | } | |
cf83f140 | 73 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
8a9c1b77 | 74 | cpu_stop_current(); |
a64d325d | 75 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
76 | } |
77 | ||
28e02042 | 78 | static void rtas_system_reboot(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
c821a43c DG |
79 | uint32_t token, uint32_t nargs, |
80 | target_ulong args, | |
81 | uint32_t nret, target_ulong rets) | |
82 | { | |
83 | if (nargs != 0 || nret != 1) { | |
a64d325d | 84 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
c821a43c DG |
85 | return; |
86 | } | |
cf83f140 | 87 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
a64d325d | 88 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
c821a43c DG |
89 | } |
90 | ||
210b580b | 91 | static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, |
28e02042 | 92 | sPAPRMachineState *spapr, |
a9f8ad8f DG |
93 | uint32_t token, uint32_t nargs, |
94 | target_ulong args, | |
95 | uint32_t nret, target_ulong rets) | |
96 | { | |
97 | target_ulong id; | |
0f20ba62 | 98 | PowerPCCPU *cpu; |
a9f8ad8f DG |
99 | |
100 | if (nargs != 1 || nret != 2) { | |
a64d325d | 101 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
102 | return; |
103 | } | |
104 | ||
105 | id = rtas_ld(args, 0); | |
2e886fb3 | 106 | cpu = spapr_find_cpu(id); |
05318a85 | 107 | if (cpu != NULL) { |
0f20ba62 | 108 | if (CPU(cpu)->halted) { |
a9f8ad8f DG |
109 | rtas_st(rets, 1, 0); |
110 | } else { | |
111 | rtas_st(rets, 1, 2); | |
112 | } | |
113 | ||
a64d325d | 114 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
115 | return; |
116 | } | |
117 | ||
118 | /* Didn't find a matching cpu */ | |
a64d325d | 119 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
120 | } |
121 | ||
af81cf32 BR |
122 | /* |
123 | * Set the timebase offset of the CPU to that of first CPU. | |
124 | * This helps hotplugged CPU to have the correct timebase offset. | |
125 | */ | |
126 | static void spapr_cpu_update_tb_offset(PowerPCCPU *cpu) | |
127 | { | |
128 | PowerPCCPU *fcpu = POWERPC_CPU(first_cpu); | |
129 | ||
130 | cpu->env.tb_env->tb_offset = fcpu->env.tb_env->tb_offset; | |
131 | } | |
132 | ||
133 | static void spapr_cpu_set_endianness(PowerPCCPU *cpu) | |
134 | { | |
135 | PowerPCCPU *fcpu = POWERPC_CPU(first_cpu); | |
136 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(fcpu); | |
137 | ||
138 | if (!pcc->interrupts_big_endian(fcpu)) { | |
139 | cpu->env.spr[SPR_LPCR] |= LPCR_ILE; | |
140 | } | |
141 | } | |
142 | ||
28e02042 | 143 | static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr, |
a9f8ad8f DG |
144 | uint32_t token, uint32_t nargs, |
145 | target_ulong args, | |
146 | uint32_t nret, target_ulong rets) | |
147 | { | |
148 | target_ulong id, start, r3; | |
0f20ba62 | 149 | PowerPCCPU *cpu; |
a9f8ad8f DG |
150 | |
151 | if (nargs != 3 || nret != 1) { | |
a64d325d | 152 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
153 | return; |
154 | } | |
155 | ||
156 | id = rtas_ld(args, 0); | |
157 | start = rtas_ld(args, 1); | |
158 | r3 = rtas_ld(args, 2); | |
159 | ||
2e886fb3 | 160 | cpu = spapr_find_cpu(id); |
0f20ba62 AK |
161 | if (cpu != NULL) { |
162 | CPUState *cs = CPU(cpu); | |
c67e216b | 163 | CPUPPCState *env = &cpu->env; |
9a94ee5b | 164 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
a9f8ad8f | 165 | |
c67e216b | 166 | if (!cs->halted) { |
a64d325d | 167 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
a9f8ad8f DG |
168 | return; |
169 | } | |
170 | ||
048706d9 DG |
171 | /* This will make sure qemu state is up to date with kvm, and |
172 | * mark it dirty so our changes get flushed back before the | |
173 | * new cpu enters */ | |
dd1750d7 | 174 | kvm_cpu_synchronize_state(cs); |
048706d9 | 175 | |
a9f8ad8f | 176 | env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); |
9a94ee5b CLG |
177 | |
178 | /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ | |
179 | env->spr[SPR_LPCR] |= pcc->lpcr_pm; | |
180 | ||
a9f8ad8f DG |
181 | env->nip = start; |
182 | env->gpr[3] = r3; | |
c67e216b | 183 | cs->halted = 0; |
af81cf32 BR |
184 | spapr_cpu_set_endianness(cpu); |
185 | spapr_cpu_update_tb_offset(cpu); | |
a9f8ad8f | 186 | |
c67e216b | 187 | qemu_cpu_kick(cs); |
a9f8ad8f | 188 | |
a64d325d | 189 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
190 | return; |
191 | } | |
192 | ||
193 | /* Didn't find a matching cpu */ | |
a64d325d | 194 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
195 | } |
196 | ||
28e02042 | 197 | static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
59760f2d AK |
198 | uint32_t token, uint32_t nargs, |
199 | target_ulong args, | |
200 | uint32_t nret, target_ulong rets) | |
201 | { | |
202 | CPUState *cs = CPU(cpu); | |
203 | CPUPPCState *env = &cpu->env; | |
9a94ee5b | 204 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
59760f2d AK |
205 | |
206 | cs->halted = 1; | |
9102deda | 207 | qemu_cpu_kick(cs); |
9a94ee5b CLG |
208 | |
209 | /* Disable Power-saving mode Exit Cause exceptions for the CPU. | |
210 | * This could deliver an interrupt on a dying CPU and crash the | |
211 | * guest */ | |
212 | env->spr[SPR_LPCR] &= ~pcc->lpcr_pm; | |
59760f2d AK |
213 | } |
214 | ||
c920f7b4 DG |
215 | static inline int sysparm_st(target_ulong addr, target_ulong len, |
216 | const void *val, uint16_t vallen) | |
217 | { | |
218 | hwaddr phys = ppc64_phys_to_real(addr); | |
219 | ||
220 | if (len < 2) { | |
221 | return RTAS_OUT_SYSPARM_PARAM_ERROR; | |
222 | } | |
223 | stw_be_phys(&address_space_memory, phys, vallen); | |
224 | cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); | |
225 | return RTAS_OUT_SUCCESS; | |
226 | } | |
227 | ||
3ada6b11 | 228 | static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, |
28e02042 | 229 | sPAPRMachineState *spapr, |
3ada6b11 AK |
230 | uint32_t token, uint32_t nargs, |
231 | target_ulong args, | |
232 | uint32_t nret, target_ulong rets) | |
233 | { | |
234 | target_ulong parameter = rtas_ld(args, 0); | |
235 | target_ulong buffer = rtas_ld(args, 1); | |
236 | target_ulong length = rtas_ld(args, 2); | |
c920f7b4 | 237 | target_ulong ret; |
3ada6b11 AK |
238 | |
239 | switch (parameter) { | |
3b50d897 | 240 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { |
e3943228 SB |
241 | char *param_val = g_strdup_printf("MaxEntCap=%d," |
242 | "DesMem=%llu," | |
243 | "DesProcs=%d," | |
244 | "MaxPlatProcs=%d", | |
245 | max_cpus, | |
246 | current_machine->ram_size / M_BYTE, | |
247 | smp_cpus, | |
248 | max_cpus); | |
c920f7b4 | 249 | ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); |
3b50d897 S |
250 | g_free(param_val); |
251 | break; | |
252 | } | |
3052d951 S |
253 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { |
254 | uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; | |
255 | ||
c920f7b4 | 256 | ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val)); |
3ada6b11 AK |
257 | break; |
258 | } | |
b907d7b0 | 259 | case RTAS_SYSPARM_UUID: |
9c5ce8db FZ |
260 | ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid, |
261 | (qemu_uuid_set ? 16 : 0)); | |
b907d7b0 | 262 | break; |
3052d951 S |
263 | default: |
264 | ret = RTAS_OUT_NOT_SUPPORTED; | |
265 | } | |
3ada6b11 AK |
266 | |
267 | rtas_st(rets, 0, ret); | |
268 | } | |
269 | ||
270 | static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu, | |
28e02042 | 271 | sPAPRMachineState *spapr, |
3ada6b11 AK |
272 | uint32_t token, uint32_t nargs, |
273 | target_ulong args, | |
274 | uint32_t nret, target_ulong rets) | |
275 | { | |
276 | target_ulong parameter = rtas_ld(args, 0); | |
277 | target_ulong ret = RTAS_OUT_NOT_SUPPORTED; | |
278 | ||
279 | switch (parameter) { | |
3b50d897 | 280 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: |
3052d951 | 281 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: |
b907d7b0 | 282 | case RTAS_SYSPARM_UUID: |
3ada6b11 AK |
283 | ret = RTAS_OUT_NOT_AUTHORIZED; |
284 | break; | |
285 | } | |
286 | ||
287 | rtas_st(rets, 0, ret); | |
288 | } | |
289 | ||
2e14072f | 290 | static void rtas_ibm_os_term(PowerPCCPU *cpu, |
28e02042 | 291 | sPAPRMachineState *spapr, |
2e14072f ND |
292 | uint32_t token, uint32_t nargs, |
293 | target_ulong args, | |
294 | uint32_t nret, target_ulong rets) | |
295 | { | |
2c553477 | 296 | qemu_system_guest_panicked(NULL); |
2e14072f | 297 | |
2c553477 | 298 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
2e14072f ND |
299 | } |
300 | ||
28e02042 | 301 | static void rtas_set_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
094d2058 NF |
302 | uint32_t token, uint32_t nargs, |
303 | target_ulong args, uint32_t nret, | |
304 | target_ulong rets) | |
305 | { | |
306 | int32_t power_domain; | |
307 | ||
308 | if (nargs != 2 || nret != 2) { | |
309 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
310 | return; | |
311 | } | |
312 | ||
313 | /* we currently only use a single, "live insert" powerdomain for | |
314 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
315 | */ | |
316 | power_domain = rtas_ld(args, 0); | |
317 | if (power_domain != -1) { | |
318 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
319 | return; | |
320 | } | |
321 | ||
322 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
323 | rtas_st(rets, 1, 100); | |
324 | } | |
325 | ||
28e02042 | 326 | static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
094d2058 NF |
327 | uint32_t token, uint32_t nargs, |
328 | target_ulong args, uint32_t nret, | |
329 | target_ulong rets) | |
330 | { | |
331 | int32_t power_domain; | |
332 | ||
333 | if (nargs != 1 || nret != 2) { | |
334 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
335 | return; | |
336 | } | |
337 | ||
338 | /* we currently only use a single, "live insert" powerdomain for | |
339 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
340 | */ | |
341 | power_domain = rtas_ld(args, 0); | |
342 | if (power_domain != -1) { | |
343 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
344 | return; | |
345 | } | |
346 | ||
347 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
348 | rtas_st(rets, 1, 100); | |
349 | } | |
350 | ||
39ac8455 DG |
351 | static struct rtas_call { |
352 | const char *name; | |
353 | spapr_rtas_fn fn; | |
3a3b8502 | 354 | } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE]; |
39ac8455 | 355 | |
28e02042 | 356 | target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
39ac8455 DG |
357 | uint32_t token, uint32_t nargs, target_ulong args, |
358 | uint32_t nret, target_ulong rets) | |
359 | { | |
3a3b8502 AK |
360 | if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) { |
361 | struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE); | |
39ac8455 DG |
362 | |
363 | if (call->fn) { | |
210b580b | 364 | call->fn(cpu, spapr, token, nargs, args, nret, rets); |
39ac8455 DG |
365 | return H_SUCCESS; |
366 | } | |
367 | } | |
368 | ||
821303f5 DG |
369 | /* HACK: Some Linux early debug code uses RTAS display-character, |
370 | * but assumes the token value is 0xa (which it is on some real | |
371 | * machines) without looking it up in the device tree. This | |
372 | * special case makes this work */ | |
373 | if (token == 0xa) { | |
210b580b | 374 | rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets); |
821303f5 DG |
375 | return H_SUCCESS; |
376 | } | |
377 | ||
39ac8455 | 378 | hcall_dprintf("Unknown RTAS token 0x%x\n", token); |
a64d325d | 379 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
39ac8455 DG |
380 | return H_PARAMETER; |
381 | } | |
382 | ||
eeddd59f LV |
383 | uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args, |
384 | uint32_t nret, uint64_t rets) | |
385 | { | |
386 | int token; | |
387 | ||
388 | for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) { | |
389 | if (strcmp(cmd, rtas_table[token].name) == 0) { | |
390 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); | |
391 | PowerPCCPU *cpu = POWERPC_CPU(first_cpu); | |
392 | ||
393 | rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE, | |
394 | nargs, args, nret, rets); | |
395 | return H_SUCCESS; | |
396 | } | |
397 | } | |
398 | return H_PARAMETER; | |
399 | } | |
400 | ||
3a3b8502 | 401 | void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) |
39ac8455 | 402 | { |
adf9ac50 | 403 | assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)); |
c89d5299 | 404 | |
3a3b8502 | 405 | token -= RTAS_TOKEN_BASE; |
adf9ac50 DG |
406 | |
407 | assert(!rtas_table[token].name); | |
39ac8455 | 408 | |
3a3b8502 AK |
409 | rtas_table[token].name = name; |
410 | rtas_table[token].fn = fn; | |
39ac8455 DG |
411 | } |
412 | ||
3f5dabce | 413 | void spapr_dt_rtas_tokens(void *fdt, int rtas) |
39ac8455 | 414 | { |
39ac8455 DG |
415 | int i; |
416 | ||
3a3b8502 | 417 | for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) { |
39ac8455 DG |
418 | struct rtas_call *call = &rtas_table[i]; |
419 | ||
d36b66f7 | 420 | if (!call->name) { |
39ac8455 DG |
421 | continue; |
422 | } | |
423 | ||
3f5dabce | 424 | _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE)); |
39ac8455 | 425 | } |
39ac8455 | 426 | } |
821303f5 | 427 | |
2cac78c1 DG |
428 | void spapr_load_rtas(sPAPRMachineState *spapr, void *fdt, hwaddr addr) |
429 | { | |
430 | int rtas_node; | |
431 | int ret; | |
432 | ||
433 | /* Copy RTAS blob into guest RAM */ | |
434 | cpu_physical_memory_write(addr, spapr->rtas_blob, spapr->rtas_size); | |
435 | ||
436 | ret = fdt_add_mem_rsv(fdt, addr, spapr->rtas_size); | |
437 | if (ret < 0) { | |
438 | error_report("Couldn't add RTAS reserve entry: %s", | |
439 | fdt_strerror(ret)); | |
440 | exit(1); | |
441 | } | |
442 | ||
443 | /* Update the device tree with the blob's location */ | |
444 | rtas_node = fdt_path_offset(fdt, "/rtas"); | |
445 | assert(rtas_node >= 0); | |
446 | ||
447 | ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-base", addr); | |
448 | if (ret < 0) { | |
449 | error_report("Couldn't add linux,rtas-base property: %s", | |
450 | fdt_strerror(ret)); | |
451 | exit(1); | |
452 | } | |
453 | ||
454 | ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-entry", addr); | |
455 | if (ret < 0) { | |
456 | error_report("Couldn't add linux,rtas-entry property: %s", | |
457 | fdt_strerror(ret)); | |
458 | exit(1); | |
459 | } | |
460 | ||
461 | ret = fdt_setprop_cell(fdt, rtas_node, "rtas-size", spapr->rtas_size); | |
462 | if (ret < 0) { | |
463 | error_report("Couldn't add rtas-size property: %s", | |
464 | fdt_strerror(ret)); | |
465 | exit(1); | |
466 | } | |
467 | } | |
468 | ||
83f7d43a | 469 | static void core_rtas_register_types(void) |
821303f5 | 470 | { |
3a3b8502 AK |
471 | spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character", |
472 | rtas_display_character); | |
3a3b8502 AK |
473 | spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off); |
474 | spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot", | |
475 | rtas_system_reboot); | |
476 | spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state", | |
a9f8ad8f | 477 | rtas_query_cpu_stopped_state); |
3a3b8502 AK |
478 | spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu); |
479 | spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self); | |
480 | spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER, | |
481 | "ibm,get-system-parameter", | |
3ada6b11 | 482 | rtas_ibm_get_system_parameter); |
3a3b8502 AK |
483 | spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER, |
484 | "ibm,set-system-parameter", | |
3ada6b11 | 485 | rtas_ibm_set_system_parameter); |
2e14072f ND |
486 | spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term", |
487 | rtas_ibm_os_term); | |
094d2058 NF |
488 | spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level", |
489 | rtas_set_power_level); | |
490 | spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", | |
491 | rtas_get_power_level); | |
821303f5 | 492 | } |
83f7d43a AF |
493 | |
494 | type_init(core_rtas_register_types) |