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d94e7434 PC |
1 | /* |
2 | * Microblaze kernel loader | |
3 | * | |
4 | * Copyright (c) 2012 Peter Crosthwaite <[email protected]> | |
5 | * Copyright (c) 2012 PetaLogix | |
6 | * Copyright (c) 2009 Edgar E. Iglesias. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
26 | ||
1de7afc9 PB |
27 | #include "qemu/option.h" |
28 | #include "qemu/config-file.h" | |
ec426ff8 | 29 | #include "qemu/error-report.h" |
d94e7434 | 30 | #include "qemu-common.h" |
9c17d615 | 31 | #include "sysemu/device_tree.h" |
7bccd940 | 32 | #include "sysemu/sysemu.h" |
83c9f4ca | 33 | #include "hw/loader.h" |
d94e7434 PC |
34 | #include "elf.h" |
35 | ||
47b43a1f | 36 | #include "boot.h" |
d94e7434 PC |
37 | |
38 | static struct | |
39 | { | |
bf494367 | 40 | void (*machine_cpu_reset)(MicroBlazeCPU *); |
d94e7434 PC |
41 | uint32_t bootstrap_pc; |
42 | uint32_t cmdline; | |
ec426ff8 EI |
43 | uint32_t initrd_start; |
44 | uint32_t initrd_end; | |
d94e7434 PC |
45 | uint32_t fdt; |
46 | } boot_info; | |
47 | ||
48 | static void main_cpu_reset(void *opaque) | |
49 | { | |
bf494367 AF |
50 | MicroBlazeCPU *cpu = opaque; |
51 | CPUMBState *env = &cpu->env; | |
d94e7434 | 52 | |
bf494367 | 53 | cpu_reset(CPU(cpu)); |
d94e7434 | 54 | env->regs[5] = boot_info.cmdline; |
ec426ff8 | 55 | env->regs[6] = boot_info.initrd_start; |
d94e7434 PC |
56 | env->regs[7] = boot_info.fdt; |
57 | env->sregs[SR_PC] = boot_info.bootstrap_pc; | |
58 | if (boot_info.machine_cpu_reset) { | |
bf494367 | 59 | boot_info.machine_cpu_reset(cpu); |
d94e7434 PC |
60 | } |
61 | } | |
62 | ||
a8170e5e | 63 | static int microblaze_load_dtb(hwaddr addr, |
d0b022a0 | 64 | uint32_t ramsize, |
ec426ff8 EI |
65 | uint32_t initrd_start, |
66 | uint32_t initrd_end, | |
d0b022a0 EI |
67 | const char *kernel_cmdline, |
68 | const char *dtb_filename) | |
d94e7434 | 69 | { |
d94e7434 | 70 | int fdt_size; |
da71ebd1 | 71 | void *fdt = NULL; |
d94e7434 PC |
72 | int r; |
73 | ||
da71ebd1 PC |
74 | if (dtb_filename) { |
75 | fdt = load_device_tree(dtb_filename, &fdt_size); | |
76 | } | |
d94e7434 | 77 | if (!fdt) { |
da71ebd1 | 78 | return 0; |
d94e7434 PC |
79 | } |
80 | ||
81 | if (kernel_cmdline) { | |
5a4348d1 PC |
82 | r = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", |
83 | kernel_cmdline); | |
d94e7434 PC |
84 | if (r < 0) { |
85 | fprintf(stderr, "couldn't set /chosen/bootargs\n"); | |
86 | } | |
87 | } | |
88 | ||
ec426ff8 | 89 | if (initrd_start) { |
5a4348d1 PC |
90 | qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", |
91 | initrd_start); | |
ec426ff8 | 92 | |
5a4348d1 PC |
93 | qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", |
94 | initrd_end); | |
ec426ff8 EI |
95 | } |
96 | ||
e1fe50dc | 97 | cpu_physical_memory_write(addr, fdt, fdt_size); |
d94e7434 PC |
98 | return fdt_size; |
99 | } | |
100 | ||
101 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) | |
102 | { | |
103 | return addr - 0x30000000LL; | |
104 | } | |
105 | ||
a8170e5e | 106 | void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base, |
ec426ff8 EI |
107 | uint32_t ramsize, |
108 | const char *initrd_filename, | |
109 | const char *dtb_filename, | |
bf494367 | 110 | void (*machine_cpu_reset)(MicroBlazeCPU *)) |
d94e7434 | 111 | { |
d94e7434 | 112 | QemuOpts *machine_opts; |
7bccd940 MA |
113 | const char *kernel_filename; |
114 | const char *kernel_cmdline; | |
115 | const char *dtb_arg; | |
116 | ||
117 | machine_opts = qemu_get_machine_opts(); | |
118 | kernel_filename = qemu_opt_get(machine_opts, "kernel"); | |
119 | kernel_cmdline = qemu_opt_get(machine_opts, "append"); | |
120 | dtb_arg = qemu_opt_get(machine_opts, "dtb"); | |
121 | if (dtb_arg) { /* Preference a -dtb argument */ | |
122 | dtb_filename = dtb_arg; | |
123 | } else { /* default to pcbios dtb as passed by machine_init */ | |
124 | dtb_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, dtb_filename); | |
d94e7434 PC |
125 | } |
126 | ||
127 | boot_info.machine_cpu_reset = machine_cpu_reset; | |
bf494367 | 128 | qemu_register_reset(main_cpu_reset, cpu); |
d94e7434 PC |
129 | |
130 | if (kernel_filename) { | |
131 | int kernel_size; | |
132 | uint64_t entry, low, high; | |
133 | uint32_t base32; | |
134 | int big_endian = 0; | |
135 | ||
136 | #ifdef TARGET_WORDS_BIGENDIAN | |
137 | big_endian = 1; | |
138 | #endif | |
139 | ||
140 | /* Boots a kernel elf binary. */ | |
141 | kernel_size = load_elf(kernel_filename, NULL, NULL, | |
142 | &entry, &low, &high, | |
143 | big_endian, ELF_MACHINE, 0); | |
144 | base32 = entry; | |
145 | if (base32 == 0xc0000000) { | |
146 | kernel_size = load_elf(kernel_filename, translate_kernel_address, | |
147 | NULL, &entry, NULL, NULL, | |
148 | big_endian, ELF_MACHINE, 0); | |
149 | } | |
150 | /* Always boot into physical ram. */ | |
e5bfd640 | 151 | boot_info.bootstrap_pc = (uint32_t)entry; |
d94e7434 PC |
152 | |
153 | /* If it wasn't an ELF image, try an u-boot image. */ | |
154 | if (kernel_size < 0) { | |
a8170e5e | 155 | hwaddr uentry, loadaddr; |
d94e7434 PC |
156 | |
157 | kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0); | |
158 | boot_info.bootstrap_pc = uentry; | |
159 | high = (loadaddr + kernel_size + 3) & ~3; | |
160 | } | |
161 | ||
162 | /* Not an ELF image nor an u-boot image, try a RAW image. */ | |
163 | if (kernel_size < 0) { | |
164 | kernel_size = load_image_targphys(kernel_filename, ddr_base, | |
165 | ram_size); | |
166 | boot_info.bootstrap_pc = ddr_base; | |
167 | high = (ddr_base + kernel_size + 3) & ~3; | |
168 | } | |
169 | ||
ec426ff8 EI |
170 | if (initrd_filename) { |
171 | int initrd_size; | |
172 | uint32_t initrd_offset; | |
173 | ||
174 | high = ROUND_UP(high + kernel_size, 4); | |
175 | boot_info.initrd_start = high; | |
176 | initrd_offset = boot_info.initrd_start - ddr_base; | |
1b939d92 EI |
177 | |
178 | initrd_size = load_ramdisk(initrd_filename, | |
179 | boot_info.initrd_start, | |
180 | ram_size - initrd_offset); | |
181 | if (initrd_size < 0) { | |
182 | initrd_size = load_image_targphys(initrd_filename, | |
183 | boot_info.initrd_start, | |
184 | ram_size - initrd_offset); | |
185 | } | |
ec426ff8 EI |
186 | if (initrd_size < 0) { |
187 | error_report("qemu: could not load initrd '%s'\n", | |
188 | initrd_filename); | |
189 | exit(EXIT_FAILURE); | |
190 | } | |
191 | boot_info.initrd_end = boot_info.initrd_start + initrd_size; | |
192 | high = ROUND_UP(high + initrd_size, 4); | |
193 | } | |
194 | ||
d94e7434 PC |
195 | boot_info.cmdline = high + 4096; |
196 | if (kernel_cmdline && strlen(kernel_cmdline)) { | |
197 | pstrcpy_targphys("cmdline", boot_info.cmdline, 256, kernel_cmdline); | |
198 | } | |
199 | /* Provide a device-tree. */ | |
200 | boot_info.fdt = boot_info.cmdline + 4096; | |
d0b022a0 | 201 | microblaze_load_dtb(boot_info.fdt, ram_size, |
ec426ff8 EI |
202 | boot_info.initrd_start, |
203 | boot_info.initrd_end, | |
d0b022a0 EI |
204 | kernel_cmdline, |
205 | dtb_filename); | |
d94e7434 PC |
206 | } |
207 | ||
208 | } |