[qemu.git] / include / hw / virtio / virtio-gpu.h

/*
 * Virtio GPU Device
 *
 * Copyright Red Hat, Inc. 2013-2014
 *
 * Authors:
 *     Dave Airlie <[email protected]>
 *     Gerd Hoffmann <[email protected]>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.
 * See the COPYING file in the top-level directory.
 */

#ifndef _QEMU_VIRTIO_VGA_H
#define _QEMU_VIRTIO_VGA_H

#include "qemu/queue.h"
#include "ui/qemu-pixman.h"
#include "ui/console.h"
#include "hw/virtio/virtio.h"
#include "hw/pci/pci.h"

#include "standard-headers/linux/virtio_gpu.h"
#define TYPE_VIRTIO_GPU "virtio-gpu-device"
#define VIRTIO_GPU(obj)                                        \
        OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)

#define VIRTIO_ID_GPU 16

#define VIRTIO_GPU_MAX_SCANOUT 4

struct virtio_gpu_simple_resource {
    uint32_t resource_id;
    uint32_t width;
    uint32_t height;
    uint32_t format;
    struct iovec *iov;
    unsigned int iov_cnt;
    uint32_t scanout_bitmask;
    pixman_image_t *image;
    QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
};

struct virtio_gpu_scanout {
    QemuConsole *con;
    DisplaySurface *ds;
    uint32_t width, height;
    int x, y;
    int invalidate;
    uint32_t resource_id;
    QEMUCursor *current_cursor;
};

struct virtio_gpu_requested_state {
    uint32_t width, height;
    int x, y;
};

enum virtio_gpu_conf_flags {
    VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
    VIRTIO_GPU_FLAG_STATS_ENABLED,
};

#define virtio_gpu_virgl_enabled(_cfg) \
    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
#define virtio_gpu_stats_enabled(_cfg) \
    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))

struct virtio_gpu_conf {
    uint32_t max_outputs;
    uint32_t flags;
};

struct virtio_gpu_ctrl_command {
    VirtQueueElement elem;
    VirtQueue *vq;
    struct virtio_gpu_ctrl_hdr cmd_hdr;
    uint32_t error;
    bool finished;
    QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
};

typedef struct VirtIOGPU {
    VirtIODevice parent_obj;

    QEMUBH *ctrl_bh;
    QEMUBH *cursor_bh;
    VirtQueue *ctrl_vq;
    VirtQueue *cursor_vq;

    int enable;

    int config_size;
    DeviceState *qdev;

    QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
    QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;

    struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUT];
    struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUT];

    struct virtio_gpu_conf conf;
    int enabled_output_bitmask;
    struct virtio_gpu_config virtio_config;

    bool use_virgl_renderer;
    bool renderer_inited;
    QEMUTimer *fence_poll;
    QEMUTimer *print_stats;

    uint32_t inflight;
    struct {
        uint32_t max_inflight;
        uint32_t requests;
        uint32_t req_3d;
        uint32_t bytes_3d;
    } stats;
} VirtIOGPU;

extern const GraphicHwOps virtio_gpu_ops;

/* to share between PCI and VGA */
#define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state)               \
    DEFINE_PROP_BIT("ioeventfd", _state, flags,                \
                    VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \
    DEFINE_PROP_UINT32("vectors", _state, nvectors, 3)

#define VIRTIO_GPU_FILL_CMD(out) do {                                   \
        size_t s;                                                       \
        s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
                       &out, sizeof(out));                              \
        if (s != sizeof(out)) {                                         \
            qemu_log_mask(LOG_GUEST_ERROR,                              \
                          "%s: command size incorrect %zu vs %zu\n",    \
                          __func__, s, sizeof(out));                    \
            return;                                                     \
        }                                                               \
    } while (0)

/* virtio-gpu.c */
void virtio_gpu_ctrl_response(VirtIOGPU *g,
                              struct virtio_gpu_ctrl_command *cmd,
                              struct virtio_gpu_ctrl_hdr *resp,
                              size_t resp_len);
void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
                                     struct virtio_gpu_ctrl_command *cmd,
                                     enum virtio_gpu_ctrl_type type);
void virtio_gpu_get_display_info(VirtIOGPU *g,
                                 struct virtio_gpu_ctrl_command *cmd);
int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
                                  struct virtio_gpu_ctrl_command *cmd,
                                  struct iovec **iov);
void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);

/* virtio-gpu-3d.c */
void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
                                  struct virtio_gpu_ctrl_command *cmd);
void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
void virtio_gpu_virgl_reset(VirtIOGPU *g);
int virtio_gpu_virgl_init(VirtIOGPU *g);

#endif
Commit	Line	Data
62232bf4 GH	1	/*
	2	* Virtio GPU Device
	3	*
	4	* Copyright Red Hat, Inc. 2013-2014
	5	*
	6	* Authors:
	7	* Dave Airlie <[email protected]>
	8	* Gerd Hoffmann <[email protected]>
	9	*
	10	* This work is licensed under the terms of the GNU GPL, version 2.
	11	* See the COPYING file in the top-level directory.
	12	*/
	13
	14	#ifndef _QEMU_VIRTIO_VGA_H
	15	#define _QEMU_VIRTIO_VGA_H
	16
	17	#include "qemu/queue.h"
	18	#include "ui/qemu-pixman.h"
	19	#include "ui/console.h"
	20	#include "hw/virtio/virtio.h"
	21	#include "hw/pci/pci.h"
	22
	23	#include "standard-headers/linux/virtio_gpu.h"
	24	#define TYPE_VIRTIO_GPU "virtio-gpu-device"
	25	#define VIRTIO_GPU(obj) \
	26	OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)
	27
	28	#define VIRTIO_ID_GPU 16
	29
	30	#define VIRTIO_GPU_MAX_SCANOUT 4
	31
	32	struct virtio_gpu_simple_resource {
	33	uint32_t resource_id;
	34	uint32_t width;
	35	uint32_t height;
	36	uint32_t format;
	37	struct iovec *iov;
	38	unsigned int iov_cnt;
	39	uint32_t scanout_bitmask;
	40	pixman_image_t *image;
	41	QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
	42	};
	43
	44	struct virtio_gpu_scanout {
	45	QemuConsole *con;
	46	DisplaySurface *ds;
	47	uint32_t width, height;
	48	int x, y;
	49	int invalidate;
	50	uint32_t resource_id;
	51	QEMUCursor *current_cursor;
	52	};
	53
	54	struct virtio_gpu_requested_state {
	55	uint32_t width, height;
	56	int x, y;
	57	};
	58
9d9e1521 GH	59	enum virtio_gpu_conf_flags {
	60	VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
	61	VIRTIO_GPU_FLAG_STATS_ENABLED,
	62	};
	63
	64	#define virtio_gpu_virgl_enabled(_cfg) \
	65	(_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
	66	#define virtio_gpu_stats_enabled(_cfg) \
	67	(_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
	68
62232bf4 GH	69	struct virtio_gpu_conf {
62232bf4 GH	70	uint32_t max_outputs;
9d9e1521	71	uint32_t flags;
62232bf4 GH	72	};
	73
	74	struct virtio_gpu_ctrl_command {
	75	VirtQueueElement elem;
	76	VirtQueue *vq;
	77	struct virtio_gpu_ctrl_hdr cmd_hdr;
	78	uint32_t error;
	79	bool finished;
	80	QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
	81	};
	82
	83	typedef struct VirtIOGPU {
	84	VirtIODevice parent_obj;
	85
	86	QEMUBH *ctrl_bh;
	87	QEMUBH *cursor_bh;
	88	VirtQueue *ctrl_vq;
	89	VirtQueue *cursor_vq;
	90
	91	int enable;
	92
	93	int config_size;
	94	DeviceState *qdev;
	95
	96	QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
	97	QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
	98
	99	struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUT];
	100	struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUT];
	101
	102	struct virtio_gpu_conf conf;
	103	int enabled_output_bitmask;
	104	struct virtio_gpu_config virtio_config;
	105
9d9e1521 GH	106	bool use_virgl_renderer;
9d9e1521 GH	107	bool renderer_inited;
62232bf4 GH	108	QEMUTimer *fence_poll;
	109	QEMUTimer *print_stats;
	110
9d9e1521	111	uint32_t inflight;
62232bf4	112	struct {
62232bf4 GH	113	uint32_t max_inflight;
	114	uint32_t requests;
	115	uint32_t req_3d;
	116	uint32_t bytes_3d;
	117	} stats;
	118	} VirtIOGPU;
	119
	120	extern const GraphicHwOps virtio_gpu_ops;
	121
	122	/* to share between PCI and VGA */
	123	#define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state) \
	124	DEFINE_PROP_BIT("ioeventfd", _state, flags, \
	125	VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \
	126	DEFINE_PROP_UINT32("vectors", _state, nvectors, 3)
	127
62232bf4 GH	128	#define VIRTIO_GPU_FILL_CMD(out) do { \
	129	size_t s; \
	130	s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
	131	&out, sizeof(out)); \
	132	if (s != sizeof(out)) { \
	133	qemu_log_mask(LOG_GUEST_ERROR, \
	134	"%s: command size incorrect %zu vs %zu\n", \
	135	__func__, s, sizeof(out)); \
	136	return; \
	137	} \
	138	} while (0)
	139
	140	/* virtio-gpu.c */
	141	void virtio_gpu_ctrl_response(VirtIOGPU *g,
	142	struct virtio_gpu_ctrl_command *cmd,
	143	struct virtio_gpu_ctrl_hdr *resp,
	144	size_t resp_len);
	145	void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
	146	struct virtio_gpu_ctrl_command *cmd,
	147	enum virtio_gpu_ctrl_type type);
	148	void virtio_gpu_get_display_info(VirtIOGPU *g,
	149	struct virtio_gpu_ctrl_command *cmd);
	150	int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
	151	struct virtio_gpu_ctrl_command *cmd,
	152	struct iovec **iov);
	153	void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);
	154
9d9e1521 GH	155	/* virtio-gpu-3d.c */
	156	void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
	157	struct virtio_gpu_ctrl_command *cmd);
	158	void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
	159	void virtio_gpu_virgl_reset(VirtIOGPU *g);
	160	int virtio_gpu_virgl_init(VirtIOGPU *g);
	161
62232bf4	162	#endif