]>
Commit | Line | Data |
---|---|---|
4040ab72 DG |
1 | /* |
2 | * QEMU sPAPR VIO code | |
3 | * | |
4 | * Copyright (c) 2010 David Gibson, IBM Corporation <[email protected]> | |
5 | * Based on the s390 virtio bus code: | |
6 | * Copyright (c) 2009 Alexander Graf <[email protected]> | |
7 | * | |
8 | * This library is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU Lesser General Public | |
10 | * License as published by the Free Software Foundation; either | |
11 | * version 2 of the License, or (at your option) any later version. | |
12 | * | |
13 | * This library is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * Lesser General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU Lesser General Public | |
19 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
0d75590d | 22 | #include "qemu/osdep.h" |
83c9f4ca | 23 | #include "hw/hw.h" |
9c17d615 | 24 | #include "sysemu/sysemu.h" |
83c9f4ca | 25 | #include "hw/boards.h" |
83c9f4ca | 26 | #include "hw/loader.h" |
4040ab72 DG |
27 | #include "elf.h" |
28 | #include "hw/sysbus.h" | |
9c17d615 PB |
29 | #include "sysemu/kvm.h" |
30 | #include "sysemu/device_tree.h" | |
b45d63b6 | 31 | #include "kvm_ppc.h" |
4040ab72 | 32 | |
0d09e41a PB |
33 | #include "hw/ppc/spapr.h" |
34 | #include "hw/ppc/spapr_vio.h" | |
35 | #include "hw/ppc/xics.h" | |
4040ab72 | 36 | |
4040ab72 | 37 | #include <libfdt.h> |
4040ab72 DG |
38 | |
39 | /* #define DEBUG_SPAPR */ | |
40 | ||
41 | #ifdef DEBUG_SPAPR | |
f6bda9cb | 42 | #define DPRINTF(fmt, ...) \ |
4040ab72 DG |
43 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
44 | #else | |
f6bda9cb | 45 | #define DPRINTF(fmt, ...) \ |
4040ab72 DG |
46 | do { } while (0) |
47 | #endif | |
48 | ||
3cb75a7c | 49 | static Property spapr_vio_props[] = { |
a307d594 | 50 | DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, irq, 0), \ |
3cb75a7c PB |
51 | DEFINE_PROP_END_OF_LIST(), |
52 | }; | |
53 | ||
c4eda5b7 DG |
54 | static char *spapr_vio_get_dev_name(DeviceState *qdev) |
55 | { | |
56 | VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev); | |
57 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); | |
58 | char *name; | |
59 | ||
60 | /* Device tree style name device@reg */ | |
61 | name = g_strdup_printf("%s@%x", pc->dt_name, dev->reg); | |
62 | ||
63 | return name; | |
64 | } | |
65 | ||
66 | static void spapr_vio_bus_class_init(ObjectClass *klass, void *data) | |
67 | { | |
68 | BusClass *k = BUS_CLASS(klass); | |
69 | ||
70 | k->get_dev_path = spapr_vio_get_dev_name; | |
5a06393f | 71 | k->get_fw_dev_path = spapr_vio_get_dev_name; |
c4eda5b7 DG |
72 | } |
73 | ||
0d936928 AL |
74 | static const TypeInfo spapr_vio_bus_info = { |
75 | .name = TYPE_SPAPR_VIO_BUS, | |
76 | .parent = TYPE_BUS, | |
c4eda5b7 | 77 | .class_init = spapr_vio_bus_class_init, |
0d936928 | 78 | .instance_size = sizeof(VIOsPAPRBus), |
4040ab72 DG |
79 | }; |
80 | ||
81 | VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg) | |
82 | { | |
0866aca1 | 83 | BusChild *kid; |
4040ab72 DG |
84 | VIOsPAPRDevice *dev = NULL; |
85 | ||
0866aca1 AL |
86 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
87 | dev = (VIOsPAPRDevice *)kid->child; | |
4040ab72 | 88 | if (dev->reg == reg) { |
5435352c | 89 | return dev; |
4040ab72 DG |
90 | } |
91 | } | |
92 | ||
5435352c | 93 | return NULL; |
4040ab72 DG |
94 | } |
95 | ||
4040ab72 DG |
96 | static int vio_make_devnode(VIOsPAPRDevice *dev, |
97 | void *fdt) | |
98 | { | |
3954d33a | 99 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
1e34d859 ME |
100 | int vdevice_off, node_off, ret; |
101 | char *dt_name; | |
4040ab72 DG |
102 | |
103 | vdevice_off = fdt_path_offset(fdt, "/vdevice"); | |
104 | if (vdevice_off < 0) { | |
105 | return vdevice_off; | |
106 | } | |
107 | ||
c4eda5b7 | 108 | dt_name = spapr_vio_get_dev_name(DEVICE(dev)); |
1e34d859 | 109 | node_off = fdt_add_subnode(fdt, vdevice_off, dt_name); |
4ecf8aa5 | 110 | g_free(dt_name); |
4040ab72 DG |
111 | if (node_off < 0) { |
112 | return node_off; | |
113 | } | |
114 | ||
115 | ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg); | |
116 | if (ret < 0) { | |
117 | return ret; | |
118 | } | |
119 | ||
3954d33a | 120 | if (pc->dt_type) { |
4040ab72 | 121 | ret = fdt_setprop_string(fdt, node_off, "device_type", |
3954d33a | 122 | pc->dt_type); |
4040ab72 DG |
123 | if (ret < 0) { |
124 | return ret; | |
125 | } | |
126 | } | |
127 | ||
3954d33a | 128 | if (pc->dt_compatible) { |
4040ab72 | 129 | ret = fdt_setprop_string(fdt, node_off, "compatible", |
3954d33a | 130 | pc->dt_compatible); |
4040ab72 DG |
131 | if (ret < 0) { |
132 | return ret; | |
133 | } | |
134 | } | |
135 | ||
a307d594 AK |
136 | if (dev->irq) { |
137 | uint32_t ints_prop[] = {cpu_to_be32(dev->irq), 0}; | |
00dc738d DG |
138 | |
139 | ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop, | |
140 | sizeof(ints_prop)); | |
141 | if (ret < 0) { | |
142 | return ret; | |
143 | } | |
144 | } | |
145 | ||
2b7dc949 | 146 | ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet); |
ad0ebb91 DG |
147 | if (ret < 0) { |
148 | return ret; | |
ee86dfee DG |
149 | } |
150 | ||
3954d33a AL |
151 | if (pc->devnode) { |
152 | ret = (pc->devnode)(dev, fdt, node_off); | |
4040ab72 DG |
153 | if (ret < 0) { |
154 | return ret; | |
155 | } | |
156 | } | |
157 | ||
158 | return node_off; | |
159 | } | |
4040ab72 | 160 | |
b45d63b6 BH |
161 | /* |
162 | * CRQ handling | |
163 | */ | |
28e02042 | 164 | static target_ulong h_reg_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
b45d63b6 BH |
165 | target_ulong opcode, target_ulong *args) |
166 | { | |
167 | target_ulong reg = args[0]; | |
168 | target_ulong queue_addr = args[1]; | |
169 | target_ulong queue_len = args[2]; | |
170 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
171 | ||
172 | if (!dev) { | |
d9599c92 | 173 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
174 | return H_PARAMETER; |
175 | } | |
176 | ||
177 | /* We can't grok a queue size bigger than 256M for now */ | |
178 | if (queue_len < 0x1000 || queue_len > 0x10000000) { | |
d9599c92 DG |
179 | hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx |
180 | ")\n", queue_len); | |
b45d63b6 BH |
181 | return H_PARAMETER; |
182 | } | |
183 | ||
184 | /* Check queue alignment */ | |
185 | if (queue_addr & 0xfff) { | |
d9599c92 | 186 | hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr); |
b45d63b6 BH |
187 | return H_PARAMETER; |
188 | } | |
189 | ||
190 | /* Check if device supports CRQs */ | |
191 | if (!dev->crq.SendFunc) { | |
8e01f355 | 192 | hcall_dprintf("Device does not support CRQ\n"); |
b45d63b6 BH |
193 | return H_NOT_FOUND; |
194 | } | |
195 | ||
b45d63b6 BH |
196 | /* Already a queue ? */ |
197 | if (dev->crq.qsize) { | |
8e01f355 | 198 | hcall_dprintf("CRQ already registered\n"); |
b45d63b6 BH |
199 | return H_RESOURCE; |
200 | } | |
201 | dev->crq.qladdr = queue_addr; | |
202 | dev->crq.qsize = queue_len; | |
203 | dev->crq.qnext = 0; | |
204 | ||
f6bda9cb | 205 | DPRINTF("CRQ for dev 0x" TARGET_FMT_lx " registered at 0x" |
b45d63b6 BH |
206 | TARGET_FMT_lx "/0x" TARGET_FMT_lx "\n", |
207 | reg, queue_addr, queue_len); | |
208 | return H_SUCCESS; | |
209 | } | |
210 | ||
8e01f355 DG |
211 | static target_ulong free_crq(VIOsPAPRDevice *dev) |
212 | { | |
213 | dev->crq.qladdr = 0; | |
214 | dev->crq.qsize = 0; | |
215 | dev->crq.qnext = 0; | |
216 | ||
f6bda9cb | 217 | DPRINTF("CRQ for dev 0x%" PRIx32 " freed\n", dev->reg); |
8e01f355 DG |
218 | |
219 | return H_SUCCESS; | |
220 | } | |
221 | ||
28e02042 | 222 | static target_ulong h_free_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
b45d63b6 BH |
223 | target_ulong opcode, target_ulong *args) |
224 | { | |
225 | target_ulong reg = args[0]; | |
226 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
227 | ||
228 | if (!dev) { | |
d9599c92 | 229 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
230 | return H_PARAMETER; |
231 | } | |
232 | ||
8e01f355 | 233 | return free_crq(dev); |
b45d63b6 BH |
234 | } |
235 | ||
28e02042 | 236 | static target_ulong h_send_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
b45d63b6 BH |
237 | target_ulong opcode, target_ulong *args) |
238 | { | |
239 | target_ulong reg = args[0]; | |
240 | target_ulong msg_hi = args[1]; | |
241 | target_ulong msg_lo = args[2]; | |
242 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
243 | uint64_t crq_mangle[2]; | |
244 | ||
245 | if (!dev) { | |
d9599c92 | 246 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
247 | return H_PARAMETER; |
248 | } | |
249 | crq_mangle[0] = cpu_to_be64(msg_hi); | |
250 | crq_mangle[1] = cpu_to_be64(msg_lo); | |
251 | ||
252 | if (dev->crq.SendFunc) { | |
253 | return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle); | |
254 | } | |
255 | ||
256 | return H_HARDWARE; | |
257 | } | |
258 | ||
28e02042 | 259 | static target_ulong h_enable_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
b45d63b6 BH |
260 | target_ulong opcode, target_ulong *args) |
261 | { | |
262 | target_ulong reg = args[0]; | |
263 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
264 | ||
265 | if (!dev) { | |
d9599c92 | 266 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
267 | return H_PARAMETER; |
268 | } | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
273 | /* Returns negative error, 0 success, or positive: queue full */ | |
274 | int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq) | |
275 | { | |
276 | int rc; | |
277 | uint8_t byte; | |
278 | ||
279 | if (!dev->crq.qsize) { | |
280 | fprintf(stderr, "spapr_vio_send_creq on uninitialized queue\n"); | |
281 | return -1; | |
282 | } | |
283 | ||
284 | /* Maybe do a fast path for KVM just writing to the pages */ | |
ad0ebb91 | 285 | rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1); |
b45d63b6 BH |
286 | if (rc) { |
287 | return rc; | |
288 | } | |
289 | if (byte != 0) { | |
290 | return 1; | |
291 | } | |
292 | ||
ad0ebb91 | 293 | rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8, |
b45d63b6 BH |
294 | &crq[8], 8); |
295 | if (rc) { | |
296 | return rc; | |
297 | } | |
298 | ||
299 | kvmppc_eieio(); | |
300 | ||
ad0ebb91 | 301 | rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8); |
b45d63b6 BH |
302 | if (rc) { |
303 | return rc; | |
304 | } | |
305 | ||
306 | dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize; | |
307 | ||
308 | if (dev->signal_state & 1) { | |
a307d594 | 309 | qemu_irq_pulse(spapr_vio_qirq(dev)); |
b45d63b6 BH |
310 | } |
311 | ||
312 | return 0; | |
313 | } | |
314 | ||
08942ac1 BH |
315 | /* "quiesce" handling */ |
316 | ||
317 | static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev) | |
318 | { | |
2b7dc949 | 319 | if (dev->tcet) { |
a83000f5 | 320 | device_reset(DEVICE(dev->tcet)); |
08942ac1 | 321 | } |
4dd96f24 | 322 | free_crq(dev); |
08942ac1 BH |
323 | } |
324 | ||
ee9a569a AK |
325 | void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass) |
326 | { | |
327 | if (!dev->tcet) { | |
328 | return; | |
329 | } | |
330 | ||
331 | memory_region_set_enabled(&dev->mrbypass, bypass); | |
332 | memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass); | |
333 | ||
334 | dev->tcet->bypass = bypass; | |
335 | } | |
336 | ||
28e02042 | 337 | static void rtas_set_tce_bypass(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
210b580b | 338 | uint32_t token, |
08942ac1 BH |
339 | uint32_t nargs, target_ulong args, |
340 | uint32_t nret, target_ulong rets) | |
341 | { | |
342 | VIOsPAPRBus *bus = spapr->vio_bus; | |
343 | VIOsPAPRDevice *dev; | |
344 | uint32_t unit, enable; | |
345 | ||
346 | if (nargs != 2) { | |
a64d325d | 347 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
08942ac1 BH |
348 | return; |
349 | } | |
350 | unit = rtas_ld(args, 0); | |
351 | enable = rtas_ld(args, 1); | |
352 | dev = spapr_vio_find_by_reg(bus, unit); | |
353 | if (!dev) { | |
a64d325d | 354 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
08942ac1 BH |
355 | return; |
356 | } | |
ad0ebb91 | 357 | |
2b7dc949 | 358 | if (!dev->tcet) { |
a64d325d | 359 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
53724ee5 | 360 | return; |
08942ac1 BH |
361 | } |
362 | ||
ee9a569a | 363 | spapr_vio_set_bypass(dev, !!enable); |
53724ee5 | 364 | |
a64d325d | 365 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
08942ac1 BH |
366 | } |
367 | ||
28e02042 | 368 | static void rtas_quiesce(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
210b580b | 369 | uint32_t token, |
08942ac1 BH |
370 | uint32_t nargs, target_ulong args, |
371 | uint32_t nret, target_ulong rets) | |
372 | { | |
373 | VIOsPAPRBus *bus = spapr->vio_bus; | |
0866aca1 | 374 | BusChild *kid; |
08942ac1 BH |
375 | VIOsPAPRDevice *dev = NULL; |
376 | ||
377 | if (nargs != 0) { | |
a64d325d | 378 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
08942ac1 BH |
379 | return; |
380 | } | |
381 | ||
0866aca1 AL |
382 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
383 | dev = (VIOsPAPRDevice *)kid->child; | |
08942ac1 BH |
384 | spapr_vio_quiesce_one(dev); |
385 | } | |
386 | ||
a64d325d | 387 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
08942ac1 BH |
388 | } |
389 | ||
d601fac4 | 390 | static VIOsPAPRDevice *reg_conflict(VIOsPAPRDevice *dev) |
9fc380d3 | 391 | { |
215e2098 | 392 | VIOsPAPRBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus); |
0866aca1 | 393 | BusChild *kid; |
d601fac4 | 394 | VIOsPAPRDevice *other; |
9fc380d3 ME |
395 | |
396 | /* | |
d601fac4 DG |
397 | * Check for a device other than the given one which is already |
398 | * using the requested address. We have to open code this because | |
399 | * the given dev might already be in the list. | |
9fc380d3 | 400 | */ |
0866aca1 | 401 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
fd506b4f | 402 | other = VIO_SPAPR_DEVICE(kid->child); |
9fc380d3 | 403 | |
d601fac4 DG |
404 | if (other != dev && other->reg == dev->reg) { |
405 | return other; | |
9fc380d3 ME |
406 | } |
407 | } | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
b1c7f725 | 412 | static void spapr_vio_busdev_reset(DeviceState *qdev) |
8e01f355 | 413 | { |
fd506b4f | 414 | VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev); |
b1c7f725 | 415 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
8e01f355 | 416 | |
4dd96f24 DG |
417 | /* Shut down the request queue and TCEs if necessary */ |
418 | spapr_vio_quiesce_one(dev); | |
419 | ||
420 | dev->signal_state = 0; | |
b1c7f725 | 421 | |
ee9a569a | 422 | spapr_vio_set_bypass(dev, false); |
b1c7f725 DG |
423 | if (pc->reset) { |
424 | pc->reset(dev); | |
425 | } | |
8e01f355 DG |
426 | } |
427 | ||
28b07e73 | 428 | static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp) |
4040ab72 | 429 | { |
28e02042 | 430 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
4040ab72 | 431 | VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev; |
3954d33a | 432 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
4040ab72 | 433 | char *id; |
9fc380d3 | 434 | |
d601fac4 DG |
435 | if (dev->reg != -1) { |
436 | /* | |
437 | * Explicitly assigned address, just verify that no-one else | |
438 | * is using it. other mechanism). We have to open code this | |
439 | * rather than using spapr_vio_find_by_reg() because sdev | |
440 | * itself is already in the list. | |
441 | */ | |
442 | VIOsPAPRDevice *other = reg_conflict(dev); | |
443 | ||
444 | if (other) { | |
28b07e73 MA |
445 | error_setg(errp, "%s and %s devices conflict at address %#x", |
446 | object_get_typename(OBJECT(qdev)), | |
447 | object_get_typename(OBJECT(&other->qdev)), | |
448 | dev->reg); | |
449 | return; | |
d601fac4 DG |
450 | } |
451 | } else { | |
452 | /* Need to assign an address */ | |
215e2098 | 453 | VIOsPAPRBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus); |
d601fac4 DG |
454 | |
455 | do { | |
456 | dev->reg = bus->next_reg++; | |
457 | } while (reg_conflict(dev)); | |
9fc380d3 | 458 | } |
4040ab72 | 459 | |
1e34d859 ME |
460 | /* Don't overwrite ids assigned on the command line */ |
461 | if (!dev->qdev.id) { | |
c4eda5b7 | 462 | id = spapr_vio_get_dev_name(DEVICE(dev)); |
1e34d859 | 463 | dev->qdev.id = id; |
4040ab72 DG |
464 | } |
465 | ||
bee763db | 466 | dev->irq = xics_alloc(spapr->icp, 0, dev->irq, false); |
a307d594 | 467 | if (!dev->irq) { |
28b07e73 MA |
468 | error_setg(errp, "can't allocate IRQ"); |
469 | return; | |
416343b1 | 470 | } |
4040ab72 | 471 | |
53724ee5 | 472 | if (pc->rtce_window_size) { |
4290ca49 | 473 | uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg); |
ee9a569a AK |
474 | |
475 | memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root", | |
476 | ram_size); | |
477 | memory_region_init_alias(&dev->mrbypass, OBJECT(dev), | |
478 | "iommu-spapr-bypass", get_system_memory(), | |
479 | 0, ram_size); | |
480 | memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1); | |
481 | address_space_init(&dev->as, &dev->mrroot, qdev->id); | |
482 | ||
523e7b8a | 483 | dev->tcet = spapr_tce_new_table(qdev, liobn, |
1b8eceee | 484 | 0, |
650f33ad | 485 | SPAPR_TCE_PAGE_SHIFT, |
523e7b8a | 486 | pc->rtce_window_size >> |
9bb62a07 | 487 | SPAPR_TCE_PAGE_SHIFT, false); |
ee9a569a AK |
488 | dev->tcet->vdev = dev; |
489 | memory_region_add_subregion_overlap(&dev->mrroot, 0, | |
490 | spapr_tce_get_iommu(dev->tcet), 2); | |
53724ee5 | 491 | } |
ee86dfee | 492 | |
28b07e73 | 493 | pc->realize(dev, errp); |
4040ab72 DG |
494 | } |
495 | ||
28e02042 | 496 | static target_ulong h_vio_signal(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
00dc738d DG |
497 | target_ulong opcode, |
498 | target_ulong *args) | |
499 | { | |
500 | target_ulong reg = args[0]; | |
501 | target_ulong mode = args[1]; | |
502 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
3954d33a | 503 | VIOsPAPRDeviceClass *pc; |
00dc738d DG |
504 | |
505 | if (!dev) { | |
506 | return H_PARAMETER; | |
507 | } | |
508 | ||
3954d33a | 509 | pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
00dc738d | 510 | |
3954d33a | 511 | if (mode & ~pc->signal_mask) { |
00dc738d DG |
512 | return H_PARAMETER; |
513 | } | |
514 | ||
515 | dev->signal_state = mode; | |
516 | ||
517 | return H_SUCCESS; | |
518 | } | |
519 | ||
4040ab72 DG |
520 | VIOsPAPRBus *spapr_vio_bus_init(void) |
521 | { | |
522 | VIOsPAPRBus *bus; | |
523 | BusState *qbus; | |
524 | DeviceState *dev; | |
4040ab72 DG |
525 | |
526 | /* Create bridge device */ | |
215e2098 | 527 | dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE); |
4040ab72 DG |
528 | qdev_init_nofail(dev); |
529 | ||
530 | /* Create bus on bridge device */ | |
0d936928 | 531 | qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); |
215e2098 | 532 | bus = SPAPR_VIO_BUS(qbus); |
1ea1ce8a | 533 | bus->next_reg = 0x71000000; |
4040ab72 | 534 | |
00dc738d DG |
535 | /* hcall-vio */ |
536 | spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); | |
537 | ||
b45d63b6 BH |
538 | /* hcall-crq */ |
539 | spapr_register_hypercall(H_REG_CRQ, h_reg_crq); | |
540 | spapr_register_hypercall(H_FREE_CRQ, h_free_crq); | |
541 | spapr_register_hypercall(H_SEND_CRQ, h_send_crq); | |
542 | spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq); | |
543 | ||
08942ac1 | 544 | /* RTAS calls */ |
3a3b8502 AK |
545 | spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass", |
546 | rtas_set_tce_bypass); | |
547 | spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce); | |
08942ac1 | 548 | |
4040ab72 DG |
549 | return bus; |
550 | } | |
551 | ||
552 | /* Represents sPAPR hcall VIO devices */ | |
553 | ||
554 | static int spapr_vio_bridge_init(SysBusDevice *dev) | |
555 | { | |
556 | /* nothing */ | |
557 | return 0; | |
558 | } | |
559 | ||
999e12bb AL |
560 | static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data) |
561 | { | |
39bffca2 | 562 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
5a06393f | 563 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 564 | |
5a06393f | 565 | dc->fw_name = "vdevice"; |
39bffca2 | 566 | k->init = spapr_vio_bridge_init; |
999e12bb AL |
567 | } |
568 | ||
8c43a6f0 | 569 | static const TypeInfo spapr_vio_bridge_info = { |
215e2098 | 570 | .name = TYPE_SPAPR_VIO_BRIDGE, |
39bffca2 | 571 | .parent = TYPE_SYS_BUS_DEVICE, |
39bffca2 | 572 | .class_init = spapr_vio_bridge_class_init, |
4040ab72 DG |
573 | }; |
574 | ||
b368a7d8 DG |
575 | const VMStateDescription vmstate_spapr_vio = { |
576 | .name = "spapr_vio", | |
577 | .version_id = 1, | |
578 | .minimum_version_id = 1, | |
3aff6c2f | 579 | .fields = (VMStateField[]) { |
b368a7d8 DG |
580 | /* Sanity check */ |
581 | VMSTATE_UINT32_EQUAL(reg, VIOsPAPRDevice), | |
582 | VMSTATE_UINT32_EQUAL(irq, VIOsPAPRDevice), | |
583 | ||
584 | /* General VIO device state */ | |
585 | VMSTATE_UINTTL(signal_state, VIOsPAPRDevice), | |
586 | VMSTATE_UINT64(crq.qladdr, VIOsPAPRDevice), | |
587 | VMSTATE_UINT32(crq.qsize, VIOsPAPRDevice), | |
588 | VMSTATE_UINT32(crq.qnext, VIOsPAPRDevice), | |
589 | ||
590 | VMSTATE_END_OF_LIST() | |
591 | }, | |
592 | }; | |
593 | ||
39bffca2 AL |
594 | static void vio_spapr_device_class_init(ObjectClass *klass, void *data) |
595 | { | |
596 | DeviceClass *k = DEVICE_CLASS(klass); | |
28b07e73 | 597 | k->realize = spapr_vio_busdev_realize; |
b1c7f725 | 598 | k->reset = spapr_vio_busdev_reset; |
0d936928 | 599 | k->bus_type = TYPE_SPAPR_VIO_BUS; |
bce54474 | 600 | k->props = spapr_vio_props; |
39bffca2 AL |
601 | } |
602 | ||
8c43a6f0 | 603 | static const TypeInfo spapr_vio_type_info = { |
3954d33a AL |
604 | .name = TYPE_VIO_SPAPR_DEVICE, |
605 | .parent = TYPE_DEVICE, | |
606 | .instance_size = sizeof(VIOsPAPRDevice), | |
607 | .abstract = true, | |
608 | .class_size = sizeof(VIOsPAPRDeviceClass), | |
39bffca2 | 609 | .class_init = vio_spapr_device_class_init, |
3954d33a AL |
610 | }; |
611 | ||
83f7d43a | 612 | static void spapr_vio_register_types(void) |
4040ab72 | 613 | { |
0d936928 | 614 | type_register_static(&spapr_vio_bus_info); |
39bffca2 | 615 | type_register_static(&spapr_vio_bridge_info); |
3954d33a | 616 | type_register_static(&spapr_vio_type_info); |
4040ab72 DG |
617 | } |
618 | ||
83f7d43a | 619 | type_init(spapr_vio_register_types) |
4040ab72 | 620 | |
05c19438 DG |
621 | static int compare_reg(const void *p1, const void *p2) |
622 | { | |
623 | VIOsPAPRDevice const *dev1, *dev2; | |
624 | ||
625 | dev1 = (VIOsPAPRDevice *)*(DeviceState **)p1; | |
626 | dev2 = (VIOsPAPRDevice *)*(DeviceState **)p2; | |
627 | ||
628 | if (dev1->reg < dev2->reg) { | |
629 | return -1; | |
630 | } | |
631 | if (dev1->reg == dev2->reg) { | |
632 | return 0; | |
633 | } | |
634 | ||
635 | /* dev1->reg > dev2->reg */ | |
636 | return 1; | |
637 | } | |
638 | ||
4040ab72 DG |
639 | int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt) |
640 | { | |
05c19438 | 641 | DeviceState *qdev, **qdevs; |
0866aca1 | 642 | BusChild *kid; |
05c19438 | 643 | int i, num, ret = 0; |
4040ab72 | 644 | |
05c19438 DG |
645 | /* Count qdevs on the bus list */ |
646 | num = 0; | |
0866aca1 | 647 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
05c19438 DG |
648 | num++; |
649 | } | |
650 | ||
651 | /* Copy out into an array of pointers */ | |
652 | qdevs = g_malloc(sizeof(qdev) * num); | |
653 | num = 0; | |
0866aca1 AL |
654 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
655 | qdevs[num++] = kid->child; | |
05c19438 DG |
656 | } |
657 | ||
658 | /* Sort the array */ | |
659 | qsort(qdevs, num, sizeof(qdev), compare_reg); | |
660 | ||
661 | /* Hack alert. Give the devices to libfdt in reverse order, we happen | |
662 | * to know that will mean they are in forward order in the tree. */ | |
663 | for (i = num - 1; i >= 0; i--) { | |
664 | VIOsPAPRDevice *dev = (VIOsPAPRDevice *)(qdevs[i]); | |
4040ab72 DG |
665 | |
666 | ret = vio_make_devnode(dev, fdt); | |
667 | ||
668 | if (ret < 0) { | |
05c19438 | 669 | goto out; |
4040ab72 DG |
670 | } |
671 | } | |
672 | ||
05c19438 DG |
673 | ret = 0; |
674 | out: | |
5f1d1fc5 | 675 | g_free(qdevs); |
05c19438 DG |
676 | |
677 | return ret; | |
4040ab72 | 678 | } |
68f3a94c DG |
679 | |
680 | int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus) | |
681 | { | |
682 | VIOsPAPRDevice *dev; | |
683 | char *name, *path; | |
684 | int ret, offset; | |
685 | ||
686 | dev = spapr_vty_get_default(bus); | |
687 | if (!dev) | |
688 | return 0; | |
689 | ||
690 | offset = fdt_path_offset(fdt, "/chosen"); | |
691 | if (offset < 0) { | |
692 | return offset; | |
693 | } | |
694 | ||
c4eda5b7 | 695 | name = spapr_vio_get_dev_name(DEVICE(dev)); |
4ecf8aa5 | 696 | path = g_strdup_printf("/vdevice/%s", name); |
68f3a94c DG |
697 | |
698 | ret = fdt_setprop_string(fdt, offset, "linux,stdout-path", path); | |
4ecf8aa5 SW |
699 | |
700 | g_free(name); | |
701 | g_free(path); | |
68f3a94c DG |
702 | |
703 | return ret; | |
704 | } |