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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <[email protected]> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
24 | #include <sys/types.h> | |
25 | #include <sys/ioctl.h> | |
26 | #include <sys/mman.h> | |
27 | ||
28 | #include <linux/kvm.h> | |
29 | #include <asm/ptrace.h> | |
30 | ||
31 | #include "qemu-common.h" | |
1de7afc9 | 32 | #include "qemu/timer.h" |
9c17d615 PB |
33 | #include "sysemu/sysemu.h" |
34 | #include "sysemu/kvm.h" | |
0e60a699 | 35 | #include "cpu.h" |
9c17d615 | 36 | #include "sysemu/device_tree.h" |
0e60a699 AG |
37 | |
38 | /* #define DEBUG_KVM */ | |
39 | ||
40 | #ifdef DEBUG_KVM | |
41 | #define dprintf(fmt, ...) \ | |
42 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) | |
43 | #else | |
44 | #define dprintf(fmt, ...) \ | |
45 | do { } while (0) | |
46 | #endif | |
47 | ||
48 | #define IPA0_DIAG 0x8300 | |
49 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
50 | #define IPA0_B2 0xb200 |
51 | #define IPA0_B9 0xb900 | |
52 | #define IPA0_EB 0xeb00 | |
0e60a699 AG |
53 | |
54 | #define PRIV_SCLP_CALL 0x20 | |
09b99878 CH |
55 | #define PRIV_CSCH 0x30 |
56 | #define PRIV_HSCH 0x31 | |
57 | #define PRIV_MSCH 0x32 | |
58 | #define PRIV_SSCH 0x33 | |
59 | #define PRIV_STSCH 0x34 | |
60 | #define PRIV_TSCH 0x35 | |
61 | #define PRIV_TPI 0x36 | |
62 | #define PRIV_SAL 0x37 | |
63 | #define PRIV_RSCH 0x38 | |
64 | #define PRIV_STCRW 0x39 | |
65 | #define PRIV_STCPS 0x3a | |
66 | #define PRIV_RCHP 0x3b | |
67 | #define PRIV_SCHM 0x3c | |
68 | #define PRIV_CHSC 0x5f | |
69 | #define PRIV_SIGA 0x74 | |
70 | #define PRIV_XSCH 0x76 | |
71 | #define PRIV_SQBS 0x8a | |
72 | #define PRIV_EQBS 0x9c | |
0e60a699 AG |
73 | #define DIAG_KVM_HYPERCALL 0x500 |
74 | #define DIAG_KVM_BREAKPOINT 0x501 | |
75 | ||
0e60a699 AG |
76 | #define ICPT_INSTRUCTION 0x04 |
77 | #define ICPT_WAITPSW 0x1c | |
78 | #define ICPT_SOFT_INTERCEPT 0x24 | |
79 | #define ICPT_CPU_STOP 0x28 | |
80 | #define ICPT_IO 0x40 | |
81 | ||
82 | #define SIGP_RESTART 0x06 | |
83 | #define SIGP_INITIAL_CPU_RESET 0x0b | |
84 | #define SIGP_STORE_STATUS_ADDR 0x0e | |
85 | #define SIGP_SET_ARCH 0x12 | |
86 | ||
94a8d39a JK |
87 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
88 | KVM_CAP_LAST_INFO | |
89 | }; | |
90 | ||
5b08b344 CB |
91 | static int cap_sync_regs; |
92 | ||
cad1e282 | 93 | int kvm_arch_init(KVMState *s) |
0e60a699 | 94 | { |
5b08b344 | 95 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
0e60a699 AG |
96 | return 0; |
97 | } | |
98 | ||
b164e48e EH |
99 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
100 | { | |
101 | return cpu->cpu_index; | |
102 | } | |
103 | ||
20d695a9 | 104 | int kvm_arch_init_vcpu(CPUState *cpu) |
0e60a699 AG |
105 | { |
106 | int ret = 0; | |
107 | ||
1bc22652 | 108 | if (kvm_vcpu_ioctl(cpu, KVM_S390_INITIAL_RESET, NULL) < 0) { |
0e60a699 AG |
109 | perror("cannot init reset vcpu"); |
110 | } | |
111 | ||
112 | return ret; | |
113 | } | |
114 | ||
20d695a9 | 115 | void kvm_arch_reset_vcpu(CPUState *cpu) |
0e60a699 | 116 | { |
419831d7 AG |
117 | /* The initial reset call is needed here to reset in-kernel |
118 | * vcpu data that we can't access directly from QEMU | |
119 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
120 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
121 | * code (kvm-all) */ | |
70bada03 JF |
122 | if (kvm_vcpu_ioctl(cpu, KVM_S390_INITIAL_RESET, NULL)) { |
123 | perror("Can't reset vcpu\n"); | |
124 | } | |
0e60a699 AG |
125 | } |
126 | ||
20d695a9 | 127 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 128 | { |
20d695a9 AF |
129 | S390CPU *cpu = S390_CPU(cs); |
130 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 131 | struct kvm_sregs sregs; |
0e60a699 AG |
132 | struct kvm_regs regs; |
133 | int ret; | |
134 | int i; | |
135 | ||
5b08b344 | 136 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
137 | cs->kvm_run->psw_addr = env->psw.addr; |
138 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 139 | |
f7575c96 | 140 | if (cap_sync_regs && cs->kvm_run->kvm_valid_regs & KVM_SYNC_GPRS) { |
5b08b344 | 141 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
142 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
143 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
144 | } |
145 | } else { | |
146 | for (i = 0; i < 16; i++) { | |
147 | regs.gprs[i] = env->regs[i]; | |
148 | } | |
1bc22652 | 149 | ret = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
5b08b344 CB |
150 | if (ret < 0) { |
151 | return ret; | |
152 | } | |
0e60a699 AG |
153 | } |
154 | ||
5b08b344 CB |
155 | /* Do we need to save more than that? */ |
156 | if (level == KVM_PUT_RUNTIME_STATE) { | |
157 | return 0; | |
0e60a699 AG |
158 | } |
159 | ||
5b08b344 | 160 | if (cap_sync_regs && |
f7575c96 AF |
161 | cs->kvm_run->kvm_valid_regs & KVM_SYNC_ACRS && |
162 | cs->kvm_run->kvm_valid_regs & KVM_SYNC_CRS) { | |
5b08b344 | 163 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
164 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
165 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 166 | } |
f7575c96 AF |
167 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
168 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
169 | } else { |
170 | for (i = 0; i < 16; i++) { | |
171 | sregs.acrs[i] = env->aregs[i]; | |
172 | sregs.crs[i] = env->cregs[i]; | |
173 | } | |
1bc22652 | 174 | ret = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
5b08b344 CB |
175 | if (ret < 0) { |
176 | return ret; | |
177 | } | |
178 | } | |
0e60a699 | 179 | |
5b08b344 | 180 | /* Finally the prefix */ |
f7575c96 AF |
181 | if (cap_sync_regs && cs->kvm_run->kvm_valid_regs & KVM_SYNC_PREFIX) { |
182 | cs->kvm_run->s.regs.prefix = env->psa; | |
183 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
184 | } else { |
185 | /* prefix is only supported via sync regs */ | |
186 | } | |
187 | return 0; | |
0e60a699 AG |
188 | } |
189 | ||
20d695a9 | 190 | int kvm_arch_get_registers(CPUState *cs) |
0e60a699 | 191 | { |
20d695a9 AF |
192 | S390CPU *cpu = S390_CPU(cs); |
193 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 194 | struct kvm_sregs sregs; |
0e60a699 | 195 | struct kvm_regs regs; |
5b08b344 | 196 | int ret; |
0e60a699 AG |
197 | int i; |
198 | ||
5b08b344 | 199 | /* get the PSW */ |
f7575c96 AF |
200 | env->psw.addr = cs->kvm_run->psw_addr; |
201 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
202 | |
203 | /* the GPRS */ | |
f7575c96 | 204 | if (cap_sync_regs && cs->kvm_run->kvm_valid_regs & KVM_SYNC_GPRS) { |
5b08b344 | 205 | for (i = 0; i < 16; i++) { |
f7575c96 | 206 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
207 | } |
208 | } else { | |
1bc22652 | 209 | ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
5b08b344 CB |
210 | if (ret < 0) { |
211 | return ret; | |
212 | } | |
213 | for (i = 0; i < 16; i++) { | |
214 | env->regs[i] = regs.gprs[i]; | |
215 | } | |
0e60a699 AG |
216 | } |
217 | ||
5b08b344 CB |
218 | /* The ACRS and CRS */ |
219 | if (cap_sync_regs && | |
f7575c96 AF |
220 | cs->kvm_run->kvm_valid_regs & KVM_SYNC_ACRS && |
221 | cs->kvm_run->kvm_valid_regs & KVM_SYNC_CRS) { | |
5b08b344 | 222 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
223 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
224 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
225 | } |
226 | } else { | |
1bc22652 | 227 | ret = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
5b08b344 CB |
228 | if (ret < 0) { |
229 | return ret; | |
230 | } | |
231 | for (i = 0; i < 16; i++) { | |
232 | env->aregs[i] = sregs.acrs[i]; | |
233 | env->cregs[i] = sregs.crs[i]; | |
234 | } | |
0e60a699 AG |
235 | } |
236 | ||
5b08b344 | 237 | /* Finally the prefix */ |
f7575c96 AF |
238 | if (cap_sync_regs && cs->kvm_run->kvm_valid_regs & KVM_SYNC_PREFIX) { |
239 | env->psa = cs->kvm_run->s.regs.prefix; | |
5b08b344 CB |
240 | } else { |
241 | /* no prefix without sync regs */ | |
242 | } | |
0e60a699 AG |
243 | |
244 | return 0; | |
245 | } | |
246 | ||
fdec9918 CB |
247 | /* |
248 | * Legacy layout for s390: | |
249 | * Older S390 KVM requires the topmost vma of the RAM to be | |
250 | * smaller than an system defined value, which is at least 256GB. | |
251 | * Larger systems have larger values. We put the guest between | |
252 | * the end of data segment (system break) and this value. We | |
253 | * use 32GB as a base to have enough room for the system break | |
254 | * to grow. We also have to use MAP parameters that avoid | |
255 | * read-only mapping of guest pages. | |
256 | */ | |
257 | static void *legacy_s390_alloc(ram_addr_t size) | |
258 | { | |
259 | void *mem; | |
260 | ||
261 | mem = mmap((void *) 0x800000000ULL, size, | |
262 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
263 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
264 | if (mem == MAP_FAILED) { | |
265 | fprintf(stderr, "Allocating RAM failed\n"); | |
266 | abort(); | |
267 | } | |
268 | return mem; | |
269 | } | |
270 | ||
271 | void *kvm_arch_vmalloc(ram_addr_t size) | |
272 | { | |
273 | /* Can we use the standard allocation ? */ | |
274 | if (kvm_check_extension(kvm_state, KVM_CAP_S390_GMAP) && | |
275 | kvm_check_extension(kvm_state, KVM_CAP_S390_COW)) { | |
276 | return NULL; | |
277 | } else { | |
278 | return legacy_s390_alloc(size); | |
279 | } | |
280 | } | |
281 | ||
20d695a9 | 282 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 283 | { |
20d695a9 AF |
284 | S390CPU *cpu = S390_CPU(cs); |
285 | CPUS390XState *env = &cpu->env; | |
0e60a699 AG |
286 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; |
287 | ||
288 | if (cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 4, 0) || | |
289 | cpu_memory_rw_debug(env, bp->pc, (uint8_t *)diag_501, 4, 1)) { | |
290 | return -EINVAL; | |
291 | } | |
292 | return 0; | |
293 | } | |
294 | ||
20d695a9 | 295 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 296 | { |
20d695a9 AF |
297 | S390CPU *cpu = S390_CPU(cs); |
298 | CPUS390XState *env = &cpu->env; | |
0e60a699 AG |
299 | uint8_t t[4]; |
300 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
301 | ||
302 | if (cpu_memory_rw_debug(env, bp->pc, t, 4, 0)) { | |
303 | return -EINVAL; | |
304 | } else if (memcmp(t, diag_501, 4)) { | |
305 | return -EINVAL; | |
306 | } else if (cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 1)) { | |
307 | return -EINVAL; | |
308 | } | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
20d695a9 | 313 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 314 | { |
0e60a699 AG |
315 | } |
316 | ||
20d695a9 | 317 | void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 318 | { |
0e60a699 AG |
319 | } |
320 | ||
20d695a9 | 321 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 322 | { |
20d695a9 AF |
323 | S390CPU *cpu = S390_CPU(cs); |
324 | return cpu->env.halted; | |
0af691d7 MT |
325 | } |
326 | ||
1bc22652 | 327 | void kvm_s390_interrupt_internal(S390CPU *cpu, int type, uint32_t parm, |
bcec36ea | 328 | uint64_t parm64, int vm) |
0e60a699 | 329 | { |
1bc22652 | 330 | CPUState *cs = CPU(cpu); |
0e60a699 AG |
331 | struct kvm_s390_interrupt kvmint; |
332 | int r; | |
333 | ||
a60f24b5 | 334 | if (!cs->kvm_state) { |
0e60a699 AG |
335 | return; |
336 | } | |
337 | ||
0e60a699 AG |
338 | kvmint.type = type; |
339 | kvmint.parm = parm; | |
340 | kvmint.parm64 = parm64; | |
341 | ||
342 | if (vm) { | |
a60f24b5 | 343 | r = kvm_vm_ioctl(cs->kvm_state, KVM_S390_INTERRUPT, &kvmint); |
0e60a699 | 344 | } else { |
1bc22652 | 345 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); |
0e60a699 AG |
346 | } |
347 | ||
348 | if (r < 0) { | |
349 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
350 | exit(1); | |
351 | } | |
352 | } | |
353 | ||
1bc22652 | 354 | void kvm_s390_virtio_irq(S390CPU *cpu, int config_change, uint64_t token) |
0e60a699 | 355 | { |
1bc22652 | 356 | kvm_s390_interrupt_internal(cpu, KVM_S390_INT_VIRTIO, config_change, |
0e60a699 AG |
357 | token, 1); |
358 | } | |
359 | ||
1bc22652 | 360 | void kvm_s390_interrupt(S390CPU *cpu, int type, uint32_t code) |
0e60a699 | 361 | { |
1bc22652 | 362 | kvm_s390_interrupt_internal(cpu, type, code, 0, 0); |
0e60a699 AG |
363 | } |
364 | ||
1bc22652 | 365 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 366 | { |
1bc22652 | 367 | kvm_s390_interrupt(cpu, KVM_S390_PROGRAM_INT, code); |
0e60a699 AG |
368 | } |
369 | ||
f7575c96 | 370 | static inline void setcc(S390CPU *cpu, uint64_t cc) |
0e60a699 | 371 | { |
f7575c96 AF |
372 | CPUS390XState *env = &cpu->env; |
373 | CPUState *cs = CPU(cpu); | |
374 | ||
375 | cs->kvm_run->psw_mask &= ~(3ull << 44); | |
376 | cs->kvm_run->psw_mask |= (cc & 3) << 44; | |
0e60a699 AG |
377 | |
378 | env->psw.mask &= ~(3ul << 44); | |
379 | env->psw.mask |= (cc & 3) << 44; | |
380 | } | |
381 | ||
1bc22652 | 382 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 383 | uint16_t ipbh0) |
0e60a699 | 384 | { |
1bc22652 | 385 | CPUS390XState *env = &cpu->env; |
0e60a699 AG |
386 | uint32_t sccb; |
387 | uint64_t code; | |
388 | int r = 0; | |
389 | ||
390 | cpu_synchronize_state(env); | |
391 | sccb = env->regs[ipbh0 & 0xf]; | |
392 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
393 | ||
f6c98f92 | 394 | r = sclp_service_call(sccb, code); |
9abf567d | 395 | if (r < 0) { |
1bc22652 | 396 | enter_pgmcheck(cpu, -r); |
0e60a699 | 397 | } |
f7575c96 | 398 | setcc(cpu, r); |
81f7c56c | 399 | |
0e60a699 AG |
400 | return 0; |
401 | } | |
402 | ||
09b99878 CH |
403 | static int kvm_handle_css_inst(S390CPU *cpu, struct kvm_run *run, |
404 | uint8_t ipa0, uint8_t ipa1, uint8_t ipb) | |
405 | { | |
406 | int r = 0; | |
407 | int no_cc = 0; | |
408 | CPUS390XState *env = &cpu->env; | |
409 | ||
410 | if (ipa0 != 0xb2) { | |
411 | /* Not handled for now. */ | |
412 | return -1; | |
413 | } | |
414 | cpu_synchronize_state(env); | |
415 | switch (ipa1) { | |
416 | case PRIV_XSCH: | |
417 | r = ioinst_handle_xsch(env, env->regs[1]); | |
418 | break; | |
419 | case PRIV_CSCH: | |
420 | r = ioinst_handle_csch(env, env->regs[1]); | |
421 | break; | |
422 | case PRIV_HSCH: | |
423 | r = ioinst_handle_hsch(env, env->regs[1]); | |
424 | break; | |
425 | case PRIV_MSCH: | |
426 | r = ioinst_handle_msch(env, env->regs[1], run->s390_sieic.ipb); | |
427 | break; | |
428 | case PRIV_SSCH: | |
429 | r = ioinst_handle_ssch(env, env->regs[1], run->s390_sieic.ipb); | |
430 | break; | |
431 | case PRIV_STCRW: | |
432 | r = ioinst_handle_stcrw(env, run->s390_sieic.ipb); | |
433 | break; | |
434 | case PRIV_STSCH: | |
435 | r = ioinst_handle_stsch(env, env->regs[1], run->s390_sieic.ipb); | |
436 | break; | |
437 | case PRIV_TSCH: | |
438 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ | |
439 | fprintf(stderr, "Spurious tsch intercept\n"); | |
440 | break; | |
441 | case PRIV_CHSC: | |
442 | r = ioinst_handle_chsc(env, run->s390_sieic.ipb); | |
443 | break; | |
444 | case PRIV_TPI: | |
445 | /* This should have been handled by kvm already. */ | |
446 | fprintf(stderr, "Spurious tpi intercept\n"); | |
447 | break; | |
448 | case PRIV_SCHM: | |
449 | no_cc = 1; | |
450 | r = ioinst_handle_schm(env, env->regs[1], env->regs[2], | |
451 | run->s390_sieic.ipb); | |
452 | break; | |
453 | case PRIV_RSCH: | |
454 | r = ioinst_handle_rsch(env, env->regs[1]); | |
455 | break; | |
456 | case PRIV_RCHP: | |
457 | r = ioinst_handle_rchp(env, env->regs[1]); | |
458 | break; | |
459 | case PRIV_STCPS: | |
460 | /* We do not provide this instruction, it is suppressed. */ | |
461 | no_cc = 1; | |
462 | r = 0; | |
463 | break; | |
464 | case PRIV_SAL: | |
465 | no_cc = 1; | |
466 | r = ioinst_handle_sal(env, env->regs[1]); | |
467 | break; | |
468 | default: | |
469 | r = -1; | |
470 | break; | |
471 | } | |
472 | ||
473 | if (r >= 0) { | |
474 | if (!no_cc) { | |
475 | setcc(cpu, r); | |
476 | } | |
477 | r = 0; | |
478 | } else if (r < -1) { | |
479 | r = 0; | |
480 | } | |
481 | return r; | |
482 | } | |
483 | ||
484 | static int is_ioinst(uint8_t ipa0, uint8_t ipa1, uint8_t ipb) | |
485 | { | |
486 | int ret = 0; | |
487 | uint16_t ipa = (ipa0 << 8) | ipa1; | |
488 | ||
489 | switch (ipa) { | |
490 | case IPA0_B2 | PRIV_CSCH: | |
491 | case IPA0_B2 | PRIV_HSCH: | |
492 | case IPA0_B2 | PRIV_MSCH: | |
493 | case IPA0_B2 | PRIV_SSCH: | |
494 | case IPA0_B2 | PRIV_STSCH: | |
495 | case IPA0_B2 | PRIV_TPI: | |
496 | case IPA0_B2 | PRIV_SAL: | |
497 | case IPA0_B2 | PRIV_RSCH: | |
498 | case IPA0_B2 | PRIV_STCRW: | |
499 | case IPA0_B2 | PRIV_STCPS: | |
500 | case IPA0_B2 | PRIV_RCHP: | |
501 | case IPA0_B2 | PRIV_SCHM: | |
502 | case IPA0_B2 | PRIV_CHSC: | |
503 | case IPA0_B2 | PRIV_SIGA: | |
504 | case IPA0_B2 | PRIV_XSCH: | |
505 | case IPA0_B9 | PRIV_EQBS: | |
506 | case IPA0_EB | PRIV_SQBS: | |
507 | ret = 1; | |
508 | break; | |
509 | } | |
510 | ||
511 | return ret; | |
512 | } | |
513 | ||
514 | static int handle_priv(S390CPU *cpu, struct kvm_run *run, | |
515 | uint8_t ipa0, uint8_t ipa1) | |
0e60a699 AG |
516 | { |
517 | int r = 0; | |
518 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
09b99878 | 519 | uint8_t ipb = run->s390_sieic.ipb & 0xff; |
0e60a699 AG |
520 | |
521 | dprintf("KVM: PRIV: %d\n", ipa1); | |
522 | switch (ipa1) { | |
523 | case PRIV_SCLP_CALL: | |
1bc22652 | 524 | r = kvm_sclp_service_call(cpu, run, ipbh0); |
0e60a699 AG |
525 | break; |
526 | default: | |
09b99878 CH |
527 | if (is_ioinst(ipa0, ipa1, ipb)) { |
528 | r = kvm_handle_css_inst(cpu, run, ipa0, ipa1, ipb); | |
529 | if (r == -1) { | |
530 | setcc(cpu, 3); | |
531 | r = 0; | |
532 | } | |
533 | } else { | |
534 | dprintf("KVM: unknown PRIV: 0x%x\n", ipa1); | |
535 | r = -1; | |
536 | } | |
0e60a699 AG |
537 | break; |
538 | } | |
539 | ||
540 | return r; | |
541 | } | |
542 | ||
a4e3ad19 | 543 | static int handle_hypercall(CPUS390XState *env, struct kvm_run *run) |
0e60a699 | 544 | { |
0e60a699 | 545 | cpu_synchronize_state(env); |
28e942f8 | 546 | env->regs[2] = s390_virtio_hypercall(env); |
0e60a699 | 547 | |
bcec36ea | 548 | return 0; |
0e60a699 AG |
549 | } |
550 | ||
a4e3ad19 | 551 | static int handle_diag(CPUS390XState *env, struct kvm_run *run, int ipb_code) |
0e60a699 AG |
552 | { |
553 | int r = 0; | |
554 | ||
555 | switch (ipb_code) { | |
556 | case DIAG_KVM_HYPERCALL: | |
557 | r = handle_hypercall(env, run); | |
558 | break; | |
559 | case DIAG_KVM_BREAKPOINT: | |
560 | sleep(10); | |
561 | break; | |
562 | default: | |
563 | dprintf("KVM: unknown DIAG: 0x%x\n", ipb_code); | |
564 | r = -1; | |
565 | break; | |
566 | } | |
567 | ||
568 | return r; | |
569 | } | |
570 | ||
3edb8f92 | 571 | static int s390_cpu_restart(S390CPU *cpu) |
0e60a699 | 572 | { |
1bc22652 | 573 | kvm_s390_interrupt(cpu, KVM_S390_RESTART, 0); |
49e15878 | 574 | s390_add_running_cpu(cpu); |
c08d7424 | 575 | qemu_cpu_kick(CPU(cpu)); |
49e15878 | 576 | dprintf("DONE: SIGP cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
577 | return 0; |
578 | } | |
579 | ||
a4e3ad19 | 580 | static int s390_store_status(CPUS390XState *env, uint32_t parameter) |
0e60a699 AG |
581 | { |
582 | /* XXX */ | |
583 | fprintf(stderr, "XXX SIGP store status\n"); | |
584 | return -1; | |
585 | } | |
586 | ||
1bc22652 | 587 | static int s390_cpu_initial_reset(S390CPU *cpu) |
0e60a699 | 588 | { |
1bc22652 | 589 | CPUS390XState *env = &cpu->env; |
d5900813 AG |
590 | int i; |
591 | ||
49e15878 | 592 | s390_del_running_cpu(cpu); |
1bc22652 | 593 | if (kvm_vcpu_ioctl(CPU(cpu), KVM_S390_INITIAL_RESET, NULL) < 0) { |
d5900813 AG |
594 | perror("cannot init reset vcpu"); |
595 | } | |
596 | ||
597 | /* Manually zero out all registers */ | |
598 | cpu_synchronize_state(env); | |
599 | for (i = 0; i < 16; i++) { | |
600 | env->regs[i] = 0; | |
601 | } | |
602 | ||
603 | dprintf("DONE: SIGP initial reset: %p\n", env); | |
604 | return 0; | |
0e60a699 AG |
605 | } |
606 | ||
f7575c96 | 607 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 608 | { |
f7575c96 | 609 | CPUS390XState *env = &cpu->env; |
0e60a699 AG |
610 | uint8_t order_code; |
611 | uint32_t parameter; | |
612 | uint16_t cpu_addr; | |
613 | uint8_t t; | |
614 | int r = -1; | |
45fa769b | 615 | S390CPU *target_cpu; |
a4e3ad19 | 616 | CPUS390XState *target_env; |
0e60a699 AG |
617 | |
618 | cpu_synchronize_state(env); | |
619 | ||
620 | /* get order code */ | |
621 | order_code = run->s390_sieic.ipb >> 28; | |
622 | if (order_code > 0) { | |
623 | order_code = env->regs[order_code]; | |
624 | } | |
625 | order_code += (run->s390_sieic.ipb & 0x0fff0000) >> 16; | |
626 | ||
627 | /* get parameters */ | |
628 | t = (ipa1 & 0xf0) >> 4; | |
629 | if (!(t % 2)) { | |
630 | t++; | |
631 | } | |
632 | ||
633 | parameter = env->regs[t] & 0x7ffffe00; | |
634 | cpu_addr = env->regs[ipa1 & 0x0f]; | |
635 | ||
45fa769b AF |
636 | target_cpu = s390_cpu_addr2state(cpu_addr); |
637 | if (target_cpu == NULL) { | |
0e60a699 AG |
638 | goto out; |
639 | } | |
45fa769b | 640 | target_env = &target_cpu->env; |
0e60a699 AG |
641 | |
642 | switch (order_code) { | |
643 | case SIGP_RESTART: | |
3edb8f92 | 644 | r = s390_cpu_restart(target_cpu); |
0e60a699 AG |
645 | break; |
646 | case SIGP_STORE_STATUS_ADDR: | |
647 | r = s390_store_status(target_env, parameter); | |
648 | break; | |
649 | case SIGP_SET_ARCH: | |
650 | /* make the caller panic */ | |
651 | return -1; | |
652 | case SIGP_INITIAL_CPU_RESET: | |
1bc22652 | 653 | r = s390_cpu_initial_reset(target_cpu); |
0e60a699 AG |
654 | break; |
655 | default: | |
a74cdab4 | 656 | fprintf(stderr, "KVM: unknown SIGP: 0x%x\n", order_code); |
0e60a699 AG |
657 | break; |
658 | } | |
659 | ||
660 | out: | |
f7575c96 | 661 | setcc(cpu, r ? 3 : 0); |
0e60a699 AG |
662 | return 0; |
663 | } | |
664 | ||
1bc22652 | 665 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 666 | { |
1bc22652 | 667 | CPUS390XState *env = &cpu->env; |
0e60a699 AG |
668 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); |
669 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
670 | int ipb_code = (run->s390_sieic.ipb & 0x0fff0000) >> 16; | |
d7963c43 | 671 | int r = -1; |
0e60a699 AG |
672 | |
673 | dprintf("handle_instruction 0x%x 0x%x\n", run->s390_sieic.ipa, run->s390_sieic.ipb); | |
674 | switch (ipa0) { | |
09b99878 CH |
675 | case IPA0_B2: |
676 | case IPA0_B9: | |
677 | case IPA0_EB: | |
678 | r = handle_priv(cpu, run, ipa0 >> 8, ipa1); | |
679 | break; | |
680 | case IPA0_DIAG: | |
681 | r = handle_diag(env, run, ipb_code); | |
682 | break; | |
683 | case IPA0_SIGP: | |
684 | r = handle_sigp(cpu, run, ipa1); | |
685 | break; | |
0e60a699 AG |
686 | } |
687 | ||
688 | if (r < 0) { | |
1bc22652 | 689 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 690 | } |
359507ee | 691 | return 0; |
0e60a699 AG |
692 | } |
693 | ||
f7575c96 | 694 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
695 | { |
696 | /* signal quiesce */ | |
f7575c96 | 697 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
698 | } |
699 | ||
1bc22652 | 700 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 701 | { |
f7575c96 AF |
702 | CPUState *cs = CPU(cpu); |
703 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
704 | int icpt_code = run->s390_sieic.icptcode; |
705 | int r = 0; | |
706 | ||
81f7c56c | 707 | dprintf("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 708 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
709 | switch (icpt_code) { |
710 | case ICPT_INSTRUCTION: | |
1bc22652 | 711 | r = handle_instruction(cpu, run); |
0e60a699 AG |
712 | break; |
713 | case ICPT_WAITPSW: | |
49e15878 | 714 | if (s390_del_running_cpu(cpu) == 0 && |
f7575c96 | 715 | is_special_wait_psw(cs)) { |
eca3ed03 CB |
716 | qemu_system_shutdown_request(); |
717 | } | |
718 | r = EXCP_HALTED; | |
719 | break; | |
854e42f3 | 720 | case ICPT_CPU_STOP: |
49e15878 | 721 | if (s390_del_running_cpu(cpu) == 0) { |
854e42f3 CB |
722 | qemu_system_shutdown_request(); |
723 | } | |
724 | r = EXCP_HALTED; | |
0e60a699 AG |
725 | break; |
726 | case ICPT_SOFT_INTERCEPT: | |
727 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
728 | exit(1); | |
729 | break; | |
0e60a699 AG |
730 | case ICPT_IO: |
731 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
732 | exit(1); | |
733 | break; | |
734 | default: | |
735 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
736 | exit(1); | |
737 | break; | |
738 | } | |
739 | ||
740 | return r; | |
741 | } | |
742 | ||
09b99878 CH |
743 | static int handle_tsch(S390CPU *cpu) |
744 | { | |
745 | CPUS390XState *env = &cpu->env; | |
746 | CPUState *cs = CPU(cpu); | |
747 | struct kvm_run *run = cs->kvm_run; | |
748 | int ret; | |
749 | ||
750 | cpu_synchronize_state(env); | |
751 | ret = ioinst_handle_tsch(env, env->regs[1], run->s390_tsch.ipb); | |
752 | if (ret >= 0) { | |
753 | /* Success; set condition code. */ | |
754 | setcc(cpu, ret); | |
755 | ret = 0; | |
756 | } else if (ret < -1) { | |
757 | /* | |
758 | * Failure. | |
759 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
760 | */ | |
761 | if (run->s390_tsch.dequeued) { | |
762 | uint16_t subchannel_id = run->s390_tsch.subchannel_id; | |
763 | uint16_t subchannel_nr = run->s390_tsch.subchannel_nr; | |
764 | uint32_t io_int_parm = run->s390_tsch.io_int_parm; | |
765 | uint32_t io_int_word = run->s390_tsch.io_int_word; | |
766 | uint32_t type = ((subchannel_id & 0xff00) << 24) | | |
767 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); | |
768 | ||
769 | kvm_s390_interrupt_internal(cpu, type, | |
770 | ((uint32_t)subchannel_id << 16) | |
771 | | subchannel_nr, | |
772 | ((uint64_t)io_int_parm << 32) | |
773 | | io_int_word, 1); | |
774 | } | |
775 | ret = 0; | |
776 | } | |
777 | return ret; | |
778 | } | |
779 | ||
20d695a9 | 780 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 781 | { |
20d695a9 | 782 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
783 | int ret = 0; |
784 | ||
785 | switch (run->exit_reason) { | |
786 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 787 | ret = handle_intercept(cpu); |
0e60a699 AG |
788 | break; |
789 | case KVM_EXIT_S390_RESET: | |
add142e0 | 790 | qemu_system_reset_request(); |
0e60a699 | 791 | break; |
09b99878 CH |
792 | case KVM_EXIT_S390_TSCH: |
793 | ret = handle_tsch(cpu); | |
794 | break; | |
0e60a699 AG |
795 | default: |
796 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
797 | break; | |
798 | } | |
799 | ||
bb4ea393 JK |
800 | if (ret == 0) { |
801 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 802 | } |
0e60a699 AG |
803 | return ret; |
804 | } | |
4513d923 | 805 | |
20d695a9 | 806 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
807 | { |
808 | return true; | |
809 | } | |
a1b87fe0 | 810 | |
20d695a9 | 811 | int kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr) |
a1b87fe0 JK |
812 | { |
813 | return 1; | |
814 | } | |
815 | ||
816 | int kvm_arch_on_sigbus(int code, void *addr) | |
817 | { | |
818 | return 1; | |
819 | } | |
09b99878 CH |
820 | |
821 | void kvm_s390_io_interrupt(S390CPU *cpu, uint16_t subchannel_id, | |
822 | uint16_t subchannel_nr, uint32_t io_int_parm, | |
823 | uint32_t io_int_word) | |
824 | { | |
825 | uint32_t type; | |
826 | ||
827 | type = ((subchannel_id & 0xff00) << 24) | | |
828 | ((subchannel_id & 0x00060) << 22) | (subchannel_nr << 16); | |
829 | kvm_s390_interrupt_internal(cpu, type, | |
830 | ((uint32_t)subchannel_id << 16) | subchannel_nr, | |
831 | ((uint64_t)io_int_parm << 32) | io_int_word, 1); | |
832 | } | |
833 | ||
834 | void kvm_s390_crw_mchk(S390CPU *cpu) | |
835 | { | |
836 | kvm_s390_interrupt_internal(cpu, KVM_S390_MCHK, 1 << 28, | |
837 | 0x00400f1d40330000, 1); | |
838 | } | |
839 | ||
840 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
841 | { | |
842 | struct kvm_enable_cap cap = {}; | |
843 | int r; | |
844 | ||
845 | /* Activate host kernel channel subsystem support. */ | |
846 | cap.cap = KVM_CAP_S390_CSS_SUPPORT; | |
847 | r = kvm_vcpu_ioctl(CPU(cpu), KVM_ENABLE_CAP, &cap); | |
848 | assert(r == 0); | |
849 | } |