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ppc: switch to constants within BUILD_BUG_ON
[qemu.git] / hw / ppc / spapr_events.c
CommitLineData
74d042e5
DG
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * RTAS events handling
5 *
6 * Copyright (c) 2012 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
0d75590d 27#include "qemu/osdep.h"
da34e65c 28#include "qapi/error.h"
74d042e5 29#include "cpu.h"
9c17d615 30#include "sysemu/sysemu.h"
dccfcd0e 31#include "sysemu/char.h"
74d042e5 32#include "hw/qdev.h"
9c17d615 33#include "sysemu/device_tree.h"
74d042e5 34
7804c353 35#include "hw/ppc/fdt.h"
0d09e41a
PB
36#include "hw/ppc/spapr.h"
37#include "hw/ppc/spapr_vio.h"
31fe14d1
NF
38#include "hw/pci/pci.h"
39#include "hw/pci-host/spapr.h"
40#include "hw/ppc/spapr_drc.h"
f348b6d1
VB
41#include "qemu/help_option.h"
42#include "qemu/bcd.h"
ffbb1705 43#include "hw/ppc/spapr_ovec.h"
74d042e5
DG
44#include <libfdt.h>
45
46struct rtas_error_log {
47 uint32_t summary;
48#define RTAS_LOG_VERSION_MASK 0xff000000
49#define RTAS_LOG_VERSION_6 0x06000000
50#define RTAS_LOG_SEVERITY_MASK 0x00e00000
51#define RTAS_LOG_SEVERITY_ALREADY_REPORTED 0x00c00000
52#define RTAS_LOG_SEVERITY_FATAL 0x00a00000
53#define RTAS_LOG_SEVERITY_ERROR 0x00800000
54#define RTAS_LOG_SEVERITY_ERROR_SYNC 0x00600000
55#define RTAS_LOG_SEVERITY_WARNING 0x00400000
56#define RTAS_LOG_SEVERITY_EVENT 0x00200000
57#define RTAS_LOG_SEVERITY_NO_ERROR 0x00000000
58#define RTAS_LOG_DISPOSITION_MASK 0x00180000
59#define RTAS_LOG_DISPOSITION_FULLY_RECOVERED 0x00000000
60#define RTAS_LOG_DISPOSITION_LIMITED_RECOVERY 0x00080000
61#define RTAS_LOG_DISPOSITION_NOT_RECOVERED 0x00100000
62#define RTAS_LOG_OPTIONAL_PART_PRESENT 0x00040000
63#define RTAS_LOG_INITIATOR_MASK 0x0000f000
64#define RTAS_LOG_INITIATOR_UNKNOWN 0x00000000
65#define RTAS_LOG_INITIATOR_CPU 0x00001000
66#define RTAS_LOG_INITIATOR_PCI 0x00002000
67#define RTAS_LOG_INITIATOR_MEMORY 0x00004000
68#define RTAS_LOG_INITIATOR_HOTPLUG 0x00006000
69#define RTAS_LOG_TARGET_MASK 0x00000f00
70#define RTAS_LOG_TARGET_UNKNOWN 0x00000000
71#define RTAS_LOG_TARGET_CPU 0x00000100
72#define RTAS_LOG_TARGET_PCI 0x00000200
73#define RTAS_LOG_TARGET_MEMORY 0x00000400
74#define RTAS_LOG_TARGET_HOTPLUG 0x00000600
75#define RTAS_LOG_TYPE_MASK 0x000000ff
76#define RTAS_LOG_TYPE_OTHER 0x00000000
77#define RTAS_LOG_TYPE_RETRY 0x00000001
78#define RTAS_LOG_TYPE_TCE_ERR 0x00000002
79#define RTAS_LOG_TYPE_INTERN_DEV_FAIL 0x00000003
80#define RTAS_LOG_TYPE_TIMEOUT 0x00000004
81#define RTAS_LOG_TYPE_DATA_PARITY 0x00000005
82#define RTAS_LOG_TYPE_ADDR_PARITY 0x00000006
83#define RTAS_LOG_TYPE_CACHE_PARITY 0x00000007
84#define RTAS_LOG_TYPE_ADDR_INVALID 0x00000008
85#define RTAS_LOG_TYPE_ECC_UNCORR 0x00000009
86#define RTAS_LOG_TYPE_ECC_CORR 0x0000000a
87#define RTAS_LOG_TYPE_EPOW 0x00000040
31fe14d1 88#define RTAS_LOG_TYPE_HOTPLUG 0x000000e5
74d042e5
DG
89 uint32_t extended_length;
90} QEMU_PACKED;
91
92struct rtas_event_log_v6 {
93 uint8_t b0;
94#define RTAS_LOG_V6_B0_VALID 0x80
95#define RTAS_LOG_V6_B0_UNRECOVERABLE_ERROR 0x40
96#define RTAS_LOG_V6_B0_RECOVERABLE_ERROR 0x20
97#define RTAS_LOG_V6_B0_DEGRADED_OPERATION 0x10
98#define RTAS_LOG_V6_B0_PREDICTIVE_ERROR 0x08
99#define RTAS_LOG_V6_B0_NEW_LOG 0x04
100#define RTAS_LOG_V6_B0_BIGENDIAN 0x02
101 uint8_t _resv1;
102 uint8_t b2;
103#define RTAS_LOG_V6_B2_POWERPC_FORMAT 0x80
104#define RTAS_LOG_V6_B2_LOG_FORMAT_MASK 0x0f
105#define RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT 0x0e
106 uint8_t _resv2[9];
107 uint32_t company;
108#define RTAS_LOG_V6_COMPANY_IBM 0x49424d00 /* IBM<null> */
109} QEMU_PACKED;
110
111struct rtas_event_log_v6_section_header {
112 uint16_t section_id;
113 uint16_t section_length;
114 uint8_t section_version;
115 uint8_t section_subtype;
116 uint16_t creator_component_id;
117} QEMU_PACKED;
118
119struct rtas_event_log_v6_maina {
120#define RTAS_LOG_V6_SECTION_ID_MAINA 0x5048 /* PH */
121 struct rtas_event_log_v6_section_header hdr;
122 uint32_t creation_date; /* BCD: YYYYMMDD */
123 uint32_t creation_time; /* BCD: HHMMSS00 */
124 uint8_t _platform1[8];
125 char creator_id;
126 uint8_t _resv1[2];
127 uint8_t section_count;
128 uint8_t _resv2[4];
129 uint8_t _platform2[8];
130 uint32_t plid;
131 uint8_t _platform3[4];
132} QEMU_PACKED;
133
134struct rtas_event_log_v6_mainb {
135#define RTAS_LOG_V6_SECTION_ID_MAINB 0x5548 /* UH */
136 struct rtas_event_log_v6_section_header hdr;
137 uint8_t subsystem_id;
138 uint8_t _platform1;
139 uint8_t event_severity;
140 uint8_t event_subtype;
141 uint8_t _platform2[4];
142 uint8_t _resv1[2];
143 uint16_t action_flags;
144 uint8_t _resv2[4];
145} QEMU_PACKED;
146
147struct rtas_event_log_v6_epow {
148#define RTAS_LOG_V6_SECTION_ID_EPOW 0x4550 /* EP */
149 struct rtas_event_log_v6_section_header hdr;
150 uint8_t sensor_value;
151#define RTAS_LOG_V6_EPOW_ACTION_RESET 0
152#define RTAS_LOG_V6_EPOW_ACTION_WARN_COOLING 1
153#define RTAS_LOG_V6_EPOW_ACTION_WARN_POWER 2
154#define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN 3
155#define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_HALT 4
156#define RTAS_LOG_V6_EPOW_ACTION_MAIN_ENCLOSURE 5
157#define RTAS_LOG_V6_EPOW_ACTION_POWER_OFF 7
158 uint8_t event_modifier;
159#define RTAS_LOG_V6_EPOW_MODIFIER_NORMAL 1
160#define RTAS_LOG_V6_EPOW_MODIFIER_ON_UPS 2
161#define RTAS_LOG_V6_EPOW_MODIFIER_CRITICAL 3
162#define RTAS_LOG_V6_EPOW_MODIFIER_TEMPERATURE 4
163 uint8_t extended_modifier;
164#define RTAS_LOG_V6_EPOW_XMODIFIER_SYSTEM_WIDE 0
165#define RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC 1
166 uint8_t _resv;
167 uint64_t reason_code;
168} QEMU_PACKED;
169
170struct epow_log_full {
171 struct rtas_error_log hdr;
172 struct rtas_event_log_v6 v6hdr;
173 struct rtas_event_log_v6_maina maina;
174 struct rtas_event_log_v6_mainb mainb;
175 struct rtas_event_log_v6_epow epow;
176} QEMU_PACKED;
177
afdbd403
BR
178union drc_identifier {
179 uint32_t index;
180 uint32_t count;
181 struct {
182 uint32_t count;
183 uint32_t index;
184 } count_indexed;
185 char name[1];
186} QEMU_PACKED;
187
31fe14d1
NF
188struct rtas_event_log_v6_hp {
189#define RTAS_LOG_V6_SECTION_ID_HOTPLUG 0x4850 /* HP */
190 struct rtas_event_log_v6_section_header hdr;
191 uint8_t hotplug_type;
192#define RTAS_LOG_V6_HP_TYPE_CPU 1
193#define RTAS_LOG_V6_HP_TYPE_MEMORY 2
194#define RTAS_LOG_V6_HP_TYPE_SLOT 3
195#define RTAS_LOG_V6_HP_TYPE_PHB 4
196#define RTAS_LOG_V6_HP_TYPE_PCI 5
197 uint8_t hotplug_action;
198#define RTAS_LOG_V6_HP_ACTION_ADD 1
199#define RTAS_LOG_V6_HP_ACTION_REMOVE 2
200 uint8_t hotplug_identifier;
201#define RTAS_LOG_V6_HP_ID_DRC_NAME 1
202#define RTAS_LOG_V6_HP_ID_DRC_INDEX 2
203#define RTAS_LOG_V6_HP_ID_DRC_COUNT 3
afdbd403 204#define RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED 4
31fe14d1 205 uint8_t reserved;
afdbd403 206 union drc_identifier drc_id;
31fe14d1
NF
207} QEMU_PACKED;
208
209struct hp_log_full {
210 struct rtas_error_log hdr;
211 struct rtas_event_log_v6 v6hdr;
212 struct rtas_event_log_v6_maina maina;
213 struct rtas_event_log_v6_mainb mainb;
214 struct rtas_event_log_v6_hp hp;
215} QEMU_PACKED;
216
ffbb1705
MR
217typedef enum EventClass {
218 EVENT_CLASS_INTERNAL_ERRORS = 0,
219 EVENT_CLASS_EPOW = 1,
220 EVENT_CLASS_RESERVED = 2,
221 EVENT_CLASS_HOT_PLUG = 3,
222 EVENT_CLASS_IO = 4,
223 EVENT_CLASS_MAX
224} EventClassIndex;
225#define EVENT_CLASS_MASK(index) (1 << (31 - index))
226
227static const char * const event_names[EVENT_CLASS_MAX] = {
228 [EVENT_CLASS_INTERNAL_ERRORS] = "internal-errors",
229 [EVENT_CLASS_EPOW] = "epow-events",
230 [EVENT_CLASS_HOT_PLUG] = "hot-plug-events",
231 [EVENT_CLASS_IO] = "ibm,io-events",
232};
233
234struct sPAPREventSource {
235 int irq;
236 uint32_t mask;
237 bool enabled;
238};
239
240static sPAPREventSource *spapr_event_sources_new(void)
241{
242 return g_new0(sPAPREventSource, EVENT_CLASS_MAX);
243}
244
245static void spapr_event_sources_register(sPAPREventSource *event_sources,
246 EventClassIndex index, int irq)
247{
248 /* we only support 1 irq per event class at the moment */
249 g_assert(event_sources);
250 g_assert(!event_sources[index].enabled);
251 event_sources[index].irq = irq;
252 event_sources[index].mask = EVENT_CLASS_MASK(index);
253 event_sources[index].enabled = true;
254}
255
256static const sPAPREventSource *
257spapr_event_sources_get_source(sPAPREventSource *event_sources,
258 EventClassIndex index)
259{
260 g_assert(index < EVENT_CLASS_MAX);
261 g_assert(event_sources);
262
263 return &event_sources[index];
264}
74d042e5 265
ffbb1705 266void spapr_dt_events(sPAPRMachineState *spapr, void *fdt)
74d042e5 267{
ffbb1705
MR
268 uint32_t irq_ranges[EVENT_CLASS_MAX * 2];
269 int i, count = 0, event_sources;
270 sPAPREventSource *events = spapr->event_sources;
271
272 g_assert(events);
74d042e5 273
ffb1e275 274 _FDT(event_sources = fdt_add_subnode(fdt, 0, "event-sources"));
74d042e5 275
ffbb1705
MR
276 for (i = 0, count = 0; i < EVENT_CLASS_MAX; i++) {
277 int node_offset;
278 uint32_t interrupts[2];
279 const sPAPREventSource *source =
280 spapr_event_sources_get_source(events, i);
281 const char *source_name = event_names[i];
282
283 if (!source->enabled) {
284 continue;
285 }
286
287 interrupts[0] = cpu_to_be32(source->irq);
288 interrupts[1] = 0;
289
290 _FDT(node_offset = fdt_add_subnode(fdt, event_sources, source_name));
291 _FDT(fdt_setprop(fdt, node_offset, "interrupts", interrupts,
292 sizeof(interrupts)));
293
294 irq_ranges[count++] = interrupts[0];
295 irq_ranges[count++] = cpu_to_be32(1);
296 }
297
298 irq_ranges[count] = cpu_to_be32(count);
299 count++;
300
301 _FDT((fdt_setprop(fdt, event_sources, "interrupt-controller", NULL, 0)));
302 _FDT((fdt_setprop_cell(fdt, event_sources, "#interrupt-cells", 2)));
303 _FDT((fdt_setprop(fdt, event_sources, "interrupt-ranges",
304 irq_ranges, count * sizeof(uint32_t))));
305}
306
307static const sPAPREventSource *
308rtas_event_log_to_source(sPAPRMachineState *spapr, int log_type)
309{
310 const sPAPREventSource *source;
311
312 g_assert(spapr->event_sources);
313
314 switch (log_type) {
315 case RTAS_LOG_TYPE_HOTPLUG:
316 source = spapr_event_sources_get_source(spapr->event_sources,
317 EVENT_CLASS_HOT_PLUG);
318 if (spapr_ovec_test(spapr->ov5_cas, OV5_HP_EVT)) {
319 g_assert(source->enabled);
320 break;
321 }
322 /* fall back to epow for legacy hotplug interrupt source */
323 case RTAS_LOG_TYPE_EPOW:
324 source = spapr_event_sources_get_source(spapr->event_sources,
325 EVENT_CLASS_EPOW);
326 break;
327 default:
328 source = NULL;
329 }
330
331 return source;
332}
333
334static int rtas_event_log_to_irq(sPAPRMachineState *spapr, int log_type)
335{
336 const sPAPREventSource *source;
74d042e5 337
ffbb1705
MR
338 source = rtas_event_log_to_source(spapr, log_type);
339 g_assert(source);
340 g_assert(source->enabled);
341
342 return source->irq;
74d042e5
DG
343}
344
79853e18 345static void rtas_event_log_queue(int log_type, void *data, bool exception)
31fe14d1 346{
28e02042 347 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
31fe14d1 348 sPAPREventLogEntry *entry = g_new(sPAPREventLogEntry, 1);
74d042e5 349
31fe14d1
NF
350 g_assert(data);
351 entry->log_type = log_type;
79853e18 352 entry->exception = exception;
31fe14d1
NF
353 entry->data = data;
354 QTAILQ_INSERT_TAIL(&spapr->pending_events, entry, next);
355}
356
79853e18
TD
357static sPAPREventLogEntry *rtas_event_log_dequeue(uint32_t event_mask,
358 bool exception)
74d042e5 359{
28e02042 360 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
31fe14d1 361 sPAPREventLogEntry *entry = NULL;
74d042e5 362
31fe14d1 363 QTAILQ_FOREACH(entry, &spapr->pending_events, next) {
ffbb1705
MR
364 const sPAPREventSource *source =
365 rtas_event_log_to_source(spapr, entry->log_type);
366
79853e18
TD
367 if (entry->exception != exception) {
368 continue;
369 }
370
ffbb1705 371 if (source->mask & event_mask) {
31fe14d1
NF
372 break;
373 }
374 }
375
376 if (entry) {
377 QTAILQ_REMOVE(&spapr->pending_events, entry, next);
378 }
379
380 return entry;
381}
382
79853e18 383static bool rtas_event_log_contains(uint32_t event_mask, bool exception)
31fe14d1 384{
28e02042 385 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
31fe14d1
NF
386 sPAPREventLogEntry *entry = NULL;
387
31fe14d1 388 QTAILQ_FOREACH(entry, &spapr->pending_events, next) {
ffbb1705
MR
389 const sPAPREventSource *source =
390 rtas_event_log_to_source(spapr, entry->log_type);
391
79853e18
TD
392 if (entry->exception != exception) {
393 continue;
394 }
395
ffbb1705 396 if (source->mask & event_mask) {
31fe14d1
NF
397 return true;
398 }
399 }
400
401 return false;
402}
74d042e5 403
31fe14d1
NF
404static uint32_t next_plid;
405
406static void spapr_init_v6hdr(struct rtas_event_log_v6 *v6hdr)
407{
74d042e5
DG
408 v6hdr->b0 = RTAS_LOG_V6_B0_VALID | RTAS_LOG_V6_B0_NEW_LOG
409 | RTAS_LOG_V6_B0_BIGENDIAN;
410 v6hdr->b2 = RTAS_LOG_V6_B2_POWERPC_FORMAT
411 | RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT;
412 v6hdr->company = cpu_to_be32(RTAS_LOG_V6_COMPANY_IBM);
31fe14d1
NF
413}
414
415static void spapr_init_maina(struct rtas_event_log_v6_maina *maina,
416 int section_count)
417{
28e02042 418 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
31fe14d1
NF
419 struct tm tm;
420 int year;
74d042e5
DG
421
422 maina->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINA);
423 maina->hdr.section_length = cpu_to_be16(sizeof(*maina));
424 /* FIXME: section version, subtype and creator id? */
28df36a1 425 spapr_rtc_read(spapr->rtc, &tm, NULL);
74d042e5
DG
426 year = tm.tm_year + 1900;
427 maina->creation_date = cpu_to_be32((to_bcd(year / 100) << 24)
428 | (to_bcd(year % 100) << 16)
429 | (to_bcd(tm.tm_mon + 1) << 8)
430 | to_bcd(tm.tm_mday));
431 maina->creation_time = cpu_to_be32((to_bcd(tm.tm_hour) << 24)
432 | (to_bcd(tm.tm_min) << 16)
433 | (to_bcd(tm.tm_sec) << 8));
434 maina->creator_id = 'H'; /* Hypervisor */
31fe14d1 435 maina->section_count = section_count;
74d042e5 436 maina->plid = next_plid++;
31fe14d1
NF
437}
438
439static void spapr_powerdown_req(Notifier *n, void *opaque)
440{
28e02042 441 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
31fe14d1
NF
442 struct rtas_error_log *hdr;
443 struct rtas_event_log_v6 *v6hdr;
444 struct rtas_event_log_v6_maina *maina;
445 struct rtas_event_log_v6_mainb *mainb;
446 struct rtas_event_log_v6_epow *epow;
447 struct epow_log_full *new_epow;
448
449 new_epow = g_malloc0(sizeof(*new_epow));
450 hdr = &new_epow->hdr;
451 v6hdr = &new_epow->v6hdr;
452 maina = &new_epow->maina;
453 mainb = &new_epow->mainb;
454 epow = &new_epow->epow;
455
456 hdr->summary = cpu_to_be32(RTAS_LOG_VERSION_6
457 | RTAS_LOG_SEVERITY_EVENT
458 | RTAS_LOG_DISPOSITION_NOT_RECOVERED
459 | RTAS_LOG_OPTIONAL_PART_PRESENT
460 | RTAS_LOG_TYPE_EPOW);
461 hdr->extended_length = cpu_to_be32(sizeof(*new_epow)
462 - sizeof(new_epow->hdr));
463
464 spapr_init_v6hdr(v6hdr);
465 spapr_init_maina(maina, 3 /* Main-A, Main-B and EPOW */);
74d042e5
DG
466
467 mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB);
468 mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb));
469 /* FIXME: section version, subtype and creator id? */
470 mainb->subsystem_id = 0xa0; /* External environment */
471 mainb->event_severity = 0x00; /* Informational / non-error */
472 mainb->event_subtype = 0xd0; /* Normal shutdown */
473
474 epow->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_EPOW);
475 epow->hdr.section_length = cpu_to_be16(sizeof(*epow));
476 epow->hdr.section_version = 2; /* includes extended modifier */
477 /* FIXME: section subtype and creator id? */
478 epow->sensor_value = RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN;
479 epow->event_modifier = RTAS_LOG_V6_EPOW_MODIFIER_NORMAL;
480 epow->extended_modifier = RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC;
481
79853e18 482 rtas_event_log_queue(RTAS_LOG_TYPE_EPOW, new_epow, true);
31fe14d1 483
ffbb1705
MR
484 qemu_irq_pulse(xics_get_qirq(spapr->xics,
485 rtas_event_log_to_irq(spapr,
486 RTAS_LOG_TYPE_EPOW)));
31fe14d1
NF
487}
488
f40eb921
MR
489static void spapr_hotplug_set_signalled(uint32_t drc_index)
490{
491 sPAPRDRConnector *drc = spapr_dr_connector_by_index(drc_index);
492 sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
493 drck->set_signalled(drc);
494}
495
7a36ae7a
BR
496static void spapr_hotplug_req_event(uint8_t hp_id, uint8_t hp_action,
497 sPAPRDRConnectorType drc_type,
afdbd403 498 union drc_identifier *drc_id)
31fe14d1 499{
28e02042 500 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
31fe14d1
NF
501 struct hp_log_full *new_hp;
502 struct rtas_error_log *hdr;
503 struct rtas_event_log_v6 *v6hdr;
504 struct rtas_event_log_v6_maina *maina;
505 struct rtas_event_log_v6_mainb *mainb;
506 struct rtas_event_log_v6_hp *hp;
31fe14d1
NF
507
508 new_hp = g_malloc0(sizeof(struct hp_log_full));
509 hdr = &new_hp->hdr;
510 v6hdr = &new_hp->v6hdr;
511 maina = &new_hp->maina;
512 mainb = &new_hp->mainb;
513 hp = &new_hp->hp;
514
515 hdr->summary = cpu_to_be32(RTAS_LOG_VERSION_6
516 | RTAS_LOG_SEVERITY_EVENT
517 | RTAS_LOG_DISPOSITION_NOT_RECOVERED
518 | RTAS_LOG_OPTIONAL_PART_PRESENT
519 | RTAS_LOG_INITIATOR_HOTPLUG
520 | RTAS_LOG_TYPE_HOTPLUG);
521 hdr->extended_length = cpu_to_be32(sizeof(*new_hp)
522 - sizeof(new_hp->hdr));
523
524 spapr_init_v6hdr(v6hdr);
525 spapr_init_maina(maina, 3 /* Main-A, Main-B, HP */);
526
527 mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB);
528 mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb));
529 mainb->subsystem_id = 0x80; /* External environment */
530 mainb->event_severity = 0x00; /* Informational / non-error */
531 mainb->event_subtype = 0x00; /* Normal shutdown */
532
533 hp->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_HOTPLUG);
534 hp->hdr.section_length = cpu_to_be16(sizeof(*hp));
535 hp->hdr.section_version = 1; /* includes extended modifier */
536 hp->hotplug_action = hp_action;
7a36ae7a 537 hp->hotplug_identifier = hp_id;
31fe14d1
NF
538
539 switch (drc_type) {
540 case SPAPR_DR_CONNECTOR_TYPE_PCI:
31fe14d1 541 hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_PCI;
df18b2db 542 if (hp->hotplug_action == RTAS_LOG_V6_HP_ACTION_ADD) {
afdbd403 543 spapr_hotplug_set_signalled(drc_id->index);
df18b2db 544 }
31fe14d1 545 break;
c20d332a
BR
546 case SPAPR_DR_CONNECTOR_TYPE_LMB:
547 hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_MEMORY;
548 break;
af81cf32
BR
549 case SPAPR_DR_CONNECTOR_TYPE_CPU:
550 hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_CPU;
551 break;
31fe14d1
NF
552 default:
553 /* we shouldn't be signaling hotplug events for resources
554 * that don't support them
555 */
556 g_assert(false);
557 return;
558 }
559
7a36ae7a 560 if (hp_id == RTAS_LOG_V6_HP_ID_DRC_COUNT) {
afdbd403 561 hp->drc_id.count = cpu_to_be32(drc_id->count);
7a36ae7a 562 } else if (hp_id == RTAS_LOG_V6_HP_ID_DRC_INDEX) {
afdbd403
BR
563 hp->drc_id.index = cpu_to_be32(drc_id->index);
564 } else if (hp_id == RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED) {
565 /* we should not be using count_indexed value unless the guest
566 * supports dedicated hotplug event source
567 */
568 g_assert(spapr_ovec_test(spapr->ov5_cas, OV5_HP_EVT));
569 hp->drc_id.count_indexed.count =
570 cpu_to_be32(drc_id->count_indexed.count);
571 hp->drc_id.count_indexed.index =
572 cpu_to_be32(drc_id->count_indexed.index);
7a36ae7a
BR
573 }
574
79853e18 575 rtas_event_log_queue(RTAS_LOG_TYPE_HOTPLUG, new_hp, true);
31fe14d1 576
ffbb1705
MR
577 qemu_irq_pulse(xics_get_qirq(spapr->xics,
578 rtas_event_log_to_irq(spapr,
579 RTAS_LOG_TYPE_HOTPLUG)));
31fe14d1
NF
580}
581
7a36ae7a
BR
582void spapr_hotplug_req_add_by_index(sPAPRDRConnector *drc)
583{
584 sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
585 sPAPRDRConnectorType drc_type = drck->get_type(drc);
afdbd403 586 union drc_identifier drc_id;
7a36ae7a 587
afdbd403 588 drc_id.index = drck->get_index(drc);
7a36ae7a 589 spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_INDEX,
afdbd403 590 RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id);
7a36ae7a
BR
591}
592
593void spapr_hotplug_req_remove_by_index(sPAPRDRConnector *drc)
594{
595 sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
596 sPAPRDRConnectorType drc_type = drck->get_type(drc);
afdbd403 597 union drc_identifier drc_id;
7a36ae7a 598
afdbd403 599 drc_id.index = drck->get_index(drc);
7a36ae7a 600 spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_INDEX,
afdbd403 601 RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id);
7a36ae7a
BR
602}
603
604void spapr_hotplug_req_add_by_count(sPAPRDRConnectorType drc_type,
605 uint32_t count)
31fe14d1 606{
afdbd403
BR
607 union drc_identifier drc_id;
608
609 drc_id.count = count;
7a36ae7a 610 spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT,
afdbd403 611 RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id);
31fe14d1
NF
612}
613
7a36ae7a
BR
614void spapr_hotplug_req_remove_by_count(sPAPRDRConnectorType drc_type,
615 uint32_t count)
31fe14d1 616{
afdbd403
BR
617 union drc_identifier drc_id;
618
619 drc_id.count = count;
7a36ae7a 620 spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT,
afdbd403
BR
621 RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id);
622}
623
624void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConnectorType drc_type,
625 uint32_t count, uint32_t index)
626{
627 union drc_identifier drc_id;
628
629 drc_id.count_indexed.count = count;
630 drc_id.count_indexed.index = index;
631 spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED,
632 RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id);
633}
634
635void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type,
636 uint32_t count, uint32_t index)
637{
638 union drc_identifier drc_id;
639
640 drc_id.count_indexed.count = count;
641 drc_id.count_indexed.index = index;
642 spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED,
643 RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id);
74d042e5
DG
644}
645
28e02042 646static void check_exception(PowerPCCPU *cpu, sPAPRMachineState *spapr,
74d042e5
DG
647 uint32_t token, uint32_t nargs,
648 target_ulong args,
649 uint32_t nret, target_ulong rets)
650{
31fe14d1 651 uint32_t mask, buf, len, event_len;
74d042e5 652 uint64_t xinfo;
31fe14d1
NF
653 sPAPREventLogEntry *event;
654 struct rtas_error_log *hdr;
ffbb1705 655 int i;
74d042e5
DG
656
657 if ((nargs < 6) || (nargs > 7) || nret != 1) {
a64d325d 658 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
74d042e5
DG
659 return;
660 }
661
662 xinfo = rtas_ld(args, 1);
663 mask = rtas_ld(args, 2);
664 buf = rtas_ld(args, 4);
665 len = rtas_ld(args, 5);
666 if (nargs == 7) {
667 xinfo |= (uint64_t)rtas_ld(args, 6) << 32;
668 }
669
79853e18 670 event = rtas_event_log_dequeue(mask, true);
31fe14d1
NF
671 if (!event) {
672 goto out_no_events;
673 }
74d042e5 674
31fe14d1
NF
675 hdr = event->data;
676 event_len = be32_to_cpu(hdr->extended_length) + sizeof(*hdr);
677
678 if (event_len < len) {
679 len = event_len;
680 }
681
682 cpu_physical_memory_write(buf, event->data, len);
683 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
684 g_free(event->data);
685 g_free(event);
686
687 /* according to PAPR+, the IRQ must be left asserted, or re-asserted, if
688 * there are still pending events to be fetched via check-exception. We
689 * do the latter here, since our code relies on edge-triggered
690 * interrupts.
691 */
ffbb1705
MR
692 for (i = 0; i < EVENT_CLASS_MAX; i++) {
693 if (rtas_event_log_contains(EVENT_CLASS_MASK(i), true)) {
694 const sPAPREventSource *source =
695 spapr_event_sources_get_source(spapr->event_sources, i);
696
697 g_assert(source->enabled);
698 qemu_irq_pulse(xics_get_qirq(spapr->xics, source->irq));
699 }
74d042e5 700 }
31fe14d1
NF
701
702 return;
703
704out_no_events:
705 rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND);
74d042e5
DG
706}
707
28e02042 708static void event_scan(PowerPCCPU *cpu, sPAPRMachineState *spapr,
79853e18
TD
709 uint32_t token, uint32_t nargs,
710 target_ulong args,
711 uint32_t nret, target_ulong rets)
712{
713 uint32_t mask, buf, len, event_len;
714 sPAPREventLogEntry *event;
715 struct rtas_error_log *hdr;
716
717 if (nargs != 4 || nret != 1) {
718 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
719 return;
720 }
721
722 mask = rtas_ld(args, 0);
723 buf = rtas_ld(args, 2);
724 len = rtas_ld(args, 3);
725
726 event = rtas_event_log_dequeue(mask, false);
727 if (!event) {
728 goto out_no_events;
729 }
730
731 hdr = event->data;
732 event_len = be32_to_cpu(hdr->extended_length) + sizeof(*hdr);
733
734 if (event_len < len) {
735 len = event_len;
736 }
737
738 cpu_physical_memory_write(buf, event->data, len);
739 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
740 g_free(event->data);
741 g_free(event);
742 return;
743
744out_no_events:
745 rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND);
746}
747
28e02042 748void spapr_events_init(sPAPRMachineState *spapr)
74d042e5 749{
31fe14d1 750 QTAILQ_INIT(&spapr->pending_events);
ffbb1705
MR
751
752 spapr->event_sources = spapr_event_sources_new();
753
754 spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_EPOW,
755 xics_spapr_alloc(spapr->xics, 0, false,
756 &error_fatal));
757
758 /* NOTE: if machine supports modern/dedicated hotplug event source,
759 * we add it to the device-tree unconditionally. This means we may
760 * have cases where the source is enabled in QEMU, but unused by the
761 * guest because it does not support modern hotplug events, so we
762 * take care to rely on checking for negotiation of OV5_HP_EVT option
763 * before attempting to use it to signal events, rather than simply
764 * checking that it's enabled.
765 */
766 if (spapr->use_hotplug_event_source) {
767 spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT_PLUG,
768 xics_spapr_alloc(spapr->xics, 0, false,
769 &error_fatal));
770 }
771
74d042e5
DG
772 spapr->epow_notifier.notify = spapr_powerdown_req;
773 qemu_register_powerdown_notifier(&spapr->epow_notifier);
3a3b8502
AK
774 spapr_rtas_register(RTAS_CHECK_EXCEPTION, "check-exception",
775 check_exception);
79853e18 776 spapr_rtas_register(RTAS_EVENT_SCAN, "event-scan", event_scan);
74d042e5 777}
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