target/*/cpu.h: remove softfloat.h
[qemu.git] / target / sparc / helper.c
CommitLineData
e8af50a3 1/*
163fa5ca 2 * Misc Sparc helpers
5fafdf24 3 *
83469015 4 * Copyright (c) 2003-2005 Fabrice Bellard
e8af50a3
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
e8af50a3 18 */
ee5bbe38 19
db5ebe5f 20#include "qemu/osdep.h"
ee5bbe38 21#include "cpu.h"
63c91552 22#include "exec/exec-all.h"
1de7afc9 23#include "qemu/host-utils.h"
2ef6175a 24#include "exec/helper-proto.h"
9c17d615 25#include "sysemu/sysemu.h"
e8af50a3 26
2f9d35fc
RH
27void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra)
28{
29 CPUState *cs = CPU(sparc_env_get_cpu(env));
30
31 cs->exception_index = tt;
32 cpu_loop_exit_restore(cs, ra);
33}
34
c5f9864e 35void helper_raise_exception(CPUSPARCState *env, int tt)
bc265319 36{
27103424
AF
37 CPUState *cs = CPU(sparc_env_get_cpu(env));
38
39 cs->exception_index = tt;
5638d180 40 cpu_loop_exit(cs);
bc265319
BS
41}
42
c5f9864e 43void helper_debug(CPUSPARCState *env)
bc265319 44{
27103424
AF
45 CPUState *cs = CPU(sparc_env_get_cpu(env));
46
47 cs->exception_index = EXCP_DEBUG;
5638d180 48 cpu_loop_exit(cs);
bc265319
BS
49}
50
2336c1f1 51#ifdef TARGET_SPARC64
2336c1f1
BS
52void helper_tick_set_count(void *opaque, uint64_t count)
53{
54#if !defined(CONFIG_USER_ONLY)
55 cpu_tick_set_count(opaque, count);
56#endif
57}
58
c9a46442 59uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
2336c1f1
BS
60{
61#if !defined(CONFIG_USER_ONLY)
c9a46442
MCA
62 CPUTimer *timer = opaque;
63
64 if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
2f9d35fc 65 cpu_raise_exception_ra(env, TT_PRIV_INSN, GETPC());
c9a46442
MCA
66 }
67
68 return cpu_tick_get_count(timer);
2336c1f1
BS
69#else
70 return 0;
71#endif
72}
73
74void helper_tick_set_limit(void *opaque, uint64_t limit)
75{
76#if !defined(CONFIG_USER_ONLY)
77 cpu_tick_set_limit(opaque, limit);
78#endif
79}
80#endif
7a5e4488 81
2f9d35fc
RH
82static target_ulong do_udiv(CPUSPARCState *env, target_ulong a,
83 target_ulong b, int cc, uintptr_t ra)
7a5e4488
BS
84{
85 int overflow = 0;
86 uint64_t x0;
87 uint32_t x1;
88
89 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
90 x1 = (b & 0xffffffff);
91
92 if (x1 == 0) {
2f9d35fc 93 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
7a5e4488
BS
94 }
95
96 x0 = x0 / x1;
6a5b69a9
OD
97 if (x0 > UINT32_MAX) {
98 x0 = UINT32_MAX;
7a5e4488
BS
99 overflow = 1;
100 }
101
102 if (cc) {
103 env->cc_dst = x0;
104 env->cc_src2 = overflow;
105 env->cc_op = CC_OP_DIV;
106 }
107 return x0;
108}
109
c5f9864e 110target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 111{
2f9d35fc 112 return do_udiv(env, a, b, 0, GETPC());
7a5e4488
BS
113}
114
c5f9864e 115target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 116{
2f9d35fc 117 return do_udiv(env, a, b, 1, GETPC());
7a5e4488
BS
118}
119
2f9d35fc
RH
120static target_ulong do_sdiv(CPUSPARCState *env, target_ulong a,
121 target_ulong b, int cc, uintptr_t ra)
7a5e4488
BS
122{
123 int overflow = 0;
124 int64_t x0;
125 int32_t x1;
126
127 x0 = (a & 0xffffffff) | ((int64_t) (env->y) << 32);
128 x1 = (b & 0xffffffff);
129
130 if (x1 == 0) {
2f9d35fc 131 cpu_raise_exception_ra(env, TT_DIV_ZERO, ra);
6a5b69a9
OD
132 } else if (x1 == -1 && x0 == INT64_MIN) {
133 x0 = INT32_MAX;
7a5e4488 134 overflow = 1;
6a5b69a9
OD
135 } else {
136 x0 = x0 / x1;
137 if ((int32_t) x0 != x0) {
138 x0 = x0 < 0 ? INT32_MIN : INT32_MAX;
139 overflow = 1;
140 }
7a5e4488
BS
141 }
142
143 if (cc) {
144 env->cc_dst = x0;
145 env->cc_src2 = overflow;
146 env->cc_op = CC_OP_DIV;
147 }
148 return x0;
149}
150
c5f9864e 151target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 152{
2f9d35fc 153 return do_sdiv(env, a, b, 0, GETPC());
7a5e4488
BS
154}
155
c5f9864e 156target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
7a5e4488 157{
2f9d35fc 158 return do_sdiv(env, a, b, 1, GETPC());
7a5e4488 159}
c28ae41e
RH
160
161#ifdef TARGET_SPARC64
162int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b)
163{
164 if (b == 0) {
165 /* Raise divide by zero trap. */
2f9d35fc 166 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
c28ae41e
RH
167 } else if (b == -1) {
168 /* Avoid overflow trap with i386 divide insn. */
169 return -a;
170 } else {
171 return a / b;
172 }
173}
174
175uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
176{
177 if (b == 0) {
178 /* Raise divide by zero trap. */
2f9d35fc 179 cpu_raise_exception_ra(env, TT_DIV_ZERO, GETPC());
c28ae41e
RH
180 }
181 return a / b;
182}
183#endif
a2ea4aa9
RH
184
185target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
186 target_ulong src2)
187{
188 target_ulong dst;
189
190 /* Tag overflow occurs if either input has bits 0 or 1 set. */
191 if ((src1 | src2) & 3) {
192 goto tag_overflow;
193 }
194
195 dst = src1 + src2;
196
197 /* Tag overflow occurs if the addition overflows. */
198 if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
199 goto tag_overflow;
200 }
201
202 /* Only modify the CC after any exceptions have been generated. */
203 env->cc_op = CC_OP_TADDTV;
204 env->cc_src = src1;
205 env->cc_src2 = src2;
206 env->cc_dst = dst;
207 return dst;
208
209 tag_overflow:
2f9d35fc 210 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
a2ea4aa9
RH
211}
212
213target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
214 target_ulong src2)
215{
216 target_ulong dst;
217
218 /* Tag overflow occurs if either input has bits 0 or 1 set. */
219 if ((src1 | src2) & 3) {
220 goto tag_overflow;
221 }
222
223 dst = src1 - src2;
224
225 /* Tag overflow occurs if the subtraction overflows. */
226 if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) {
227 goto tag_overflow;
228 }
229
230 /* Only modify the CC after any exceptions have been generated. */
231 env->cc_op = CC_OP_TSUBTV;
232 env->cc_src = src1;
233 env->cc_src2 = src2;
234 env->cc_dst = dst;
235 return dst;
236
237 tag_overflow:
2f9d35fc 238 cpu_raise_exception_ra(env, TT_TOVF, GETPC());
a2ea4aa9 239}
d1c36ba7
RH
240
241#ifndef TARGET_SPARC64
242void helper_power_down(CPUSPARCState *env)
243{
259186a7
AF
244 CPUState *cs = CPU(sparc_env_get_cpu(env));
245
246 cs->halted = 1;
27103424 247 cs->exception_index = EXCP_HLT;
d1c36ba7
RH
248 env->pc = env->npc;
249 env->npc = env->pc + 4;
5638d180 250 cpu_loop_exit(cs);
d1c36ba7
RH
251}
252#endif
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