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3fffc223 TS |
1 | /* |
2 | * QEMU SMBus API | |
5fafdf24 | 3 | * |
3fffc223 | 4 | * Copyright (c) 2007 Arastra, Inc. |
5fafdf24 | 5 | * |
3fffc223 TS |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
87ecb68b | 25 | #include "i2c.h" |
3fffc223 TS |
26 | |
27 | struct SMBusDevice { | |
0ff596d0 PB |
28 | /* The SMBus protocol is implemented on top of I2C. */ |
29 | i2c_slave i2c; | |
30 | ||
1ea96673 PB |
31 | /* Remaining fields for internal use only. */ |
32 | int mode; | |
33 | int data_len; | |
34 | uint8_t data_buf[34]; /* command + len + 32 bytes of data. */ | |
35 | uint8_t command; | |
36 | }; | |
37 | ||
38 | typedef struct { | |
39 | I2CSlaveInfo i2c; | |
81a322d4 | 40 | int (*init)(SMBusDevice *dev); |
3fffc223 TS |
41 | void (*quick_cmd)(SMBusDevice *dev, uint8_t read); |
42 | void (*send_byte)(SMBusDevice *dev, uint8_t val); | |
43 | uint8_t (*receive_byte)(SMBusDevice *dev); | |
0ff596d0 PB |
44 | /* We can't distinguish between a word write and a block write with |
45 | length 1, so pass the whole data block including the length byte | |
46 | (if present). The device is responsible figuring out what type of | |
47 | command this is. */ | |
48 | void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len); | |
3f582262 | 49 | /* Likewise we can't distinguish between different reads, or even know |
0ff596d0 PB |
50 | the length of the read until the read is complete, so read data a |
51 | byte at a time. The device is responsible for adding the length | |
52 | byte on block reads. */ | |
53 | uint8_t (*read_data)(SMBusDevice *dev, uint8_t cmd, int n); | |
1ea96673 | 54 | } SMBusDeviceInfo; |
0ff596d0 | 55 | |
074f2fff | 56 | void smbus_register_device(SMBusDeviceInfo *info); |
0ff596d0 PB |
57 | |
58 | /* Master device commands. */ | |
5b7f5327 JQ |
59 | void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read); |
60 | uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr); | |
61 | void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data); | |
62 | uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command); | |
63 | void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data); | |
64 | uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command); | |
65 | void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data); | |
66 | int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data); | |
67 | void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data, | |
0ff596d0 | 68 | int len); |