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32993977 IY |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | /* | |
25 | * splitted out ioport related stuffs from vl.c. | |
26 | */ | |
27 | ||
022c62cb | 28 | #include "exec/ioport.h" |
bd3c9aa5 | 29 | #include "trace.h" |
022c62cb | 30 | #include "exec/memory.h" |
b40acf99 | 31 | #include "exec/address-spaces.h" |
32993977 | 32 | |
32993977 IY |
33 | //#define DEBUG_IOPORT |
34 | ||
35 | #ifdef DEBUG_IOPORT | |
36 | # define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__) | |
37 | #else | |
38 | # define LOG_IOPORT(...) do { } while (0) | |
39 | #endif | |
40 | ||
b40acf99 JK |
41 | typedef struct MemoryRegionPortioList { |
42 | MemoryRegion mr; | |
43 | void *portio_opaque; | |
44 | MemoryRegionPortio ports[]; | |
45 | } MemoryRegionPortioList; | |
46 | ||
3bb28b72 JK |
47 | static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size) |
48 | { | |
49 | return -1ULL; | |
50 | } | |
51 | ||
52 | static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val, | |
53 | unsigned size) | |
54 | { | |
55 | } | |
56 | ||
57 | const MemoryRegionOps unassigned_io_ops = { | |
58 | .read = unassigned_io_read, | |
59 | .write = unassigned_io_write, | |
60 | .endianness = DEVICE_NATIVE_ENDIAN, | |
61 | }; | |
62 | ||
c227f099 | 63 | void cpu_outb(pio_addr_t addr, uint8_t val) |
32993977 | 64 | { |
07323531 | 65 | LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val); |
bd3c9aa5 | 66 | trace_cpu_out(addr, val); |
b40acf99 | 67 | address_space_write(&address_space_io, addr, &val, 1); |
32993977 IY |
68 | } |
69 | ||
c227f099 | 70 | void cpu_outw(pio_addr_t addr, uint16_t val) |
32993977 | 71 | { |
b40acf99 JK |
72 | uint8_t buf[2]; |
73 | ||
07323531 | 74 | LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val); |
bd3c9aa5 | 75 | trace_cpu_out(addr, val); |
b40acf99 JK |
76 | stw_p(buf, val); |
77 | address_space_write(&address_space_io, addr, buf, 2); | |
32993977 IY |
78 | } |
79 | ||
c227f099 | 80 | void cpu_outl(pio_addr_t addr, uint32_t val) |
32993977 | 81 | { |
b40acf99 JK |
82 | uint8_t buf[4]; |
83 | ||
07323531 | 84 | LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val); |
bd3c9aa5 | 85 | trace_cpu_out(addr, val); |
b40acf99 JK |
86 | stl_p(buf, val); |
87 | address_space_write(&address_space_io, addr, buf, 4); | |
32993977 IY |
88 | } |
89 | ||
c227f099 | 90 | uint8_t cpu_inb(pio_addr_t addr) |
32993977 | 91 | { |
07323531 | 92 | uint8_t val; |
b40acf99 JK |
93 | |
94 | address_space_read(&address_space_io, addr, &val, 1); | |
bd3c9aa5 | 95 | trace_cpu_in(addr, val); |
07323531 | 96 | LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val); |
32993977 IY |
97 | return val; |
98 | } | |
99 | ||
c227f099 | 100 | uint16_t cpu_inw(pio_addr_t addr) |
32993977 | 101 | { |
b40acf99 | 102 | uint8_t buf[2]; |
07323531 | 103 | uint16_t val; |
b40acf99 JK |
104 | |
105 | address_space_read(&address_space_io, addr, buf, 2); | |
106 | val = lduw_p(buf); | |
bd3c9aa5 | 107 | trace_cpu_in(addr, val); |
07323531 | 108 | LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val); |
32993977 IY |
109 | return val; |
110 | } | |
111 | ||
c227f099 | 112 | uint32_t cpu_inl(pio_addr_t addr) |
32993977 | 113 | { |
b40acf99 | 114 | uint8_t buf[4]; |
07323531 | 115 | uint32_t val; |
b40acf99 JK |
116 | |
117 | address_space_read(&address_space_io, addr, buf, 4); | |
118 | val = ldl_p(buf); | |
bd3c9aa5 | 119 | trace_cpu_in(addr, val); |
07323531 | 120 | LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val); |
32993977 IY |
121 | return val; |
122 | } | |
6bf9fd43 AK |
123 | |
124 | void portio_list_init(PortioList *piolist, | |
db10ca90 | 125 | Object *owner, |
6bf9fd43 AK |
126 | const MemoryRegionPortio *callbacks, |
127 | void *opaque, const char *name) | |
128 | { | |
129 | unsigned n = 0; | |
130 | ||
131 | while (callbacks[n].size) { | |
132 | ++n; | |
133 | } | |
134 | ||
135 | piolist->ports = callbacks; | |
136 | piolist->nr = 0; | |
137 | piolist->regions = g_new0(MemoryRegion *, n); | |
138 | piolist->address_space = NULL; | |
139 | piolist->opaque = opaque; | |
db10ca90 | 140 | piolist->owner = owner; |
6bf9fd43 | 141 | piolist->name = name; |
c76bc480 JK |
142 | piolist->flush_coalesced_mmio = false; |
143 | } | |
144 | ||
145 | void portio_list_set_flush_coalesced(PortioList *piolist) | |
146 | { | |
147 | piolist->flush_coalesced_mmio = true; | |
6bf9fd43 AK |
148 | } |
149 | ||
150 | void portio_list_destroy(PortioList *piolist) | |
151 | { | |
152 | g_free(piolist->regions); | |
153 | } | |
154 | ||
b40acf99 JK |
155 | static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio, |
156 | uint64_t offset, unsigned size, | |
157 | bool write) | |
158 | { | |
159 | const MemoryRegionPortio *mrp; | |
160 | ||
161 | for (mrp = mrpio->ports; mrp->size; ++mrp) { | |
162 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len && | |
163 | size == mrp->size && | |
164 | (write ? (bool)mrp->write : (bool)mrp->read)) { | |
165 | return mrp; | |
166 | } | |
167 | } | |
168 | return NULL; | |
169 | } | |
170 | ||
171 | static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size) | |
172 | { | |
173 | MemoryRegionPortioList *mrpio = opaque; | |
174 | const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false); | |
175 | uint64_t data; | |
176 | ||
177 | data = ((uint64_t)1 << (size * 8)) - 1; | |
178 | if (mrp) { | |
179 | data = mrp->read(mrpio->portio_opaque, mrp->base + addr); | |
180 | } else if (size == 2) { | |
181 | mrp = find_portio(mrpio, addr, 1, false); | |
182 | assert(mrp); | |
183 | data = mrp->read(mrpio->portio_opaque, mrp->base + addr) | | |
184 | (mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8); | |
185 | } | |
186 | return data; | |
187 | } | |
188 | ||
189 | static void portio_write(void *opaque, hwaddr addr, uint64_t data, | |
190 | unsigned size) | |
191 | { | |
192 | MemoryRegionPortioList *mrpio = opaque; | |
193 | const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true); | |
194 | ||
195 | if (mrp) { | |
196 | mrp->write(mrpio->portio_opaque, mrp->base + addr, data); | |
197 | } else if (size == 2) { | |
198 | mrp = find_portio(mrpio, addr, 1, true); | |
199 | assert(mrp); | |
200 | mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff); | |
201 | mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8); | |
202 | } | |
203 | } | |
204 | ||
205 | static const MemoryRegionOps portio_ops = { | |
206 | .read = portio_read, | |
207 | .write = portio_write, | |
f36a6382 | 208 | .endianness = DEVICE_LITTLE_ENDIAN, |
b40acf99 JK |
209 | .valid.unaligned = true, |
210 | .impl.unaligned = true, | |
211 | }; | |
212 | ||
6bf9fd43 AK |
213 | static void portio_list_add_1(PortioList *piolist, |
214 | const MemoryRegionPortio *pio_init, | |
215 | unsigned count, unsigned start, | |
216 | unsigned off_low, unsigned off_high) | |
217 | { | |
b40acf99 | 218 | MemoryRegionPortioList *mrpio; |
6bf9fd43 AK |
219 | unsigned i; |
220 | ||
221 | /* Copy the sub-list and null-terminate it. */ | |
b40acf99 JK |
222 | mrpio = g_malloc0(sizeof(MemoryRegionPortioList) + |
223 | sizeof(MemoryRegionPortio) * (count + 1)); | |
224 | mrpio->portio_opaque = piolist->opaque; | |
225 | memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count); | |
226 | memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio)); | |
6bf9fd43 AK |
227 | |
228 | /* Adjust the offsets to all be zero-based for the region. */ | |
229 | for (i = 0; i < count; ++i) { | |
b40acf99 JK |
230 | mrpio->ports[i].offset -= off_low; |
231 | mrpio->ports[i].base = start + off_low; | |
6bf9fd43 AK |
232 | } |
233 | ||
de58ac72 AK |
234 | /* |
235 | * Use an alias so that the callback is called with an absolute address, | |
236 | * rather than an offset relative to to start + off_low. | |
237 | */ | |
db10ca90 PB |
238 | memory_region_init_io(&mrpio->mr, piolist->owner, &portio_ops, mrpio, |
239 | piolist->name, off_high - off_low); | |
c76bc480 JK |
240 | if (piolist->flush_coalesced_mmio) { |
241 | memory_region_set_flush_coalesced(&mrpio->mr); | |
242 | } | |
6bf9fd43 | 243 | memory_region_add_subregion(piolist->address_space, |
b40acf99 JK |
244 | start + off_low, &mrpio->mr); |
245 | piolist->regions[piolist->nr] = &mrpio->mr; | |
de58ac72 | 246 | ++piolist->nr; |
6bf9fd43 AK |
247 | } |
248 | ||
249 | void portio_list_add(PortioList *piolist, | |
250 | MemoryRegion *address_space, | |
251 | uint32_t start) | |
252 | { | |
253 | const MemoryRegionPortio *pio, *pio_start = piolist->ports; | |
254 | unsigned int off_low, off_high, off_last, count; | |
255 | ||
256 | piolist->address_space = address_space; | |
257 | ||
258 | /* Handle the first entry specially. */ | |
259 | off_last = off_low = pio_start->offset; | |
260 | off_high = off_low + pio_start->len; | |
261 | count = 1; | |
262 | ||
263 | for (pio = pio_start + 1; pio->size != 0; pio++, count++) { | |
264 | /* All entries must be sorted by offset. */ | |
265 | assert(pio->offset >= off_last); | |
266 | off_last = pio->offset; | |
267 | ||
268 | /* If we see a hole, break the region. */ | |
269 | if (off_last > off_high) { | |
270 | portio_list_add_1(piolist, pio_start, count, start, off_low, | |
271 | off_high); | |
272 | /* ... and start collecting anew. */ | |
273 | pio_start = pio; | |
274 | off_low = off_last; | |
275 | off_high = off_low + pio->len; | |
276 | count = 0; | |
277 | } else if (off_last + pio->len > off_high) { | |
278 | off_high = off_last + pio->len; | |
279 | } | |
280 | } | |
281 | ||
282 | /* There will always be an open sub-list. */ | |
283 | portio_list_add_1(piolist, pio_start, count, start, off_low, off_high); | |
284 | } | |
285 | ||
286 | void portio_list_del(PortioList *piolist) | |
287 | { | |
b40acf99 | 288 | MemoryRegionPortioList *mrpio; |
6bf9fd43 AK |
289 | unsigned i; |
290 | ||
291 | for (i = 0; i < piolist->nr; ++i) { | |
b40acf99 JK |
292 | mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr); |
293 | memory_region_del_subregion(piolist->address_space, &mrpio->mr); | |
294 | memory_region_destroy(&mrpio->mr); | |
295 | g_free(mrpio); | |
6bf9fd43 AK |
296 | piolist->regions[i] = NULL; |
297 | } | |
298 | } |