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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
36d20cb2 | 14 | #include "hw/boards.h" |
da34e65c | 15 | #include "qapi/error.h" |
9af23989 | 16 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 17 | #include "qapi/visitor.h" |
33cd52b5 AG |
18 | #include "hw/sysbus.h" |
19 | #include "sysemu/sysemu.h" | |
3bfe5716 | 20 | #include "sysemu/numa.h" |
33cd52b5 | 21 | #include "qemu/error-report.h" |
f348b6d1 | 22 | #include "qemu/cutils.h" |
c6ff347c | 23 | #include "sysemu/qtest.h" |
6b1b1440 MA |
24 | |
25 | static char *machine_get_accel(Object *obj, Error **errp) | |
26 | { | |
27 | MachineState *ms = MACHINE(obj); | |
28 | ||
29 | return g_strdup(ms->accel); | |
30 | } | |
31 | ||
32 | static void machine_set_accel(Object *obj, const char *value, Error **errp) | |
33 | { | |
34 | MachineState *ms = MACHINE(obj); | |
35 | ||
556068ee | 36 | g_free(ms->accel); |
6b1b1440 MA |
37 | ms->accel = g_strdup(value); |
38 | } | |
39 | ||
32c18a2d | 40 | static void machine_set_kernel_irqchip(Object *obj, Visitor *v, |
d7bce999 | 41 | const char *name, void *opaque, |
32c18a2d | 42 | Error **errp) |
6b1b1440 | 43 | { |
32c18a2d | 44 | Error *err = NULL; |
6b1b1440 | 45 | MachineState *ms = MACHINE(obj); |
32c18a2d | 46 | OnOffSplit mode; |
6b1b1440 | 47 | |
51e72bc1 | 48 | visit_type_OnOffSplit(v, name, &mode, &err); |
32c18a2d MG |
49 | if (err) { |
50 | error_propagate(errp, err); | |
51 | return; | |
52 | } else { | |
53 | switch (mode) { | |
54 | case ON_OFF_SPLIT_ON: | |
55 | ms->kernel_irqchip_allowed = true; | |
56 | ms->kernel_irqchip_required = true; | |
57 | ms->kernel_irqchip_split = false; | |
58 | break; | |
59 | case ON_OFF_SPLIT_OFF: | |
60 | ms->kernel_irqchip_allowed = false; | |
61 | ms->kernel_irqchip_required = false; | |
62 | ms->kernel_irqchip_split = false; | |
63 | break; | |
64 | case ON_OFF_SPLIT_SPLIT: | |
65 | ms->kernel_irqchip_allowed = true; | |
66 | ms->kernel_irqchip_required = true; | |
67 | ms->kernel_irqchip_split = true; | |
68 | break; | |
69 | default: | |
78a39306 GK |
70 | /* The value was checked in visit_type_OnOffSplit() above. If |
71 | * we get here, then something is wrong in QEMU. | |
72 | */ | |
32c18a2d MG |
73 | abort(); |
74 | } | |
75 | } | |
6b1b1440 MA |
76 | } |
77 | ||
78 | static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v, | |
d7bce999 | 79 | const char *name, void *opaque, |
6b1b1440 MA |
80 | Error **errp) |
81 | { | |
82 | MachineState *ms = MACHINE(obj); | |
83 | int64_t value = ms->kvm_shadow_mem; | |
84 | ||
51e72bc1 | 85 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
86 | } |
87 | ||
88 | static void machine_set_kvm_shadow_mem(Object *obj, Visitor *v, | |
d7bce999 | 89 | const char *name, void *opaque, |
6b1b1440 MA |
90 | Error **errp) |
91 | { | |
92 | MachineState *ms = MACHINE(obj); | |
93 | Error *error = NULL; | |
94 | int64_t value; | |
95 | ||
51e72bc1 | 96 | visit_type_int(v, name, &value, &error); |
6b1b1440 MA |
97 | if (error) { |
98 | error_propagate(errp, error); | |
99 | return; | |
100 | } | |
101 | ||
102 | ms->kvm_shadow_mem = value; | |
103 | } | |
104 | ||
105 | static char *machine_get_kernel(Object *obj, Error **errp) | |
106 | { | |
107 | MachineState *ms = MACHINE(obj); | |
108 | ||
109 | return g_strdup(ms->kernel_filename); | |
110 | } | |
111 | ||
112 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
113 | { | |
114 | MachineState *ms = MACHINE(obj); | |
115 | ||
556068ee | 116 | g_free(ms->kernel_filename); |
6b1b1440 MA |
117 | ms->kernel_filename = g_strdup(value); |
118 | } | |
119 | ||
120 | static char *machine_get_initrd(Object *obj, Error **errp) | |
121 | { | |
122 | MachineState *ms = MACHINE(obj); | |
123 | ||
124 | return g_strdup(ms->initrd_filename); | |
125 | } | |
126 | ||
127 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
128 | { | |
129 | MachineState *ms = MACHINE(obj); | |
130 | ||
556068ee | 131 | g_free(ms->initrd_filename); |
6b1b1440 MA |
132 | ms->initrd_filename = g_strdup(value); |
133 | } | |
134 | ||
135 | static char *machine_get_append(Object *obj, Error **errp) | |
136 | { | |
137 | MachineState *ms = MACHINE(obj); | |
138 | ||
139 | return g_strdup(ms->kernel_cmdline); | |
140 | } | |
141 | ||
142 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
143 | { | |
144 | MachineState *ms = MACHINE(obj); | |
145 | ||
556068ee | 146 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
147 | ms->kernel_cmdline = g_strdup(value); |
148 | } | |
149 | ||
150 | static char *machine_get_dtb(Object *obj, Error **errp) | |
151 | { | |
152 | MachineState *ms = MACHINE(obj); | |
153 | ||
154 | return g_strdup(ms->dtb); | |
155 | } | |
156 | ||
157 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
158 | { | |
159 | MachineState *ms = MACHINE(obj); | |
160 | ||
556068ee | 161 | g_free(ms->dtb); |
6b1b1440 MA |
162 | ms->dtb = g_strdup(value); |
163 | } | |
164 | ||
165 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
166 | { | |
167 | MachineState *ms = MACHINE(obj); | |
168 | ||
169 | return g_strdup(ms->dumpdtb); | |
170 | } | |
171 | ||
172 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
173 | { | |
174 | MachineState *ms = MACHINE(obj); | |
175 | ||
556068ee | 176 | g_free(ms->dumpdtb); |
6b1b1440 MA |
177 | ms->dumpdtb = g_strdup(value); |
178 | } | |
179 | ||
180 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
181 | const char *name, void *opaque, |
182 | Error **errp) | |
6b1b1440 MA |
183 | { |
184 | MachineState *ms = MACHINE(obj); | |
185 | int64_t value = ms->phandle_start; | |
186 | ||
51e72bc1 | 187 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
188 | } |
189 | ||
190 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
191 | const char *name, void *opaque, |
192 | Error **errp) | |
6b1b1440 MA |
193 | { |
194 | MachineState *ms = MACHINE(obj); | |
195 | Error *error = NULL; | |
196 | int64_t value; | |
197 | ||
51e72bc1 | 198 | visit_type_int(v, name, &value, &error); |
6b1b1440 MA |
199 | if (error) { |
200 | error_propagate(errp, error); | |
201 | return; | |
202 | } | |
203 | ||
204 | ms->phandle_start = value; | |
205 | } | |
206 | ||
207 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
208 | { | |
209 | MachineState *ms = MACHINE(obj); | |
210 | ||
211 | return g_strdup(ms->dt_compatible); | |
212 | } | |
213 | ||
214 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
215 | { | |
216 | MachineState *ms = MACHINE(obj); | |
217 | ||
556068ee | 218 | g_free(ms->dt_compatible); |
6b1b1440 MA |
219 | ms->dt_compatible = g_strdup(value); |
220 | } | |
221 | ||
222 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
223 | { | |
224 | MachineState *ms = MACHINE(obj); | |
225 | ||
226 | return ms->dump_guest_core; | |
227 | } | |
228 | ||
229 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
230 | { | |
231 | MachineState *ms = MACHINE(obj); | |
232 | ||
233 | ms->dump_guest_core = value; | |
234 | } | |
235 | ||
236 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
237 | { | |
238 | MachineState *ms = MACHINE(obj); | |
239 | ||
240 | return ms->mem_merge; | |
241 | } | |
242 | ||
243 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
244 | { | |
245 | MachineState *ms = MACHINE(obj); | |
246 | ||
247 | ms->mem_merge = value; | |
248 | } | |
249 | ||
250 | static bool machine_get_usb(Object *obj, Error **errp) | |
251 | { | |
252 | MachineState *ms = MACHINE(obj); | |
253 | ||
254 | return ms->usb; | |
255 | } | |
256 | ||
257 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
258 | { | |
259 | MachineState *ms = MACHINE(obj); | |
260 | ||
261 | ms->usb = value; | |
c6e76503 | 262 | ms->usb_disabled = !value; |
6b1b1440 MA |
263 | } |
264 | ||
cfc58cf3 EH |
265 | static bool machine_get_graphics(Object *obj, Error **errp) |
266 | { | |
267 | MachineState *ms = MACHINE(obj); | |
268 | ||
269 | return ms->enable_graphics; | |
270 | } | |
271 | ||
272 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
273 | { | |
274 | MachineState *ms = MACHINE(obj); | |
275 | ||
276 | ms->enable_graphics = value; | |
277 | } | |
278 | ||
79814179 TC |
279 | static bool machine_get_igd_gfx_passthru(Object *obj, Error **errp) |
280 | { | |
281 | MachineState *ms = MACHINE(obj); | |
282 | ||
283 | return ms->igd_gfx_passthru; | |
284 | } | |
285 | ||
286 | static void machine_set_igd_gfx_passthru(Object *obj, bool value, Error **errp) | |
287 | { | |
288 | MachineState *ms = MACHINE(obj); | |
289 | ||
290 | ms->igd_gfx_passthru = value; | |
291 | } | |
292 | ||
6b1b1440 MA |
293 | static char *machine_get_firmware(Object *obj, Error **errp) |
294 | { | |
295 | MachineState *ms = MACHINE(obj); | |
296 | ||
297 | return g_strdup(ms->firmware); | |
298 | } | |
299 | ||
300 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
301 | { | |
302 | MachineState *ms = MACHINE(obj); | |
303 | ||
556068ee | 304 | g_free(ms->firmware); |
6b1b1440 MA |
305 | ms->firmware = g_strdup(value); |
306 | } | |
307 | ||
9850c604 AG |
308 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
309 | { | |
310 | MachineState *ms = MACHINE(obj); | |
311 | ||
312 | ms->suppress_vmdesc = value; | |
313 | } | |
314 | ||
315 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
316 | { | |
317 | MachineState *ms = MACHINE(obj); | |
318 | ||
319 | return ms->suppress_vmdesc; | |
320 | } | |
321 | ||
902c053d GK |
322 | static void machine_set_enforce_config_section(Object *obj, bool value, |
323 | Error **errp) | |
324 | { | |
325 | MachineState *ms = MACHINE(obj); | |
326 | ||
327 | ms->enforce_config_section = value; | |
328 | } | |
329 | ||
330 | static bool machine_get_enforce_config_section(Object *obj, Error **errp) | |
331 | { | |
332 | MachineState *ms = MACHINE(obj); | |
333 | ||
334 | return ms->enforce_config_section; | |
335 | } | |
336 | ||
db588194 BS |
337 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
338 | { | |
339 | MachineState *ms = MACHINE(obj); | |
340 | ||
341 | return g_strdup(ms->memory_encryption); | |
342 | } | |
343 | ||
344 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
345 | Error **errp) | |
346 | { | |
347 | MachineState *ms = MACHINE(obj); | |
348 | ||
349 | g_free(ms->memory_encryption); | |
350 | ms->memory_encryption = g_strdup(value); | |
351 | } | |
352 | ||
0bd1909d | 353 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 354 | { |
0bd1909d EH |
355 | strList *item = g_new0(strList, 1); |
356 | ||
357 | item->value = g_strdup(type); | |
358 | item->next = mc->allowed_dynamic_sysbus_devices; | |
359 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
360 | } |
361 | ||
0bd1909d | 362 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 363 | { |
0bd1909d EH |
364 | MachineState *machine = opaque; |
365 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
366 | bool allowed = false; | |
367 | strList *wl; | |
33cd52b5 | 368 | |
0bd1909d EH |
369 | for (wl = mc->allowed_dynamic_sysbus_devices; |
370 | !allowed && wl; | |
371 | wl = wl->next) { | |
372 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
373 | } | |
374 | ||
375 | if (!allowed) { | |
376 | error_report("Option '-device %s' cannot be handled by this machine", | |
377 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
378 | exit(1); | |
33cd52b5 | 379 | } |
0bd1909d EH |
380 | } |
381 | ||
382 | static void machine_init_notify(Notifier *notifier, void *data) | |
383 | { | |
384 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
385 | |
386 | /* | |
0bd1909d EH |
387 | * Loop through all dynamically created sysbus devices and check if they are |
388 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 389 | */ |
0bd1909d | 390 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
391 | } |
392 | ||
f2d672c2 IM |
393 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
394 | { | |
395 | int i; | |
f2d672c2 | 396 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
397 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
398 | ||
399 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
400 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 401 | |
f2d672c2 | 402 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 403 | Object *cpu; |
f2d672c2 IM |
404 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
405 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
406 | ||
d342eb76 | 407 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
408 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
409 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
410 | sizeof(*cpu_item->props)); | |
411 | ||
412 | cpu = machine->possible_cpus->cpus[i].cpu; | |
413 | if (cpu) { | |
414 | cpu_item->has_qom_path = true; | |
415 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
416 | } | |
417 | list_item->value = cpu_item; | |
418 | list_item->next = head; | |
419 | head = list_item; | |
420 | } | |
421 | return head; | |
422 | } | |
423 | ||
7c88e65d IM |
424 | /** |
425 | * machine_set_cpu_numa_node: | |
426 | * @machine: machine object to modify | |
427 | * @props: specifies which cpu objects to assign to | |
428 | * numa node specified by @props.node_id | |
429 | * @errp: if an error occurs, a pointer to an area to store the error | |
430 | * | |
431 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
432 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
433 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
434 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
435 | * | |
436 | * However for CLI convenience it's possible to pass in subset of properties, | |
437 | * which would affect all cpu slots that match it. | |
438 | * Ex for pc machine: | |
439 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
440 | * -numa cpu,node-id=0,socket_id=0 \ | |
441 | * -numa cpu,node-id=1,socket_id=1 | |
442 | * will assign all child cores of socket 0 to node 0 and | |
443 | * of socket 1 to node 1. | |
444 | * | |
445 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
446 | * return error. | |
447 | * Empty subset is disallowed and function will return with error in this case. | |
448 | */ | |
449 | void machine_set_cpu_numa_node(MachineState *machine, | |
450 | const CpuInstanceProperties *props, Error **errp) | |
451 | { | |
452 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
453 | bool match = false; | |
454 | int i; | |
455 | ||
456 | if (!mc->possible_cpu_arch_ids) { | |
457 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
458 | return; | |
459 | } | |
460 | ||
461 | /* disabling node mapping is not supported, forbid it */ | |
462 | assert(props->has_node_id); | |
463 | ||
464 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
465 | mc->possible_cpu_arch_ids(machine); | |
466 | ||
467 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
468 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
469 | ||
470 | /* reject unsupported by board properties */ | |
471 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
472 | error_setg(errp, "thread-id is not supported"); | |
473 | return; | |
474 | } | |
475 | ||
476 | if (props->has_core_id && !slot->props.has_core_id) { | |
477 | error_setg(errp, "core-id is not supported"); | |
478 | return; | |
479 | } | |
480 | ||
481 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
482 | error_setg(errp, "socket-id is not supported"); | |
483 | return; | |
484 | } | |
485 | ||
486 | /* skip slots with explicit mismatch */ | |
487 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
488 | continue; | |
489 | } | |
490 | ||
491 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
492 | continue; | |
493 | } | |
494 | ||
495 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { | |
496 | continue; | |
497 | } | |
498 | ||
499 | /* reject assignment if slot is already assigned, for compatibility | |
500 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
501 | * error out if cpu thread and matched core have the same node-id */ | |
502 | if (slot->props.has_node_id && | |
503 | slot->props.node_id != props->node_id) { | |
504 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
505 | slot->props.node_id); | |
506 | return; | |
507 | } | |
508 | ||
509 | /* assign slot to node as it's matched '-numa cpu' key */ | |
510 | match = true; | |
511 | slot->props.node_id = props->node_id; | |
512 | slot->props.has_node_id = props->has_node_id; | |
513 | } | |
514 | ||
515 | if (!match) { | |
516 | error_setg(errp, "no match found"); | |
517 | } | |
518 | } | |
519 | ||
076b35b5 ND |
520 | static void machine_class_init(ObjectClass *oc, void *data) |
521 | { | |
522 | MachineClass *mc = MACHINE_CLASS(oc); | |
523 | ||
524 | /* Default 128 MB as guest ram size */ | |
525 | mc->default_ram_size = 128 * M_BYTE; | |
71ae9e94 | 526 | mc->rom_file_has_mr = true; |
26b81df4 | 527 | |
55641213 LV |
528 | /* numa node memory size aligned on 8MB by default. |
529 | * On Linux, each node's border has to be 8MB aligned | |
530 | */ | |
531 | mc->numa_mem_align_shift = 23; | |
3bfe5716 | 532 | mc->numa_auto_assign_ram = numa_default_auto_assign_ram; |
55641213 | 533 | |
26b81df4 EH |
534 | object_class_property_add_str(oc, "accel", |
535 | machine_get_accel, machine_set_accel, &error_abort); | |
536 | object_class_property_set_description(oc, "accel", | |
537 | "Accelerator list", &error_abort); | |
538 | ||
e80200c5 | 539 | object_class_property_add(oc, "kernel-irqchip", "on|off|split", |
26b81df4 EH |
540 | NULL, machine_set_kernel_irqchip, |
541 | NULL, NULL, &error_abort); | |
542 | object_class_property_set_description(oc, "kernel-irqchip", | |
543 | "Configure KVM in-kernel irqchip", &error_abort); | |
544 | ||
545 | object_class_property_add(oc, "kvm-shadow-mem", "int", | |
546 | machine_get_kvm_shadow_mem, machine_set_kvm_shadow_mem, | |
547 | NULL, NULL, &error_abort); | |
548 | object_class_property_set_description(oc, "kvm-shadow-mem", | |
549 | "KVM shadow MMU size", &error_abort); | |
550 | ||
551 | object_class_property_add_str(oc, "kernel", | |
552 | machine_get_kernel, machine_set_kernel, &error_abort); | |
553 | object_class_property_set_description(oc, "kernel", | |
554 | "Linux kernel image file", &error_abort); | |
555 | ||
556 | object_class_property_add_str(oc, "initrd", | |
557 | machine_get_initrd, machine_set_initrd, &error_abort); | |
558 | object_class_property_set_description(oc, "initrd", | |
559 | "Linux initial ramdisk file", &error_abort); | |
560 | ||
561 | object_class_property_add_str(oc, "append", | |
562 | machine_get_append, machine_set_append, &error_abort); | |
563 | object_class_property_set_description(oc, "append", | |
564 | "Linux kernel command line", &error_abort); | |
565 | ||
566 | object_class_property_add_str(oc, "dtb", | |
567 | machine_get_dtb, machine_set_dtb, &error_abort); | |
568 | object_class_property_set_description(oc, "dtb", | |
569 | "Linux kernel device tree file", &error_abort); | |
570 | ||
571 | object_class_property_add_str(oc, "dumpdtb", | |
572 | machine_get_dumpdtb, machine_set_dumpdtb, &error_abort); | |
573 | object_class_property_set_description(oc, "dumpdtb", | |
574 | "Dump current dtb to a file and quit", &error_abort); | |
575 | ||
576 | object_class_property_add(oc, "phandle-start", "int", | |
577 | machine_get_phandle_start, machine_set_phandle_start, | |
578 | NULL, NULL, &error_abort); | |
579 | object_class_property_set_description(oc, "phandle-start", | |
580 | "The first phandle ID we may generate dynamically", &error_abort); | |
581 | ||
582 | object_class_property_add_str(oc, "dt-compatible", | |
583 | machine_get_dt_compatible, machine_set_dt_compatible, &error_abort); | |
584 | object_class_property_set_description(oc, "dt-compatible", | |
585 | "Overrides the \"compatible\" property of the dt root node", | |
586 | &error_abort); | |
587 | ||
588 | object_class_property_add_bool(oc, "dump-guest-core", | |
589 | machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort); | |
590 | object_class_property_set_description(oc, "dump-guest-core", | |
591 | "Include guest memory in a core dump", &error_abort); | |
592 | ||
593 | object_class_property_add_bool(oc, "mem-merge", | |
594 | machine_get_mem_merge, machine_set_mem_merge, &error_abort); | |
595 | object_class_property_set_description(oc, "mem-merge", | |
596 | "Enable/disable memory merge support", &error_abort); | |
597 | ||
598 | object_class_property_add_bool(oc, "usb", | |
599 | machine_get_usb, machine_set_usb, &error_abort); | |
600 | object_class_property_set_description(oc, "usb", | |
601 | "Set on/off to enable/disable usb", &error_abort); | |
602 | ||
603 | object_class_property_add_bool(oc, "graphics", | |
604 | machine_get_graphics, machine_set_graphics, &error_abort); | |
605 | object_class_property_set_description(oc, "graphics", | |
606 | "Set on/off to enable/disable graphics emulation", &error_abort); | |
607 | ||
608 | object_class_property_add_bool(oc, "igd-passthru", | |
609 | machine_get_igd_gfx_passthru, machine_set_igd_gfx_passthru, | |
610 | &error_abort); | |
611 | object_class_property_set_description(oc, "igd-passthru", | |
612 | "Set on/off to enable/disable igd passthrou", &error_abort); | |
613 | ||
614 | object_class_property_add_str(oc, "firmware", | |
615 | machine_get_firmware, machine_set_firmware, | |
616 | &error_abort); | |
617 | object_class_property_set_description(oc, "firmware", | |
618 | "Firmware image", &error_abort); | |
619 | ||
620 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
621 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc, | |
622 | &error_abort); | |
623 | object_class_property_set_description(oc, "suppress-vmdesc", | |
624 | "Set on to disable self-describing migration", &error_abort); | |
625 | ||
626 | object_class_property_add_bool(oc, "enforce-config-section", | |
627 | machine_get_enforce_config_section, machine_set_enforce_config_section, | |
628 | &error_abort); | |
629 | object_class_property_set_description(oc, "enforce-config-section", | |
630 | "Set on to enforce configuration section migration", &error_abort); | |
db588194 BS |
631 | |
632 | object_class_property_add_str(oc, "memory-encryption", | |
633 | machine_get_memory_encryption, machine_set_memory_encryption, | |
634 | &error_abort); | |
635 | object_class_property_set_description(oc, "memory-encryption", | |
636 | "Set memory encyption object to use", &error_abort); | |
076b35b5 ND |
637 | } |
638 | ||
dcb3d601 EH |
639 | static void machine_class_base_init(ObjectClass *oc, void *data) |
640 | { | |
641 | if (!object_class_is_abstract(oc)) { | |
98cec76a | 642 | MachineClass *mc = MACHINE_CLASS(oc); |
dcb3d601 EH |
643 | const char *cname = object_class_get_name(oc); |
644 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
645 | mc->name = g_strndup(cname, |
646 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
dcb3d601 EH |
647 | } |
648 | } | |
649 | ||
6b1b1440 MA |
650 | static void machine_initfn(Object *obj) |
651 | { | |
33cd52b5 AG |
652 | MachineState *ms = MACHINE(obj); |
653 | ||
d8870d02 | 654 | ms->kernel_irqchip_allowed = true; |
4689b77b | 655 | ms->kvm_shadow_mem = -1; |
47c8ca53 | 656 | ms->dump_guest_core = true; |
75cc7f01 | 657 | ms->mem_merge = true; |
cfc58cf3 | 658 | ms->enable_graphics = true; |
d8870d02 | 659 | |
33cd52b5 AG |
660 | /* Register notifier when init is done for sysbus sanity checks */ |
661 | ms->sysbus_notifier.notify = machine_init_notify; | |
662 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
6b1b1440 MA |
663 | } |
664 | ||
665 | static void machine_finalize(Object *obj) | |
666 | { | |
667 | MachineState *ms = MACHINE(obj); | |
668 | ||
669 | g_free(ms->accel); | |
670 | g_free(ms->kernel_filename); | |
671 | g_free(ms->initrd_filename); | |
672 | g_free(ms->kernel_cmdline); | |
673 | g_free(ms->dtb); | |
674 | g_free(ms->dumpdtb); | |
675 | g_free(ms->dt_compatible); | |
676 | g_free(ms->firmware); | |
677 | } | |
36d20cb2 | 678 | |
5e97b623 MA |
679 | bool machine_usb(MachineState *machine) |
680 | { | |
681 | return machine->usb; | |
682 | } | |
683 | ||
d8870d02 MA |
684 | bool machine_kernel_irqchip_allowed(MachineState *machine) |
685 | { | |
686 | return machine->kernel_irqchip_allowed; | |
687 | } | |
688 | ||
689 | bool machine_kernel_irqchip_required(MachineState *machine) | |
690 | { | |
691 | return machine->kernel_irqchip_required; | |
692 | } | |
693 | ||
32c18a2d MG |
694 | bool machine_kernel_irqchip_split(MachineState *machine) |
695 | { | |
696 | return machine->kernel_irqchip_split; | |
697 | } | |
698 | ||
4689b77b MA |
699 | int machine_kvm_shadow_mem(MachineState *machine) |
700 | { | |
701 | return machine->kvm_shadow_mem; | |
702 | } | |
703 | ||
6cabe7fa MA |
704 | int machine_phandle_start(MachineState *machine) |
705 | { | |
706 | return machine->phandle_start; | |
707 | } | |
708 | ||
47c8ca53 MA |
709 | bool machine_dump_guest_core(MachineState *machine) |
710 | { | |
711 | return machine->dump_guest_core; | |
712 | } | |
713 | ||
75cc7f01 MA |
714 | bool machine_mem_merge(MachineState *machine) |
715 | { | |
716 | return machine->mem_merge; | |
717 | } | |
718 | ||
ec78f811 IM |
719 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
720 | { | |
721 | GString *s = g_string_new(NULL); | |
722 | if (cpu->props.has_socket_id) { | |
723 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
724 | } | |
725 | if (cpu->props.has_core_id) { | |
726 | if (s->len) { | |
727 | g_string_append_printf(s, ", "); | |
728 | } | |
729 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
730 | } | |
731 | if (cpu->props.has_thread_id) { | |
732 | if (s->len) { | |
733 | g_string_append_printf(s, ", "); | |
734 | } | |
735 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
736 | } | |
737 | return g_string_free(s, false); | |
738 | } | |
739 | ||
60bed6a3 | 740 | static void machine_numa_finish_init(MachineState *machine) |
ec78f811 IM |
741 | { |
742 | int i; | |
60bed6a3 | 743 | bool default_mapping; |
ec78f811 IM |
744 | GString *s = g_string_new(NULL); |
745 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
746 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
747 | ||
748 | assert(nb_numa_nodes); | |
60bed6a3 IM |
749 | for (i = 0; i < possible_cpus->len; i++) { |
750 | if (possible_cpus->cpus[i].props.has_node_id) { | |
751 | break; | |
752 | } | |
753 | } | |
754 | default_mapping = (i == possible_cpus->len); | |
755 | ||
ec78f811 IM |
756 | for (i = 0; i < possible_cpus->len; i++) { |
757 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
758 | ||
ec78f811 | 759 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
760 | /* fetch default mapping from board and enable it */ |
761 | CpuInstanceProperties props = cpu_slot->props; | |
762 | ||
79e07936 | 763 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 764 | if (!default_mapping) { |
60bed6a3 IM |
765 | /* record slots with not set mapping, |
766 | * TODO: make it hard error in future */ | |
767 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
768 | g_string_append_printf(s, "%sCPU %d [%s]", | |
769 | s->len ? ", " : "", i, cpu_str); | |
770 | g_free(cpu_str); | |
d41f3e75 IM |
771 | |
772 | /* non mapped cpus used to fallback to node 0 */ | |
773 | props.node_id = 0; | |
60bed6a3 | 774 | } |
d41f3e75 IM |
775 | |
776 | props.has_node_id = true; | |
777 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
778 | } |
779 | } | |
c6ff347c | 780 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
781 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
782 | s->str); | |
783 | warn_report("All CPU(s) up to maxcpus should be described " | |
784 | "in NUMA config, ability to start up with partial NUMA " | |
785 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
786 | } |
787 | g_string_free(s, true); | |
788 | } | |
789 | ||
482dfe9a IM |
790 | void machine_run_board_init(MachineState *machine) |
791 | { | |
792 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
ec78f811 IM |
793 | |
794 | if (nb_numa_nodes) { | |
60bed6a3 | 795 | machine_numa_finish_init(machine); |
ec78f811 | 796 | } |
c9cf636d AF |
797 | |
798 | /* If the machine supports the valid_cpu_types check and the user | |
799 | * specified a CPU with -cpu check here that the user CPU is supported. | |
800 | */ | |
801 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
802 | ObjectClass *class = object_class_by_name(machine->cpu_type); | |
803 | int i; | |
804 | ||
805 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
806 | if (object_class_dynamic_cast(class, | |
807 | machine_class->valid_cpu_types[i])) { | |
808 | /* The user specificed CPU is in the valid field, we are | |
809 | * good to go. | |
810 | */ | |
811 | break; | |
812 | } | |
813 | } | |
814 | ||
815 | if (!machine_class->valid_cpu_types[i]) { | |
816 | /* The user specified CPU is not valid */ | |
817 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
818 | error_printf("The valid types are: %s", | |
819 | machine_class->valid_cpu_types[0]); | |
820 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
821 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
822 | } | |
823 | error_printf("\n"); | |
824 | ||
825 | exit(1); | |
826 | } | |
827 | } | |
828 | ||
482dfe9a IM |
829 | machine_class->init(machine); |
830 | } | |
831 | ||
bacc344c IM |
832 | static void machine_class_finalize(ObjectClass *klass, void *data) |
833 | { | |
834 | MachineClass *mc = MACHINE_CLASS(klass); | |
835 | ||
836 | if (mc->compat_props) { | |
837 | g_array_free(mc->compat_props, true); | |
838 | } | |
8ea75371 | 839 | g_free(mc->name); |
bacc344c IM |
840 | } |
841 | ||
39a3b377 EH |
842 | void machine_register_compat_props(MachineState *machine) |
843 | { | |
844 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
845 | int i; | |
846 | GlobalProperty *p; | |
847 | ||
848 | if (!mc->compat_props) { | |
849 | return; | |
850 | } | |
851 | ||
852 | for (i = 0; i < mc->compat_props->len; i++) { | |
853 | p = g_array_index(mc->compat_props, GlobalProperty *, i); | |
6d1e30c4 EH |
854 | /* Machine compat_props must never cause errors: */ |
855 | p->errp = &error_abort; | |
856 | qdev_prop_register_global(p); | |
39a3b377 EH |
857 | } |
858 | } | |
859 | ||
36d20cb2 MA |
860 | static const TypeInfo machine_info = { |
861 | .name = TYPE_MACHINE, | |
862 | .parent = TYPE_OBJECT, | |
863 | .abstract = true, | |
864 | .class_size = sizeof(MachineClass), | |
076b35b5 | 865 | .class_init = machine_class_init, |
dcb3d601 | 866 | .class_base_init = machine_class_base_init, |
bacc344c | 867 | .class_finalize = machine_class_finalize, |
36d20cb2 | 868 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
869 | .instance_init = machine_initfn, |
870 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
871 | }; |
872 | ||
873 | static void machine_register_types(void) | |
874 | { | |
875 | type_register_static(&machine_info); | |
876 | } | |
877 | ||
878 | type_init(machine_register_types) |